From adfccf118211520ebe22f9f46e73834211ea492d Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 17 Mar 2018 20:32:03 +0100 Subject: [PATCH 1/3] net: dsa: mv88e6xxx: Add missing g1 IRQ numbers With the recent change to polling for interrupts, it is important that the number of global 1 interrupts is listed. Without it, the driver requests an interrupt domain for zero interrupts, which returns EINVAL, and the probe fails. Add two missing entries. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller --- drivers/net/dsa/mv88e6xxx/chip.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index d21f6c93c0c2..077e24fcf849 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3422,6 +3422,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .global2_addr = 0x1c, .age_time_coeff = 3750, .atu_move_port_mask = 0x1f, + .g1_irqs = 9, .g2_irqs = 10, .pvt = true, .multi_chip = true, @@ -3730,6 +3731,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .global2_addr = 0x1c, .age_time_coeff = 3750, .atu_move_port_mask = 0x1f, + .g1_irqs = 9, .g2_irqs = 10, .pvt = true, .multi_chip = true, From bc3931557d1d55584100b1ffefc248137b5cb7e1 Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 17 Mar 2018 20:32:04 +0100 Subject: [PATCH 2/3] net: dsa: mv88e6xxx: Add number of internal PHYs Add to the info structure the number of internal PHYs, if they generate interrupts. Some of the older generations of switches have internal PHYs, but no interrupt registers. In this case, set the count to zero. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller --- drivers/net/dsa/mv88e6xxx/chip.c | 28 ++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + 2 files changed, 29 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 077e24fcf849..a460673cf27e 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -3319,6 +3319,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6085", .num_databases = 4096, .num_ports = 10, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3339,6 +3340,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6095/88E6095F", .num_databases = 256, .num_ports = 11, + .num_internal_phys = 0, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3357,6 +3359,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6097/88E6097F", .num_databases = 4096, .num_ports = 11, + .num_internal_phys = 8, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3377,6 +3380,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6123", .num_databases = 4096, .num_ports = 3, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3397,6 +3401,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6131", .num_databases = 256, .num_ports = 8, + .num_internal_phys = 0, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3415,6 +3420,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6341", .num_databases = 4096, .num_ports = 6, + .num_internal_phys = 5, .num_gpio = 11, .max_vid = 4095, .port_base_addr = 0x10, @@ -3436,6 +3442,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6161", .num_databases = 4096, .num_ports = 6, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3456,6 +3463,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6165", .num_databases = 4096, .num_ports = 6, + .num_internal_phys = 0, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3476,6 +3484,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6171", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3496,6 +3505,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6172", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3517,6 +3527,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6175", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3537,6 +3548,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6176", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3558,6 +3570,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6185", .num_databases = 256, .num_ports = 10, + .num_internal_phys = 0, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3576,6 +3589,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6190", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .num_gpio = 16, .max_vid = 8191, .port_base_addr = 0x0, @@ -3597,6 +3611,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6190X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .num_gpio = 16, .max_vid = 8191, .port_base_addr = 0x0, @@ -3618,6 +3633,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6191", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .max_vid = 8191, .port_base_addr = 0x0, .global1_addr = 0x1b, @@ -3639,6 +3655,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6240", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3661,6 +3678,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6290", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .num_gpio = 16, .max_vid = 8191, .port_base_addr = 0x0, @@ -3683,6 +3701,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6320", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3690,6 +3709,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .global2_addr = 0x1c, .age_time_coeff = 15000, .g1_irqs = 8, + .g2_irqs = 10, .atu_move_port_mask = 0xf, .pvt = true, .multi_chip = true, @@ -3704,6 +3724,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6321", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3711,6 +3732,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .global2_addr = 0x1c, .age_time_coeff = 15000, .g1_irqs = 8, + .g2_irqs = 10, .atu_move_port_mask = 0xf, .multi_chip = true, .tag_protocol = DSA_TAG_PROTO_EDSA, @@ -3723,6 +3745,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .family = MV88E6XXX_FAMILY_6341, .name = "Marvell 88E6341", .num_databases = 4096, + .num_internal_phys = 5, .num_ports = 6, .num_gpio = 11, .max_vid = 4095, @@ -3746,6 +3769,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6350", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3766,6 +3790,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6351", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .max_vid = 4095, .port_base_addr = 0x10, .global1_addr = 0x1b, @@ -3786,6 +3811,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6352", .num_databases = 4096, .num_ports = 7, + .num_internal_phys = 5, .num_gpio = 15, .max_vid = 4095, .port_base_addr = 0x10, @@ -3807,6 +3833,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6390", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .num_gpio = 16, .max_vid = 8191, .port_base_addr = 0x0, @@ -3828,6 +3855,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .name = "Marvell 88E6390X", .num_databases = 4096, .num_ports = 11, /* 10 + Z80 */ + .num_internal_phys = 11, .num_gpio = 16, .max_vid = 8191, .port_base_addr = 0x0, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 26b9a618cdee..bad211014e91 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -110,6 +110,7 @@ struct mv88e6xxx_info { const char *name; unsigned int num_databases; unsigned int num_ports; + unsigned int num_internal_phys; unsigned int num_gpio; unsigned int max_vid; unsigned int port_base_addr; From 6f88284f3bd77a0e51de22d4956f07557bcc0dbf Mon Sep 17 00:00:00 2001 From: Andrew Lunn Date: Sat, 17 Mar 2018 20:32:05 +0100 Subject: [PATCH 3/3] net: dsa: mv88e6xxx: Add MDIO interrupts for internal PHYs When registering an MDIO bus, it is possible to pass an array of interrupts, one per address on the bus. phylib will then associate the interrupt to the PHY device, if no other interrupt is provided. Some of the global2 interrupts are PHY interrupts. Place them into the MDIO bus structure. Signed-off-by: Andrew Lunn Signed-off-by: David S. Miller --- drivers/net/dsa/mv88e6xxx/chip.c | 10 +++++++++ drivers/net/dsa/mv88e6xxx/global2.c | 32 +++++++++++++++++++++++++++++ drivers/net/dsa/mv88e6xxx/global2.h | 16 +++++++++++++++ 3 files changed, 58 insertions(+) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index a460673cf27e..fe46b40195fa 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -2293,12 +2293,19 @@ static int mv88e6xxx_mdio_register(struct mv88e6xxx_chip *chip, bus->write = mv88e6xxx_mdio_write; bus->parent = chip->dev; + if (!external) { + err = mv88e6xxx_g2_irq_mdio_setup(chip, bus); + if (err) + return err; + } + if (np) err = of_mdiobus_register(bus, np); else err = mdiobus_register(bus); if (err) { dev_err(chip->dev, "Cannot register MDIO bus (%d)\n", err); + mv88e6xxx_g2_irq_mdio_free(chip, bus); return err; } @@ -2325,6 +2332,9 @@ static void mv88e6xxx_mdios_unregister(struct mv88e6xxx_chip *chip) list_for_each_entry(mdio_bus, &chip->mdios, list) { bus = mdio_bus->bus; + if (!mdio_bus->external) + mv88e6xxx_g2_irq_mdio_free(chip, bus); + mdiobus_unregister(bus); } } diff --git a/drivers/net/dsa/mv88e6xxx/global2.c b/drivers/net/dsa/mv88e6xxx/global2.c index 5f370f1fc7c4..6c620974fef3 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.c +++ b/drivers/net/dsa/mv88e6xxx/global2.c @@ -1107,6 +1107,38 @@ out: return err; } +int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, + struct mii_bus *bus) +{ + int phy, irq, err, err_phy; + + for (phy = 0; phy < chip->info->num_internal_phys; phy++) { + irq = irq_find_mapping(chip->g2_irq.domain, phy); + if (irq < 0) { + err = irq; + goto out; + } + bus->irq[chip->info->port_base_addr + phy] = irq; + } + return 0; +out: + err_phy = phy; + + for (phy = 0; phy < err_phy; phy++) + irq_dispose_mapping(bus->irq[phy]); + + return err; +} + +void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip, + struct mii_bus *bus) +{ + int phy; + + for (phy = 0; phy < chip->info->num_internal_phys; phy++) + irq_dispose_mapping(bus->irq[phy]); +} + int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip) { u16 reg; diff --git a/drivers/net/dsa/mv88e6xxx/global2.h b/drivers/net/dsa/mv88e6xxx/global2.h index aa3f0a736966..520ec70d32e8 100644 --- a/drivers/net/dsa/mv88e6xxx/global2.h +++ b/drivers/net/dsa/mv88e6xxx/global2.h @@ -317,6 +317,11 @@ int mv88e6xxx_g2_setup(struct mv88e6xxx_chip *chip); int mv88e6xxx_g2_irq_setup(struct mv88e6xxx_chip *chip); void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip); +int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, + struct mii_bus *bus); +void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip, + struct mii_bus *bus); + int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip); int mv88e6352_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip); @@ -450,6 +455,17 @@ static inline void mv88e6xxx_g2_irq_free(struct mv88e6xxx_chip *chip) { } +static inline int mv88e6xxx_g2_irq_mdio_setup(struct mv88e6xxx_chip *chip, + struct mii_bus *bus) +{ + return 0; +} + +static inline void mv88e6xxx_g2_irq_mdio_free(struct mv88e6xxx_chip *chip, + struct mii_bus *bus) +{ +} + static inline int mv88e6185_g2_mgmt_rsvd2cpu(struct mv88e6xxx_chip *chip) { return -EOPNOTSUPP;