mmc: renesas_sdhi: really fix WP logic regressions
This reverts commite060d376cc
("mmc: renesas_sdhi: fix WP detection") and adds some code to really fix the regressions. It was missed so far that Renesas R-Car instantiations of SDHI chose to disable internal WP and used the existence of "wp-gpios" to en/disable WP at all. With the first refactoring by Yamada-san with commit2ad1db059b
("mmc: renesas_sdhi: use MMC_CAP2_NO_WRITE_PROTECT instead of TMIO own flag"), WP was always disabled even when GPIOs were present. With Wolfram's first fix which gets now reverted, GPIOs were honored. But when not available, the fallback was to internal WP and not to disabled WP. This caused wrong WP status on uSD card slots. Restore the old behaviour now. By default, WP is disabled. When a GPIO is found, the GPIO re-enables WP. We will think about possible better ways to handle this in the future. Tested on a previously regressing Renesas Lager board (H2) and a still working Renesas Salvator-X board (M3-W). Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Cc: stable@vger.kernel.org # v4.17+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -28,6 +28,7 @@
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/slot-gpio.h>
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#include <linux/mfd/tmio.h>
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#include <linux/sh_dma.h>
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#include <linux/delay.h>
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@ -534,6 +535,10 @@ int renesas_sdhi_probe(struct platform_device *pdev,
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host->multi_io_quirk = renesas_sdhi_multi_io_quirk;
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host->dma_ops = dma_ops;
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/* For some SoC, we disable internal WP. GPIO may override this */
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if (mmc_can_gpio_ro(host->mmc))
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mmc_data->capabilities2 &= ~MMC_CAP2_NO_WRITE_PROTECT;
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/* SDR speeds are only available on Gen2+ */
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if (mmc_data->flags & TMIO_MMC_MIN_RCAR2) {
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/* card_busy caused issues on r8a73a4 (pre-Gen2) CD-less SDHI */
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@ -87,6 +87,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.bus_shift = 2,
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.scc_offset = 0x1000,
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.taps = rcar_gen3_scc_taps,
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@ -42,6 +42,7 @@ static const struct renesas_sdhi_of_data of_rz_compatible = {
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static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
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.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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};
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/* Definitions for sampling clocks */
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@ -61,6 +62,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
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.dma_rx_offset = 0x2000,
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.scc_offset = 0x0300,
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@ -81,6 +83,7 @@ static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
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TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2,
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.capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
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MMC_CAP_CMD23,
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.capabilities2 = MMC_CAP2_NO_WRITE_PROTECT,
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.bus_shift = 2,
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.scc_offset = 0x1000,
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.taps = rcar_gen3_scc_taps,
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