ARM: dts: r8a7792: add JPU clocks

Add JPU clock and its parent, M2 clock to the R8A7792 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Sergei Shtylyov 2016-06-17 01:02:48 +03:00 committed by Simon Horman
parent adc47ecf5a
commit eebc8e2c5b
2 changed files with 17 additions and 0 deletions

View File

@ -280,8 +280,24 @@
clock-div = <48>;
clock-mult = <1>;
};
m2_clk: m2 {
compatible = "fixed-factor-clock";
clocks = <&cpg_clocks R8A7792_CLK_PLL1>;
#clock-cells = <0>;
clock-div = <8>;
clock-mult = <1>;
};
/* Gate clocks */
mstp1_clks: mstp1_clks@e6150134 {
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";
reg = <0 0xe6150134 0 4>, <0 0xe6150038 0 4>;
clocks = <&m2_clk>;
#clock-cells = <1>;
clock-indices = <R8A7792_CLK_JPU>;
clock-output-names = "jpu";
};
mstp2_clks: mstp2_clks@e6150138 {
compatible = "renesas,r8a7792-mstp-clocks",
"renesas,cpg-mstp-clocks";

View File

@ -24,6 +24,7 @@
#define R8A7792_CLK_MSIOF0 0
/* MSTP1 */
#define R8A7792_CLK_JPU 6
#define R8A7792_CLK_TMU1 11
#define R8A7792_CLK_TMU3 21
#define R8A7792_CLK_TMU2 22