drm/i915: Remove LVDS and PPS suspend time save/restore
In the preceding patches we made sure that: - the LVDS encoder takes care of reiniting both the LVDS register and its PPS - the eDP encoder takes care of reiniting its PPS - the PPS register unlocking workaround is applied explicitly whenever the PPS context is lost Based on the above we can safely remove the opaque LVDS and PPS save / restore from generic code. Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1470827254-21954-6-git-send-email-imre.deak@intel.com
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@ -1061,13 +1061,6 @@ struct intel_gmbus {
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struct i915_suspend_saved_registers {
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u32 saveDSPARB;
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u32 saveLVDS;
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u32 savePP_ON_DELAYS;
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u32 savePP_OFF_DELAYS;
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u32 savePP_ON;
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u32 savePP_OFF;
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u32 savePP_CONTROL;
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u32 savePP_DIVISOR;
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u32 saveFBC_CONTROL;
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u32 saveCACHE_MODE_0;
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u32 saveMI_ARB_STATE;
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@ -37,20 +37,6 @@ static void i915_save_display(struct drm_device *dev)
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if (INTEL_INFO(dev)->gen <= 4)
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dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
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/* LVDS state */
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if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
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dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);
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else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
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dev_priv->regfile.saveLVDS = I915_READ(LVDS);
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/* Panel power sequencer */
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if (HAS_PCH_SPLIT(dev_priv) || INTEL_GEN(dev_priv) <= 4) {
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dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL(0));
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dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS(0));
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dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS(0));
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dev_priv->regfile.savePP_DIVISOR = I915_READ(PP_DIVISOR(0));
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}
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/* save FBC interval */
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if (HAS_FBC(dev) && INTEL_INFO(dev)->gen <= 4 && !IS_G4X(dev))
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dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
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@ -59,28 +45,11 @@ static void i915_save_display(struct drm_device *dev)
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static void i915_restore_display(struct drm_device *dev)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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u32 mask = 0xffffffff;
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/* Display arbitration */
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if (INTEL_INFO(dev)->gen <= 4)
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I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
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mask = ~LVDS_PORT_EN;
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/* LVDS state */
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if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
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I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);
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else if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
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I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);
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/* Panel power sequencer */
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if (HAS_PCH_SPLIT(dev_priv) || INTEL_GEN(dev_priv) <= 4) {
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I915_WRITE(PP_ON_DELAYS(0), dev_priv->regfile.savePP_ON_DELAYS);
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I915_WRITE(PP_OFF_DELAYS(0), dev_priv->regfile.savePP_OFF_DELAYS);
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I915_WRITE(PP_DIVISOR(0), dev_priv->regfile.savePP_DIVISOR);
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I915_WRITE(PP_CONTROL(0), dev_priv->regfile.savePP_CONTROL);
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}
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/* only restore FBC info on the platform that supports FBC*/
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intel_fbc_global_disable(dev_priv);
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