ARM: imx27: Remove iomux-v1 board code
IMX_HAVE_IOMUX_V1 was only used by i.MX27 board files. Since the board files users are gone, it is safe to remove iomux-v1 related code. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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24e0729703
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@ -47,9 +47,6 @@ config HAVE_IMX_SRC
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def_bool y if SMP
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select ARCH_HAS_RESET_CONTROLLER
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config IMX_HAVE_IOMUX_V1
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bool
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config ARCH_MXC_IOMUX_V3
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bool
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@ -99,7 +96,6 @@ config SOC_IMX25
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config SOC_IMX27
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bool "i.MX27 support"
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select IMX_HAVE_IOMUX_V1
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select CPU_ARM926T
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select MXC_AVIC
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select PINCTRL_IMX27
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@ -11,7 +11,6 @@ obj-$(CONFIG_SOC_IMX35) += mm-imx3.o cpu-imx35.o mach-imx35.o
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imx5-pm-$(CONFIG_PM) += pm-imx5.o
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obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o $(imx5-pm-y)
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obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
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obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
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obj-$(CONFIG_MXC_TZIC) += tzic.o
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@ -1,174 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* arch/arm/plat-mxc/iomux-v1.c
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*
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* Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
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* Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
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*
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* Common code for i.MX1, i.MX21 and i.MX27
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*/
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/gpio.h>
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#include <asm/mach/map.h>
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#include "hardware.h"
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#include "iomux-v1.h"
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static void __iomem *imx_iomuxv1_baseaddr;
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static unsigned imx_iomuxv1_numports;
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static inline unsigned long imx_iomuxv1_readl(unsigned offset)
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{
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return imx_readl(imx_iomuxv1_baseaddr + offset);
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}
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static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
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{
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imx_writel(val, imx_iomuxv1_baseaddr + offset);
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}
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static inline void imx_iomuxv1_rmwl(unsigned offset,
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unsigned long mask, unsigned long value)
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{
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unsigned long reg = imx_iomuxv1_readl(offset);
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reg &= ~mask;
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reg |= value;
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imx_iomuxv1_writel(reg, offset);
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}
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static inline void imx_iomuxv1_set_puen(
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unsigned int port, unsigned int pin, int on)
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{
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unsigned long mask = 1 << pin;
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imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
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}
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static inline void imx_iomuxv1_set_ddir(
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unsigned int port, unsigned int pin, int out)
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{
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unsigned long mask = 1 << pin;
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imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
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}
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static inline void imx_iomuxv1_set_gpr(
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unsigned int port, unsigned int pin, int af)
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{
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unsigned long mask = 1 << pin;
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imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
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}
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static inline void imx_iomuxv1_set_gius(
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unsigned int port, unsigned int pin, int inuse)
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{
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unsigned long mask = 1 << pin;
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imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
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}
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static inline void imx_iomuxv1_set_ocr(
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unsigned int port, unsigned int pin, unsigned int ocr)
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{
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unsigned long shift = (pin & 0xf) << 1;
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unsigned long mask = 3 << shift;
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unsigned long value = ocr << shift;
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unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
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imx_iomuxv1_rmwl(offset, mask, value);
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}
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static inline void imx_iomuxv1_set_iconfa(
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unsigned int port, unsigned int pin, unsigned int aout)
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{
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unsigned long shift = (pin & 0xf) << 1;
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unsigned long mask = 3 << shift;
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unsigned long value = aout << shift;
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unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
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imx_iomuxv1_rmwl(offset, mask, value);
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}
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static inline void imx_iomuxv1_set_iconfb(
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unsigned int port, unsigned int pin, unsigned int bout)
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{
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unsigned long shift = (pin & 0xf) << 1;
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unsigned long mask = 3 << shift;
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unsigned long value = bout << shift;
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unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
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imx_iomuxv1_rmwl(offset, mask, value);
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}
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int mxc_gpio_mode(int gpio_mode)
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{
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unsigned int pin = gpio_mode & GPIO_PIN_MASK;
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unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
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unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
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unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
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unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
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if (port >= imx_iomuxv1_numports)
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return -EINVAL;
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/* Pullup enable */
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imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
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/* Data direction */
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imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
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/* Primary / alternate function */
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imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
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/* use as gpio? */
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imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
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imx_iomuxv1_set_ocr(port, pin, ocr);
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imx_iomuxv1_set_iconfa(port, pin, aout);
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imx_iomuxv1_set_iconfb(port, pin, bout);
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return 0;
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}
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static int imx_iomuxv1_setup_multiple(const int *list, unsigned count)
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{
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size_t i;
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int ret = 0;
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for (i = 0; i < count; ++i) {
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ret = mxc_gpio_mode(list[i]);
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if (ret)
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return ret;
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}
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return ret;
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}
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int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
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const char *label)
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{
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int ret;
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ret = imx_iomuxv1_setup_multiple(pin_list, count);
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return ret;
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}
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int __init imx_iomuxv1_init(void __iomem *base, int numports)
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{
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imx_iomuxv1_baseaddr = base;
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imx_iomuxv1_numports = numports;
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return 0;
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}
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@ -7,13 +7,11 @@
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#include <linux/mm.h>
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#include <linux/init.h>
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#include <linux/pinctrl/machine.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "devices/devices-common.h"
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#include "hardware.h"
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#include "iomux-v1.h"
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/* MX27 memory map definition */
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static struct map_desc imx27_io_desc[] __initdata = {
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@ -52,8 +50,6 @@ void __init mx27_map_io(void)
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void __init imx27_init_early(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX27);
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imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
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MX27_NUM_GPIO_PORT);
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}
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void __init mx27_init_irq(void)
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