[ARM] mm: switch SA1100 to use sparsemem

Tested on Assabet, and Assabet with Neponset's SDRAM at 3328M phys.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2008-10-01 21:03:21 +01:00 committed by Russell King
parent 07f841b7c5
commit ee93916efe
2 changed files with 7 additions and 11 deletions

View File

@ -479,9 +479,7 @@ config ARCH_RPC
config ARCH_SA1100
bool "SA1100-based"
select ISA
select ARCH_DISCONTIGMEM_ENABLE
select ARCH_SPARSEMEM_ENABLE
select ARCH_SELECT_MEMORY_MODEL
select ARCH_MTD_XIP
select GENERIC_GPIO
select GENERIC_TIME

View File

@ -41,22 +41,20 @@ void sa1111_adjust_zones(int node, unsigned long *size, unsigned long *holes);
/*
* Because of the wide memory address space between physical RAM banks on the
* SA1100, it's much convenient to use Linux's NUMA support to implement our
* memory map representation. Assuming all memory nodes have equal access
* SA1100, it's much convenient to use Linux's SparseMEM support to implement
* our memory map representation. Assuming all memory nodes have equal access
* characteristics, we then have generic discontiguous memory support.
*
* Of course, all this isn't mandatory for SA1100 implementations with only
* one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM.
*
* The nodes are matched with the physical memory bank addresses which are
* incidentally the same as virtual addresses.
* The sparsemem banks are matched with the physical memory bank addresses
* which are incidentally the same as virtual addresses.
*
* node 0: 0xc0000000 - 0xc7ffffff
* node 1: 0xc8000000 - 0xcfffffff
* node 2: 0xd0000000 - 0xd7ffffff
* node 3: 0xd8000000 - 0xdfffffff
*/
#define NODE_MEM_SIZE_BITS 27
#define MAX_PHYSMEM_BITS 32
#define SECTION_SIZE_BITS 27
/*
* Cache flushing area - SA1100 zero bank