crypto: omap - Updates omap sham device related platform code
- registration with multi OMAP kernels support - clocks Signed-off-by: Dmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -1836,7 +1836,7 @@ static struct omap_clk omap2420_clks[] = {
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CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X),
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CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X),
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CLK(NULL, "des_ick", &des_ick, CK_242X),
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CLK(NULL, "sha_ick", &sha_ick, CK_242X),
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CLK("omap-sham", "ick", &sha_ick, CK_242X),
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CLK("omap_rng", "ick", &rng_ick, CK_242X),
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CLK(NULL, "aes_ick", &aes_ick, CK_242X),
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CLK(NULL, "pka_ick", &pka_ick, CK_242X),
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@ -1924,7 +1924,7 @@ static struct omap_clk omap2430_clks[] = {
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CLK(NULL, "sdma_ick", &sdma_ick, CK_243X),
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CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X),
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CLK(NULL, "des_ick", &des_ick, CK_243X),
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CLK(NULL, "sha_ick", &sha_ick, CK_243X),
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CLK("omap-sham", "ick", &sha_ick, CK_243X),
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CLK("omap_rng", "ick", &rng_ick, CK_243X),
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CLK(NULL, "aes_ick", &aes_ick, CK_243X),
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CLK(NULL, "pka_ick", &pka_ick, CK_243X),
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@ -3360,7 +3360,7 @@ static struct omap_clk omap3xxx_clks[] = {
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CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2 | CK_AM35XX),
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CLK(NULL, "icr_ick", &icr_ick, CK_343X),
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CLK(NULL, "aes2_ick", &aes2_ick, CK_343X),
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CLK(NULL, "sha12_ick", &sha12_ick, CK_343X),
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CLK("omap-sham", "ick", &sha12_ick, CK_343X),
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CLK(NULL, "des2_ick", &des2_ick, CK_343X),
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CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_3XXX),
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CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_3XXX),
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@ -26,6 +26,7 @@
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#include <plat/mux.h>
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#include <mach/gpio.h>
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#include <plat/mmc.h>
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#include <plat/dma.h>
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#include "mux.h"
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@ -453,8 +454,10 @@ static void omap_init_mcspi(void)
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static inline void omap_init_mcspi(void) {}
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#endif
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#ifdef CONFIG_OMAP_SHA1_MD5
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static struct resource sha1_md5_resources[] = {
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#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
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#ifdef CONFIG_ARCH_OMAP24XX
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static struct resource omap2_sham_resources[] = {
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{
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.start = OMAP24XX_SEC_SHA1MD5_BASE,
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.end = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
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@ -465,20 +468,55 @@ static struct resource sha1_md5_resources[] = {
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.flags = IORESOURCE_IRQ,
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}
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};
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static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
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#else
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#define omap2_sham_resources NULL
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#define omap2_sham_resources_sz 0
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#endif
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static struct platform_device sha1_md5_device = {
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.name = "OMAP SHA1/MD5",
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#ifdef CONFIG_ARCH_OMAP34XX
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static struct resource omap3_sham_resources[] = {
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{
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.start = OMAP34XX_SEC_SHA1MD5_BASE,
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.end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = INT_34XX_SHA1MD52_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = OMAP34XX_DMA_SHA1MD5_RX,
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.flags = IORESOURCE_DMA,
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}
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};
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static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
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#else
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#define omap3_sham_resources NULL
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#define omap3_sham_resources_sz 0
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#endif
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static struct platform_device sham_device = {
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.name = "omap-sham",
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.id = -1,
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.num_resources = ARRAY_SIZE(sha1_md5_resources),
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.resource = sha1_md5_resources,
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};
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static void omap_init_sha1_md5(void)
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static void omap_init_sham(void)
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{
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platform_device_register(&sha1_md5_device);
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if (cpu_is_omap24xx()) {
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sham_device.resource = omap2_sham_resources;
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sham_device.num_resources = omap2_sham_resources_sz;
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} else if (cpu_is_omap34xx()) {
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sham_device.resource = omap3_sham_resources;
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sham_device.num_resources = omap3_sham_resources_sz;
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} else {
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pr_err("%s: platform not supported\n", __func__);
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return;
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}
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platform_device_register(&sham_device);
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}
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#else
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static inline void omap_init_sha1_md5(void) { }
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static inline void omap_init_sham(void) { }
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#endif
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/*-------------------------------------------------------------------------*/
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@ -799,7 +837,7 @@ static int __init omap2_init_devices(void)
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omap_init_mcspi();
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omap_hdq_init();
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omap_init_sti();
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omap_init_sha1_md5();
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omap_init_sham();
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return 0;
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}
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@ -82,5 +82,10 @@
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#define OMAP34XX_MAILBOX_BASE (L4_34XX_BASE + 0x94000)
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/* Security */
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#define OMAP34XX_SEC_BASE (L4_34XX_BASE + 0xA0000)
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#define OMAP34XX_SEC_SHA1MD5_BASE (OMAP34XX_SEC_BASE + 0x23000)
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#define OMAP34XX_SEC_AES_BASE (OMAP34XX_SEC_BASE + 0x25000)
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#endif /* __ASM_ARCH_OMAP3_H */
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