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linux-sg2042
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Merge branch 'fixes' into for-next 

* fixes: (27 commits)
  firmware: arm_scpi: Revert updates made during v4.15 merge window
  arm: dts: marvell: Add missing #phy-cells to usb-nop-xceiv
  arm64: dts: sort vendor subdirectories in Makefile alphabetically
  MAINTAINERS: exclude other Socionext SoC DT files from ARM/UNIPHIER entry
  arm64: dts: uniphier: remove unnecessary interrupt-parent
  arm64: dts: uniphier: correct on-board device IRQ number for PXs3
  optee: fix invalid of_node_put() in optee_driver_init()
  Revert "ARM: dts: imx53: add srtc node"
  ARM: dts: vf610-zii-dev-rev-c: Fix the I2C EEPROM address
  ARM: dts: am437x-cm-t43: Correct the dmas property of spi0
  ARM: dts: am4372: Correct the interrupts_properties of McASP
  ARM: dts: logicpd-somlv: Fix wl127x pinmux
  ARM: dts: logicpd-som-lv: Fix gpmc addresses for NAND and enet
  ARM: dts: Fix omap4 hang with GPS connected to USB by using wakeupgen
  ARM: OMAP2+: Missing error code in omap_device_build()
  ARM: AM33xx: PRM: Remove am33xx_pwrdm_read_prev_pwrst function
  ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context
  ARM: dts: NSP: Fix PPI interrupt types
  ARM: dts: NSP: Disable AHCI controller for HR NSP boards
  ARM: dts: r8a779x: Add '#reset-cells' in cpg-mssr
  ...
This commit is contained in:
Olof Johansson 2017-12-03 19:39:40 -08:00
parent 4fbd8d194f 81faa55668
commit ee4c54d091
58 changed files with 234 additions and 178 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/usb/am33xx-usb.txt
View File

@ -95,6 +95,7 @@ usb: usb@47400000 {
reg = <0x47401300 0x100>;
reg-names = "phy";
ti,ctrl_mod = <&ctrl_mod>;
#phy-cells = <0>;
};
usb0: usb@47401000 {
@ -141,6 +142,7 @@ usb: usb@47400000 {
reg = <0x47401b00 0x100>;
reg-names = "phy";
ti,ctrl_mod = <&ctrl_mod>;
#phy-cells = <0>;
};
usb1: usb@47401800 {

2
MAINTAINERS
View File

@ -2046,7 +2046,7 @@ F: arch/arm/boot/dts/uniphier*
F: arch/arm/include/asm/hardware/cache-uniphier.h
F: arch/arm/mach-uniphier/
F: arch/arm/mm/cache-uniphier.c
F: arch/arm64/boot/dts/socionext/
F: arch/arm64/boot/dts/socionext/uniphier*
F: drivers/bus/uniphier-system-bus.c
F: drivers/clk/uniphier/
F: drivers/gpio/gpio-uniphier.c

2
arch/arm/boot/dts/am33xx.dtsi
View File

@ -630,6 +630,7 @@
reg-names = "phy";
status = "disabled";
ti,ctrl_mod = <&usb_ctrl_mod>;
#phy-cells = <0>;
};
usb0: usb@47401000 {
@ -678,6 +679,7 @@
reg-names = "phy";
status = "disabled";
ti,ctrl_mod = <&usb_ctrl_mod>;
#phy-cells = <0>;
};
usb1: usb@47401800 {

6
arch/arm/boot/dts/am4372.dtsi
View File

@ -927,7 +927,8 @@
reg = <0x48038000 0x2000>,
<0x46000000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <80>, <81>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 8 2>,
@ -941,7 +942,8 @@
reg = <0x4803C000 0x2000>,
<0x46400000 0x400000>;
reg-names = "mpu", "dat";
interrupts = <82>, <83>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
status = "disabled";
dmas = <&edma 10 2>,

4
arch/arm/boot/dts/am437x-cm-t43.dts
View File

@ -301,8 +301,8 @@
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
dmas = <&edma 16
&edma 17>;
dmas = <&edma 16 0
&edma 17 0>;
dma-names = "tx0", "rx0";
flash: w25q64cvzpig@0 {

1
arch/arm/boot/dts/armada-385-db-ap.dts
View File

@ -236,6 +236,7 @@
usb3_phy: usb3_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_xhci0_vbus>;
#phy-cells = <0>;
};
reg_xhci0_vbus: xhci0-vbus {

1
arch/arm/boot/dts/armada-385-linksys.dtsi
View File

@ -66,6 +66,7 @@
usb3_1_phy: usb3_1-phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&usb3_1_vbus>;
#phy-cells = <0>;
};
usb3_1_vbus: usb3_1-vbus {

2
arch/arm/boot/dts/armada-385-synology-ds116.dts
View File

@ -191,11 +191,13 @@
usb3_0_phy: usb3_0_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_0_vbus>;
#phy-cells = <0>;
};
usb3_1_phy: usb3_1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_1_vbus>;
#phy-cells = <0>;
};
reg_usb3_0_vbus: usb3-vbus0 {

2
arch/arm/boot/dts/armada-388-gp.dts
View File

@ -276,11 +276,13 @@
usb2_1_phy: usb2_1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb2_1_vbus>;
#phy-cells = <0>;
};
usb3_phy: usb3_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_usb3_vbus>;
#phy-cells = <0>;
};
reg_usb3_vbus: usb3-vbus {

4
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -85,7 +85,7 @@
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
clocks = <&periph_clk>;
};
@ -93,7 +93,7 @@
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
IRQ_TYPE_EDGE_RISING)>;
clocks = <&periph_clk>;
};

1
arch/arm/boot/dts/bcm283x.dtsi
View File

@ -639,5 +639,6 @@
usbphy: phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
};

4
arch/arm/boot/dts/bcm958623hr.dts
View File

@ -141,10 +141,6 @@
status = "okay";
};
&sata {
status = "okay";
};
&qspi {
bspi-sel = <0>;
flash: m25p80@0 {

4
arch/arm/boot/dts/bcm958625hr.dts
View File

@ -177,10 +177,6 @@
status = "okay";
};
&sata {
status = "okay";
};
&srab {
compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
status = "okay";

1
arch/arm/boot/dts/dm814x.dtsi
View File

@ -75,6 +75,7 @@
reg = <0x47401300 0x100>;
reg-names = "phy";
ti,ctrl_mod = <&usb_ctrl_mod>;
#phy-cells = <0>;
};
usb0: usb@47401000 {

9
arch/arm/boot/dts/imx53.dtsi
View File

@ -433,15 +433,6 @@
clock-names = "ipg", "per";
};
srtc: srtc@53fa4000 {
compatible = "fsl,imx53-rtc", "fsl,imx25-rtc";
reg = <0x53fa4000 0x4000>;
interrupts = <24>;
interrupt-parent = <&tzic>;
clocks = <&clks IMX5_CLK_SRTC_GATE>;
clock-names = "ipg";
};
iomuxc: iomuxc@53fa8000 {
compatible = "fsl,imx53-iomuxc";
reg = <0x53fa8000 0x4000>;

3
arch/arm/boot/dts/logicpd-som-lv-37xx-devkit.dts
View File

@ -72,7 +72,8 @@
};
&gpmc {
ranges = <1 0 0x08000000 0x1000000>; /* CS1: 16MB for LAN9221 */
ranges = <0 0 0x30000000 0x1000000 /* CS0: 16MB for NAND */
1 0 0x2c000000 0x1000000>; /* CS1: 16MB for LAN9221 */
ethernet@gpmc {
pinctrl-names = "default";

17
arch/arm/boot/dts/logicpd-som-lv.dtsi
View File

@ -33,11 +33,12 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
#phy-cells = <0>;
};
};
&gpmc {
ranges = <0 0 0x00000000 0x1000000>; /* CS0: 16MB for NAND */
ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
nand@0,0 {
compatible = "ti,omap2-nand";
@ -121,7 +122,7 @@
&mmc3 {
interrupts-extended = <&intc 94 &omap3_pmx_core2 0x46>;
pinctrl-0 = <&mmc3_pins>;
pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
pinctrl-names = "default";
vmmc-supply = <&wl12xx_vmmc>;
non-removable;
@ -132,8 +133,8 @@
wlcore: wlcore@2 {
compatible = "ti,wl1273";
reg = <2>;
interrupt-parent = <&gpio5>;
interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */
interrupt-parent = <&gpio1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; /* gpio 2 */
ref-clock-frequency = <26000000>;
};
};
@ -157,8 +158,6 @@
OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
OMAP3_CORE1_IOPAD(0x2184, PIN_INPUT_PULLUP | MUX_MODE4) /* mcbsp4_clkx.gpio_152 */
OMAP3_CORE1_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
>;
@ -228,6 +227,12 @@
OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
>;
};
wl127x_gpio: pinmux_wl127x_gpio_pin {
pinctrl-single,pins = <
OMAP3_WKUP_IOPAD(0x2a0c, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
>;
};
};
&omap3_pmx_core2 {

1
arch/arm/boot/dts/omap3-beagle-xm.dts
View File

@ -90,6 +90,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
tfp410: encoder0 {

1
arch/arm/boot/dts/omap3-beagle.dts
View File

@ -64,6 +64,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio5 19 GPIO_ACTIVE_LOW>; /* gpio_147 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
sound {

2
arch/arm/boot/dts/omap3-cm-t3x.dtsi
View File

@ -43,12 +43,14 @@
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&hsusb1_power>;
#phy-cells = <0>;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
ads7846reg: ads7846-reg {

1
arch/arm/boot/dts/omap3-evm-common.dtsi
View File

@ -29,6 +29,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; /* gpio_21 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
leds {

1
arch/arm/boot/dts/omap3-gta04.dtsi
View File

@ -120,6 +120,7 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
#phy-cells = <0>;
};
tv0: connector {

1
arch/arm/boot/dts/omap3-igep0020-common.dtsi
View File

@ -58,6 +58,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; /* gpio_24 */
vcc-supply = <&hsusb1_power>;
#phy-cells = <0>;
};
tfp410: encoder {

1
arch/arm/boot/dts/omap3-igep0030-common.dtsi
View File

@ -37,6 +37,7 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>; /* gpio_54 */
#phy-cells = <0>;
};
};

1
arch/arm/boot/dts/omap3-lilly-a83x.dtsi
View File

@ -51,6 +51,7 @@
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
vcc-supply = <&reg_vcc3>;
#phy-cells = <0>;
};
};

1
arch/arm/boot/dts/omap3-overo-base.dtsi
View File

@ -51,6 +51,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>; /* gpio_183 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
/* Regulator to trigger the nPoweron signal of the Wifi module */

1
arch/arm/boot/dts/omap3-pandora-common.dtsi
View File

@ -205,6 +205,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; /* GPIO_16 */
vcc-supply = <&vaux2>;
#phy-cells = <0>;
};
/* HS USB Host VBUS supply

1
arch/arm/boot/dts/omap3-tao3530.dtsi
View File

@ -46,6 +46,7 @@
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio6 2 GPIO_ACTIVE_LOW>; /* gpio_162 */
vcc-supply = <&hsusb2_power>;
#phy-cells = <0>;
};
sound {

1
arch/arm/boot/dts/omap3.dtsi
View File

@ -715,6 +715,7 @@
compatible = "ti,ohci-omap3";
reg = <0x48064400 0x400>;
interrupts = <76>;
remote-wakeup-connected;
};
usbhsehci: ehci@48064800 {

1
arch/arm/boot/dts/omap4-droid4-xt894.dts
View File

@ -73,6 +73,7 @@
/* HS USB Host PHY on PORT 1 */
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
#phy-cells = <0>;
};
/* LCD regulator from sw5 source */

1
arch/arm/boot/dts/omap4-duovero.dtsi
View File

@ -43,6 +43,7 @@
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
#phy-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&hsusb1phy_pins>;

1
arch/arm/boot/dts/omap4-panda-common.dtsi
View File

@ -89,6 +89,7 @@
hsusb1_phy: hsusb1_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>; /* gpio_62 */
#phy-cells = <0>;
vcc-supply = <&hsusb1_power>;
clocks = <&auxclk3_ck>;
clock-names = "main_clk";

1
arch/arm/boot/dts/omap4-var-som-om44.dtsi
View File

@ -44,6 +44,7 @@
reset-gpios = <&gpio6 17 GPIO_ACTIVE_LOW>; /* gpio 177 */
vcc-supply = <&vbat>;
#phy-cells = <0>;
clocks = <&auxclk3_ck>;
clock-names = "main_clk";

3
arch/arm/boot/dts/omap4.dtsi
View File

@ -1081,14 +1081,13 @@
usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
remote-wakeup-connected;
};
usbhsehci: ehci@4a064c00 {
compatible = "ti,ehci-omap";
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
};

2
arch/arm/boot/dts/omap5-board-common.dtsi
View File

@ -73,12 +73,14 @@
clocks = <&auxclk1_ck>;
clock-names = "main_clk";
clock-frequency = <19200000>;
#phy-cells = <0>;
};
/* HS USB Host PHY on PORT 3 */
hsusb3_phy: hsusb3_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio3 15 GPIO_ACTIVE_LOW>; /* gpio3_79 ETH_NRESET */
#phy-cells = <0>;
};
tpd12s015: encoder {

2
arch/arm/boot/dts/omap5-cm-t54.dts
View File

@ -63,12 +63,14 @@
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio3 12 GPIO_ACTIVE_LOW>; /* gpio3_76 HUB_RESET */
#phy-cells = <0>;
};
/* HS USB Host PHY on PORT 3 */
hsusb3_phy: hsusb3_phy {
compatible = "usb-nop-xceiv";
reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; /* gpio3_83 ETH_RESET */
#phy-cells = <0>;
};
leds {

1
arch/arm/boot/dts/omap5.dtsi
View File

@ -940,6 +940,7 @@
compatible = "ti,ohci-omap3";
reg = <0x4a064800 0x400>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
remote-wakeup-connected;
};
usbhsehci: ehci@4a064c00 {

1
arch/arm/boot/dts/r8a7790.dtsi
View File

@ -1201,6 +1201,7 @@
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
prr: chipid@ff000044 {

1
arch/arm/boot/dts/r8a7792.dtsi
View File

@ -829,6 +829,7 @@
clock-names = "extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
};

1
arch/arm/boot/dts/r8a7793.dtsi
View File

@ -1088,6 +1088,7 @@
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
rst: reset-controller@e6160000 {

1
arch/arm/boot/dts/r8a7794.dtsi
View File

@ -1099,6 +1099,7 @@
clock-names = "extal", "usb_extal";
#clock-cells = <2>;
#power-domain-cells = <0>;
#reset-cells = <1>;
};
rst: reset-controller@e6160000 {

2
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
View File

@ -359,7 +359,7 @@
};
&i2c1 {
at24mac602@0 {
at24mac602@50 {
compatible = "atmel,24c02";
reg = <0x50>;
read-only;

6
arch/arm/mach-omap2/cm_common.c
View File

@ -68,14 +68,17 @@ void __init omap2_set_globals_cm(void __iomem *cm, void __iomem *cm2)
int cm_split_idlest_reg(struct clk_omap_reg *idlest_reg, s16 *prcm_inst,
u8 *idlest_reg_id)
{
int ret;
if (!cm_ll_data->split_idlest_reg) {
WARN_ONCE(1, "cm: %s: no low-level function defined\n",
__func__);
return -EINVAL;
}
return cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
ret = cm_ll_data->split_idlest_reg(idlest_reg, prcm_inst,
idlest_reg_id);
*prcm_inst -= cm_base.offset;
return ret;
}
/**
@ -337,6 +340,7 @@ int __init omap2_cm_base_init(void)
if (mem) {
mem->pa = res.start + data->offset;
mem->va = data->mem + data->offset;
mem->offset = data->offset;
}
data->np = np;

19
arch/arm/mach-omap2/omap-secure.c
View File

@ -73,6 +73,25 @@ phys_addr_t omap_secure_ram_mempool_base(void)
return omap_secure_memblock_base;
}
u32 omap3_save_secure_ram(void __iomem *addr, int size)
{
u32 ret;
u32 param[5];
if (size != OMAP3_SAVE_SECURE_RAM_SZ)
return OMAP3_SAVE_SECURE_RAM_SZ;
param[0] = 4; /* Number of arguments */
param[1] = __pa(addr); /* Physical address for saving */
param[2] = 0;
param[3] = 1;
param[4] = 1;
ret = save_secure_ram_context(__pa(param));
return ret;
}
/**
* rx51_secure_dispatcher: Routine to dispatch secure PPA API calls
* @idx: The PPA API index

4
arch/arm/mach-omap2/omap-secure.h
View File

@ -31,6 +31,8 @@
/* Maximum Secure memory storage size */
#define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
#define OMAP3_SAVE_SECURE_RAM_SZ 0x803F
/* Secure low power HAL API index */
#define OMAP4_HAL_SAVESECURERAM_INDEX 0x1a
#define OMAP4_HAL_SAVEHW_INDEX 0x1b
@ -65,6 +67,8 @@ extern u32 omap_smc2(u32 id, u32 falg, u32 pargs);
extern u32 omap_smc3(u32 id, u32 process, u32 flag, u32 pargs);
extern phys_addr_t omap_secure_ram_mempool_base(void);
extern int omap_secure_ram_reserve_memblock(void);
extern u32 save_secure_ram_context(u32 args_pa);
extern u32 omap3_save_secure_ram(void __iomem *save_regs, int size);
extern u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs,
u32 arg1, u32 arg2, u32 arg3, u32 arg4);

10
arch/arm/mach-omap2/omap_device.c
View File

@ -391,10 +391,8 @@ omap_device_copy_resources(struct omap_hwmod *oh,
const char *name;
int error, irq = 0;
if (!oh || !oh->od || !oh->od->pdev) {
error = -EINVAL;
goto error;
}
if (!oh || !oh->od || !oh->od->pdev)
return -EINVAL;
np = oh->od->pdev->dev.of_node;
if (!np) {
@ -516,8 +514,10 @@ struct platform_device __init *omap_device_build(const char *pdev_name,
goto odbs_exit1;
od = omap_device_alloc(pdev, &oh, 1);
if (IS_ERR(od))
if (IS_ERR(od)) {
ret = PTR_ERR(od);
goto odbs_exit1;
}
ret = platform_device_add_data(pdev, pdata, pdata_len);
if (ret)

1
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -1646,6 +1646,7 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
.main_clk = "mmchs3_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP3430_EN_MMC3_SHIFT,
.idlest_reg_id = 1,

4
arch/arm/mach-omap2/pm.h
View File

@ -81,10 +81,6 @@ extern unsigned int omap3_do_wfi_sz;
/* ... and its pointer from SRAM after copy */
extern void (*omap3_do_wfi_sram)(void);
/* save_secure_ram_context function pointer and size, for copy to SRAM */
extern int save_secure_ram_context(u32 *addr);
extern unsigned int save_secure_ram_context_sz;
extern void omap3_save_scratchpad_contents(void);
#define PM_RTA_ERRATUM_i608 (1 << 0)

13
arch/arm/mach-omap2/pm34xx.c
View File

@ -48,6 +48,7 @@
#include "prm3xxx.h"
#include "pm.h"
#include "sdrc.h"
#include "omap-secure.h"
#include "sram.h"
#include "control.h"
#include "vc.h"
@ -66,7 +67,6 @@ struct power_state {
static LIST_HEAD(pwrst_list);
static int (*_omap_save_secure_sram)(u32 *addr);
void (*omap3_do_wfi_sram)(void);
static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
@ -121,8 +121,8 @@ static void omap3_save_secure_ram_context(void)
* will hang the system.
*/
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_ON);
ret = _omap_save_secure_sram((u32 *)(unsigned long)
__pa(omap3_secure_ram_storage));
ret = omap3_save_secure_ram(omap3_secure_ram_storage,
OMAP3_SAVE_SECURE_RAM_SZ);
pwrdm_set_next_pwrst(mpu_pwrdm, mpu_next_state);
/* Following is for error tracking, it should not happen */
if (ret) {
@ -434,15 +434,10 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
*
* The minimum set of functions is pushed to SRAM for execution:
* - omap3_do_wfi for erratum i581 WA,
* - save_secure_ram_context for security extensions.
*/
void omap_push_sram_idle(void)
{
omap3_do_wfi_sram = omap_sram_push(omap3_do_wfi, omap3_do_wfi_sz);
if (omap_type() != OMAP2_DEVICE_TYPE_GP)
_omap_save_secure_sram = omap_sram_push(save_secure_ram_context,
save_secure_ram_context_sz);
}
static void __init pm_errata_configure(void)
@ -553,7 +548,7 @@ int __init omap3_pm_init(void)
clkdm_add_wkdep(neon_clkdm, mpu_clkdm);
if (omap_type() != OMAP2_DEVICE_TYPE_GP) {
omap3_secure_ram_storage =
kmalloc(0x803F, GFP_KERNEL);
kmalloc(OMAP3_SAVE_SECURE_RAM_SZ, GFP_KERNEL);
if (!omap3_secure_ram_storage)
pr_err("Memory allocation failed when allocating for secure sram context\n");

1
arch/arm/mach-omap2/prcm-common.h
View File

@ -528,6 +528,7 @@ struct omap_prcm_irq_setup {
struct omap_domain_base {
u32 pa;
void __iomem *va;
s16 offset;
};
/**

12
arch/arm/mach-omap2/prm33xx.c
View File

@ -176,17 +176,6 @@ static int am33xx_pwrdm_read_pwrst(struct powerdomain *pwrdm)
return v;
}
static int am33xx_pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
{
u32 v;
v = am33xx_prm_read_reg(pwrdm->prcm_offs, pwrdm->pwrstst_offs);
v &= AM33XX_LASTPOWERSTATEENTERED_MASK;
v >>= AM33XX_LASTPOWERSTATEENTERED_SHIFT;
return v;
}
static int am33xx_pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm)
{
am33xx_prm_rmw_reg_bits(AM33XX_LOWPOWERSTATECHANGE_MASK,
@ -357,7 +346,6 @@ struct pwrdm_ops am33xx_pwrdm_operations = {
.pwrdm_set_next_pwrst = am33xx_pwrdm_set_next_pwrst,
.pwrdm_read_next_pwrst = am33xx_pwrdm_read_next_pwrst,
.pwrdm_read_pwrst = am33xx_pwrdm_read_pwrst,
.pwrdm_read_prev_pwrst = am33xx_pwrdm_read_prev_pwrst,
.pwrdm_set_logic_retst = am33xx_pwrdm_set_logic_retst,
.pwrdm_read_logic_pwrst = am33xx_pwrdm_read_logic_pwrst,
.pwrdm_read_logic_retst = am33xx_pwrdm_read_logic_retst,

26
arch/arm/mach-omap2/sleep34xx.S
View File

@ -93,20 +93,13 @@ ENTRY(enable_omap3630_toggle_l2_on_restore)
ENDPROC(enable_omap3630_toggle_l2_on_restore)
/*
* Function to call rom code to save secure ram context. This gets
* relocated to SRAM, so it can be all in .data section. Otherwise
* we need to initialize api_params separately.
* Function to call rom code to save secure ram context.
*
* r0 = physical address of the parameters
*/
.data
.align 3
ENTRY(save_secure_ram_context)
stmfd sp!, {r4 - r11, lr} @ save registers on stack
adr r3, api_params @ r3 points to parameters
str r0, [r3,#0x4] @ r0 has sdram address
ldr r12, high_mask
and r3, r3, r12
ldr r12, sram_phy_addr_mask
orr r3, r3, r12
mov r3, r0 @ physical address of parameters
mov r0, #25 @ set service ID for PPA
mov r12, r0 @ copy secure service ID in r12
mov r1, #0 @ set task id for ROM code in r1
@ -120,18 +113,7 @@ ENTRY(save_secure_ram_context)
nop
nop
ldmfd sp!, {r4 - r11, pc}
.align
sram_phy_addr_mask:
.word SRAM_BASE_P
high_mask:
.word 0xffff
api_params:
.word 0x4, 0x0, 0x0, 0x1, 0x1
ENDPROC(save_secure_ram_context)
ENTRY(save_secure_ram_context_sz)
.word . - save_secure_ram_context
.text
/*
* ======================

2
arch/arm64/boot/dts/Makefile
View File

@ -12,6 +12,7 @@ subdir-y += cavium
subdir-y += exynos
subdir-y += freescale
subdir-y += hisilicon
subdir-y += lg
subdir-y += marvell
subdir-y += mediatek
subdir-y += nvidia
@ -22,5 +23,4 @@ subdir-y += rockchip
subdir-y += socionext
subdir-y += sprd
subdir-y += xilinx
subdir-y += lg
subdir-y += zte

1
arch/arm64/boot/dts/socionext/uniphier-ld11-ref.dts
View File

@ -40,7 +40,6 @@
};
&ethsc {
interrupt-parent = <&gpio>;
interrupts = <0 8>;
};

1
arch/arm64/boot/dts/socionext/uniphier-ld20-ref.dts
View File

@ -40,7 +40,6 @@
};
&ethsc {
interrupt-parent = <&gpio>;
interrupts = <0 8>;
};

3
arch/arm64/boot/dts/socionext/uniphier-pxs3-ref.dts
View File

@ -38,8 +38,7 @@
};
&ethsc {
interrupt-parent = <&gpio>;
interrupts = <0 8>;
interrupts = <4 8>;
};
&serial0 {

212
drivers/firmware/arm_scpi.c
View File

@ -28,7 +28,6 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/bitmap.h>
#include <linux/bitfield.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/export.h>
@ -73,13 +72,21 @@
#define MAX_DVFS_DOMAINS 8
#define MAX_DVFS_OPPS 16
#define DVFS_LATENCY(hdr) (le32_to_cpu(hdr) >> 16)
#define DVFS_OPP_COUNT(hdr) ((le32_to_cpu(hdr) >> 8) & 0xff)
#define PROTO_REV_MAJOR_MASK GENMASK(31, 16)
#define PROTO_REV_MINOR_MASK GENMASK(15, 0)
#define PROTOCOL_REV_MINOR_BITS 16
#define PROTOCOL_REV_MINOR_MASK ((1U << PROTOCOL_REV_MINOR_BITS) - 1)
#define PROTOCOL_REV_MAJOR(x) ((x) >> PROTOCOL_REV_MINOR_BITS)
#define PROTOCOL_REV_MINOR(x) ((x) & PROTOCOL_REV_MINOR_MASK)
#define FW_REV_MAJOR_MASK GENMASK(31, 24)
#define FW_REV_MINOR_MASK GENMASK(23, 16)
#define FW_REV_PATCH_MASK GENMASK(15, 0)
#define FW_REV_MAJOR_BITS 24
#define FW_REV_MINOR_BITS 16
#define FW_REV_PATCH_MASK ((1U << FW_REV_MINOR_BITS) - 1)
#define FW_REV_MINOR_MASK ((1U << FW_REV_MAJOR_BITS) - 1)
#define FW_REV_MAJOR(x) ((x) >> FW_REV_MAJOR_BITS)
#define FW_REV_MINOR(x) (((x) & FW_REV_MINOR_MASK) >> FW_REV_MINOR_BITS)
#define FW_REV_PATCH(x) ((x) & FW_REV_PATCH_MASK)
#define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
@ -304,6 +311,10 @@ struct clk_get_info {
u8 name[20];
} __packed;
struct clk_get_value {
__le32 rate;
} __packed;
struct clk_set_value {
__le16 id;
__le16 reserved;
@ -317,9 +328,7 @@ struct legacy_clk_set_value {
} __packed;
struct dvfs_info {
u8 domain;
u8 opp_count;
__le16 latency;
__le32 header;
struct {
__le32 freq;
__le32 m_volt;
@ -342,6 +351,11 @@ struct _scpi_sensor_info {
char name[20];
};
struct sensor_value {
__le32 lo_val;
__le32 hi_val;
} __packed;
struct dev_pstate_set {
__le16 dev_id;
u8 pstate;
@ -405,20 +419,19 @@ static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd)
unsigned int len;
if (scpi_info->is_legacy) {
struct legacy_scpi_shared_mem __iomem *mem =
ch->rx_payload;
struct legacy_scpi_shared_mem *mem = ch->rx_payload;
/* RX Length is not replied by the legacy Firmware */
len = match->rx_len;
match->status = ioread32(&mem->status);
match->status = le32_to_cpu(mem->status);
memcpy_fromio(match->rx_buf, mem->payload, len);
} else {
struct scpi_shared_mem __iomem *mem = ch->rx_payload;
struct scpi_shared_mem *mem = ch->rx_payload;
len = min(match->rx_len, CMD_SIZE(cmd));
match->status = ioread32(&mem->status);
match->status = le32_to_cpu(mem->status);
memcpy_fromio(match->rx_buf, mem->payload, len);
}
@ -432,11 +445,11 @@ static void scpi_process_cmd(struct scpi_chan *ch, u32 cmd)
static void scpi_handle_remote_msg(struct mbox_client *c, void *msg)
{
struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
struct scpi_shared_mem __iomem *mem = ch->rx_payload;
struct scpi_shared_mem *mem = ch->rx_payload;
u32 cmd = 0;
if (!scpi_info->is_legacy)
cmd = ioread32(&mem->command);
cmd = le32_to_cpu(mem->command);
scpi_process_cmd(ch, cmd);
}
@ -446,7 +459,7 @@ static void scpi_tx_prepare(struct mbox_client *c, void *msg)
unsigned long flags;
struct scpi_xfer *t = msg;
struct scpi_chan *ch = container_of(c, struct scpi_chan, cl);
struct scpi_shared_mem __iomem *mem = ch->tx_payload;
struct scpi_shared_mem *mem = (struct scpi_shared_mem *)ch->tx_payload;
if (t->tx_buf) {
if (scpi_info->is_legacy)
@ -465,7 +478,7 @@ static void scpi_tx_prepare(struct mbox_client *c, void *msg)
}
if (!scpi_info->is_legacy)
iowrite32(t->cmd, &mem->command);
mem->command = cpu_to_le32(t->cmd);
}
static struct scpi_xfer *get_scpi_xfer(struct scpi_chan *ch)
@ -570,13 +583,13 @@ scpi_clk_get_range(u16 clk_id, unsigned long *min, unsigned long *max)
static unsigned long scpi_clk_get_val(u16 clk_id)
{
int ret;
__le32 rate;
struct clk_get_value clk;
__le16 le_clk_id = cpu_to_le16(clk_id);
ret = scpi_send_message(CMD_GET_CLOCK_VALUE, &le_clk_id,
sizeof(le_clk_id), &rate, sizeof(rate));
sizeof(le_clk_id), &clk, sizeof(clk));
return ret ? ret : le32_to_cpu(rate);
return ret ? ret : le32_to_cpu(clk.rate);
}
static int scpi_clk_set_val(u16 clk_id, unsigned long rate)
@ -631,35 +644,35 @@ static int opp_cmp_func(const void *opp1, const void *opp2)
}
static struct scpi_dvfs_info *scpi_dvfs_get_info(u8 domain)
{
if (domain >= MAX_DVFS_DOMAINS)
return ERR_PTR(-EINVAL);
return scpi_info->dvfs[domain] ?: ERR_PTR(-EINVAL);
}
static int scpi_dvfs_populate_info(struct device *dev, u8 domain)
{
struct scpi_dvfs_info *info;
struct scpi_opp *opp;
struct dvfs_info buf;
int ret, i;
if (domain >= MAX_DVFS_DOMAINS)
return ERR_PTR(-EINVAL);
if (scpi_info->dvfs[domain]) /* data already populated */
return scpi_info->dvfs[domain];
ret = scpi_send_message(CMD_GET_DVFS_INFO, &domain, sizeof(domain),
&buf, sizeof(buf));
if (ret)
return ret;
return ERR_PTR(ret);
info = devm_kmalloc(dev, sizeof(*info), GFP_KERNEL);
info = kmalloc(sizeof(*info), GFP_KERNEL);
if (!info)
return -ENOMEM;
return ERR_PTR(-ENOMEM);
info->count = buf.opp_count;
info->latency = le16_to_cpu(buf.latency) * 1000; /* uS to nS */
info->count = DVFS_OPP_COUNT(buf.header);
info->latency = DVFS_LATENCY(buf.header) * 1000; /* uS to nS */
info->opps = devm_kcalloc(dev, info->count, sizeof(*opp), GFP_KERNEL);
if (!info->opps)
return -ENOMEM;
info->opps = kcalloc(info->count, sizeof(*opp), GFP_KERNEL);
if (!info->opps) {
kfree(info);
return ERR_PTR(-ENOMEM);
}
for (i = 0, opp = info->opps; i < info->count; i++, opp++) {
opp->freq = le32_to_cpu(buf.opps[i].freq);
@ -669,15 +682,7 @@ static int scpi_dvfs_populate_info(struct device *dev, u8 domain)
sort(info->opps, info->count, sizeof(*opp), opp_cmp_func, NULL);
scpi_info->dvfs[domain] = info;
return 0;
}
static void scpi_dvfs_populate(struct device *dev)
{
int domain;
for (domain = 0; domain < MAX_DVFS_DOMAINS; domain++)
scpi_dvfs_populate_info(dev, domain);
return info;
}
static int scpi_dev_domain_id(struct device *dev)
@ -708,6 +713,9 @@ static int scpi_dvfs_get_transition_latency(struct device *dev)
if (IS_ERR(info))
return PTR_ERR(info);
if (!info->latency)
return 0;
return info->latency;
}
@ -768,19 +776,20 @@ static int scpi_sensor_get_info(u16 sensor_id, struct scpi_sensor_info *info)
static int scpi_sensor_get_value(u16 sensor, u64 *val)
{
__le16 id = cpu_to_le16(sensor);
__le64 value;
struct sensor_value buf;
int ret;
ret = scpi_send_message(CMD_SENSOR_VALUE, &id, sizeof(id),
&value, sizeof(value));
&buf, sizeof(buf));
if (ret)
return ret;
if (scpi_info->is_legacy)
/* only 32-bits supported, upper 32 bits can be junk */
*val = le32_to_cpup((__le32 *)&value);
/* only 32-bits supported, hi_val can be junk */
*val = le32_to_cpu(buf.lo_val);
else
*val = le64_to_cpu(value);
*val = (u64)le32_to_cpu(buf.hi_val) << 32 |
le32_to_cpu(buf.lo_val);
return 0;
}
@ -853,19 +862,23 @@ static int scpi_init_versions(struct scpi_drvinfo *info)
static ssize_t protocol_version_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%lu.%lu\n",
FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version),
FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version));
struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
return sprintf(buf, "%d.%d\n",
PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
PROTOCOL_REV_MINOR(scpi_info->protocol_version));
}
static DEVICE_ATTR_RO(protocol_version);
static ssize_t firmware_version_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
return sprintf(buf, "%lu.%lu.%lu\n",
FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version),
FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version),
FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version));
struct scpi_drvinfo *scpi_info = dev_get_drvdata(dev);
return sprintf(buf, "%d.%d.%d\n",
FW_REV_MAJOR(scpi_info->firmware_version),
FW_REV_MINOR(scpi_info->firmware_version),
FW_REV_PATCH(scpi_info->firmware_version));
}
static DEVICE_ATTR_RO(firmware_version);
@ -876,13 +889,39 @@ static struct attribute *versions_attrs[] = {
};
ATTRIBUTE_GROUPS(versions);
static void scpi_free_channels(void *data)
static void
scpi_free_channels(struct device *dev, struct scpi_chan *pchan, int count)
{
struct scpi_drvinfo *info = data;
int i;
for (i = 0; i < info->num_chans; i++)
mbox_free_channel(info->channels[i].chan);
for (i = 0; i < count && pchan->chan; i++, pchan++) {
mbox_free_channel(pchan->chan);
devm_kfree(dev, pchan->xfers);
devm_iounmap(dev, pchan->rx_payload);
}
}
static int scpi_remove(struct platform_device *pdev)
{
int i;
struct device *dev = &pdev->dev;
struct scpi_drvinfo *info = platform_get_drvdata(pdev);
scpi_info = NULL; /* stop exporting SCPI ops through get_scpi_ops */
of_platform_depopulate(dev);
sysfs_remove_groups(&dev->kobj, versions_groups);
scpi_free_channels(dev, info->channels, info->num_chans);
platform_set_drvdata(pdev, NULL);
for (i = 0; i < MAX_DVFS_DOMAINS && info->dvfs[i]; i++) {
kfree(info->dvfs[i]->opps);
kfree(info->dvfs[i]);
}
devm_kfree(dev, info->channels);
devm_kfree(dev, info);
return 0;
}
#define MAX_SCPI_XFERS 10
@ -913,6 +952,7 @@ static int scpi_probe(struct platform_device *pdev)
{
int count, idx, ret;
struct resource res;
struct scpi_chan *scpi_chan;
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
@ -929,19 +969,13 @@ static int scpi_probe(struct platform_device *pdev)
return -ENODEV;
}
scpi_info->channels = devm_kcalloc(dev, count, sizeof(struct scpi_chan),
GFP_KERNEL);
if (!scpi_info->channels)
scpi_chan = devm_kcalloc(dev, count, sizeof(*scpi_chan), GFP_KERNEL);
if (!scpi_chan)
return -ENOMEM;
ret = devm_add_action(dev, scpi_free_channels, scpi_info);
if (ret)
return ret;
for (; scpi_info->num_chans < count; scpi_info->num_chans++) {
for (idx = 0; idx < count; idx++) {
resource_size_t size;
int idx = scpi_info->num_chans;
struct scpi_chan *pchan = scpi_info->channels + idx;
struct scpi_chan *pchan = scpi_chan + idx;
struct mbox_client *cl = &pchan->cl;
struct device_node *shmem = of_parse_phandle(np, "shmem", idx);
@ -949,14 +983,15 @@ static int scpi_probe(struct platform_device *pdev)
of_node_put(shmem);
if (ret) {
dev_err(dev, "failed to get SCPI payload mem resource\n");
return ret;
goto err;
}
size = resource_size(&res);
pchan->rx_payload = devm_ioremap(dev, res.start, size);
if (!pchan->rx_payload) {
dev_err(dev, "failed to ioremap SCPI payload\n");
return -EADDRNOTAVAIL;
ret = -EADDRNOTAVAIL;
goto err;
}
pchan->tx_payload = pchan->rx_payload + (size >> 1);
@ -982,11 +1017,17 @@ static int scpi_probe(struct platform_device *pdev)
dev_err(dev, "failed to get channel%d err %d\n",
idx, ret);
}
err:
scpi_free_channels(dev, scpi_chan, idx);
scpi_info = NULL;
return ret;
}
scpi_info->channels = scpi_chan;
scpi_info->num_chans = count;
scpi_info->commands = scpi_std_commands;
scpi_info->scpi_ops = &scpi_ops;
platform_set_drvdata(pdev, scpi_info);
if (scpi_info->is_legacy) {
/* Replace with legacy variants */
@ -1002,23 +1043,23 @@ static int scpi_probe(struct platform_device *pdev)
ret = scpi_init_versions(scpi_info);
if (ret) {
dev_err(dev, "incorrect or no SCP firmware found\n");
scpi_remove(pdev);
return ret;
}
scpi_dvfs_populate(dev);
_dev_info(dev, "SCP Protocol %d.%d Firmware %d.%d.%d version\n",
PROTOCOL_REV_MAJOR(scpi_info->protocol_version),
PROTOCOL_REV_MINOR(scpi_info->protocol_version),
FW_REV_MAJOR(scpi_info->firmware_version),
FW_REV_MINOR(scpi_info->firmware_version),
FW_REV_PATCH(scpi_info->firmware_version));
scpi_info->scpi_ops = &scpi_ops;
_dev_info(dev, "SCP Protocol %lu.%lu Firmware %lu.%lu.%lu version\n",
FIELD_GET(PROTO_REV_MAJOR_MASK, scpi_info->protocol_version),
FIELD_GET(PROTO_REV_MINOR_MASK, scpi_info->protocol_version),
FIELD_GET(FW_REV_MAJOR_MASK, scpi_info->firmware_version),
FIELD_GET(FW_REV_MINOR_MASK, scpi_info->firmware_version),
FIELD_GET(FW_REV_PATCH_MASK, scpi_info->firmware_version));
ret = devm_device_add_groups(dev, versions_groups);
ret = sysfs_create_groups(&dev->kobj, versions_groups);
if (ret)
dev_err(dev, "unable to create sysfs version group\n");
return devm_of_platform_populate(dev);
return of_platform_populate(dev->of_node, NULL, NULL, dev);
}
static const struct of_device_id scpi_of_match[] = {
@ -1035,6 +1076,7 @@ static struct platform_driver scpi_driver = {
.of_match_table = scpi_of_match,
},
.probe = scpi_probe,
.remove = scpi_remove,
};
module_platform_driver(scpi_driver);

1
drivers/tee/optee/core.c
View File

@ -590,7 +590,6 @@ static int __init optee_driver_init(void)
return -ENODEV;
np = of_find_matching_node(fw_np, optee_match);
of_node_put(fw_np);
if (!np)
return -ENODEV;