[SCSI] hptiop: HighPoint RocketRAID 3xxx controller driver
HighPoint RocketRAID 3220/3320 series 8 channel PCI-X SATA RAID Host Adapters. Fixes from original submission: Merge Andrew Morton's patches: - Provide locking for global list - Fix debug printks - uninline function with multiple callsites - coding style fixups - remove unneeded casts of void* - kfree(NULL) is legal - Don't "succeed" if register_chrdev() failed - otherwise we'll later unregister a not-registered chrdev. - Don't return from hptiop_do_ioctl() with the spinlock held. - uninline __hpt_do_ioctl() Update for Arjan van de Ven's comments: - put all asm/ includes after the linux/ ones - replace mdelay with msleep - add pci posting flush - do not set pci command reqister in map_pci_bar - do not try merging sg elements in hptiop_buildsgl() - remove unused outstandingcommands member from hba structure - remove unimplemented hptiop_abort() handler - remove typedef u32 hpt_id_t Other updates: - fix endianess Signed-off-by: HighPoint Linux Team <linux@highpoint-tech.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
This commit is contained in:
HighPoint Linux Team
James Bottomley
parent
cbd5f69b98
commit
ede1e6f8b4
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@ -0,0 +1,92 @@
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HIGHPOINT ROCKETRAID 3xxx RAID DRIVER (hptiop)
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Controller Register Map
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-------------------------
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The controller IOP is accessed via PCI BAR0.
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BAR0 offset Register
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0x10 Inbound Message Register 0
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0x14 Inbound Message Register 1
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0x18 Outbound Message Register 0
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0x1C Outbound Message Register 1
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0x20 Inbound Doorbell Register
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0x24 Inbound Interrupt Status Register
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0x28 Inbound Interrupt Mask Register
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0x30 Outbound Interrupt Status Register
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0x34 Outbound Interrupt Mask Register
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0x40 Inbound Queue Port
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0x44 Outbound Queue Port
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I/O Request Workflow
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----------------------
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All queued requests are handled via inbound/outbound queue port.
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A request packet can be allocated in either IOP or host memory.
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To send a request to the controller:
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- Get a free request packet by reading the inbound queue port or
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allocate a free request in host DMA coherent memory.
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The value returned from the inbound queue port is an offset
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relative to the IOP BAR0.
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Requests allocated in host memory must be aligned on 32-bytes boundary.
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- Fill the packet.
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- Post the packet to IOP by writing it to inbound queue. For requests
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allocated in IOP memory, write the offset to inbound queue port. For
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requests allocated in host memory, write (0x80000000|(bus_addr>>5))
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to the inbound queue port.
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- The IOP process the request. When the request is completed, it
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will be put into outbound queue. An outbound interrupt will be
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generated.
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For requests allocated in IOP memory, the request offset is posted to
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outbound queue.
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For requests allocated in host memory, (0x80000000|(bus_addr>>5))
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is posted to the outbound queue. If IOP_REQUEST_FLAG_OUTPUT_CONTEXT
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flag is set in the request, the low 32-bit context value will be
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posted instead.
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- The host read the outbound queue and complete the request.
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For requests allocated in IOP memory, the host driver free the request
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by writing it to the outbound queue.
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Non-queued requests (reset/flush etc) can be sent via inbound message
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register 0. An outbound message with the same value indicates the completion
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of an inbound message.
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User-level Interface
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---------------------
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The driver exposes following sysfs attributes:
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NAME R/W Description
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driver-version R driver version string
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firmware-version R firmware version string
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The driver registers char device "hptiop" to communicate with HighPoint RAID
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management software. Its ioctl routine acts as a general binary interface
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between the IOP firmware and HighPoint RAID management software. New management
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functions can be implemented in application/firmware without modification
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in driver code.
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-----------------------------------------------------------------------------
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Copyright (C) 2006 HighPoint Technologies, Inc. All Rights Reserved.
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This file is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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linux@highpoint-tech.com
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http://www.highpoint-tech.com
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@ -1117,6 +1117,12 @@ L: linux-hams@vger.kernel.org
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W: http://www.nt.tuwien.ac.at/~kkudielk/Linux/
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S: Maintained
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HIGHPOINT ROCKETRAID 3xxx RAID DRIVER
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P: HighPoint Linux Team
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M: linux@highpoint-tech.com
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W: http://www.highpoint-tech.com
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S: Supported
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HIPPI
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P: Jes Sorensen
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M: jes@trained-monkey.org
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@ -530,6 +530,16 @@ config SCSI_PDC_ADMA
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If unsure, say N.
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config SCSI_HPTIOP
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tristate "HighPoint RocketRAID 3xxx Controller support"
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depends on SCSI && PCI
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help
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This option enables support for HighPoint RocketRAID 3xxx
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controllers.
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To compile this driver as a module, choose M here; the module
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will be called hptiop. If unsure, say N.
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config SCSI_SATA_QSTOR
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tristate "Pacific Digital SATA QStor support"
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depends on SCSI_SATA && PCI
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@ -136,6 +136,7 @@ obj-$(CONFIG_SCSI_SATA_NV) += libata.o sata_nv.o
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obj-$(CONFIG_SCSI_SATA_ULI) += libata.o sata_uli.o
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obj-$(CONFIG_SCSI_SATA_MV) += libata.o sata_mv.o
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obj-$(CONFIG_SCSI_PDC_ADMA) += libata.o pdc_adma.o
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obj-$(CONFIG_SCSI_HPTIOP) += hptiop.o
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obj-$(CONFIG_ARM) += arm/
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File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,465 @@
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/*
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* HighPoint RR3xxx controller driver for Linux
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* Copyright (C) 2006 HighPoint Technologies, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Please report bugs/comments/suggestions to linux@highpoint-tech.com
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*
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* For more information, visit http://www.highpoint-tech.com
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*/
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#ifndef _HPTIOP_H_
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#define _HPTIOP_H_
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/*
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* logical device type.
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* Identify array (logical device) and physical device.
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*/
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#define LDT_ARRAY 1
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#define LDT_DEVICE 2
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/*
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* Array types
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*/
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#define AT_UNKNOWN 0
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#define AT_RAID0 1
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#define AT_RAID1 2
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#define AT_RAID5 3
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#define AT_RAID6 4
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#define AT_JBOD 7
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#define MAX_NAME_LENGTH 36
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#define MAX_ARRAYNAME_LEN 16
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#define MAX_ARRAY_MEMBERS_V1 8
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#define MAX_ARRAY_MEMBERS_V2 16
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/* keep definition for source code compatiblity */
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#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1
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/*
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* array flags
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*/
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#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */
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#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* need to be rebuilt */
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#define ARRAY_FLAG_REBUILDING 0x00000004 /* in rebuilding process */
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#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but still working */
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#define ARRAY_FLAG_BOOTDISK 0x00000010 /* has a active partition */
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#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */
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#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */
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#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */
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#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */
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#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* tranform in progress */
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#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need tranform */
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#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* initialization not done */
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#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant */
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/*
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* device flags
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*/
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#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */
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#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized */
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#define DEVICE_FLAG_LEGACY 0x00020000 /* lagacy drive */
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#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */
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/*
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* ioctl codes
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*/
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#define HPT_CTL_CODE(x) (x+0xFF00)
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#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00)
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#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2)
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#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3)
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#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4)
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#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19)
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#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46)
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#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47)
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/*
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* Controller information.
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*/
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struct hpt_controller_info {
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u8 chip_type; /* chip type */
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u8 interrupt_level; /* IRQ level */
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u8 num_buses; /* bus count */
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u8 chip_flags;
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u8 product_id[MAX_NAME_LENGTH];/* product name */
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u8 vendor_id[MAX_NAME_LENGTH]; /* vendor name */
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}
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__attribute__((packed));
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/*
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* Channel information.
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*/
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struct hpt_channel_info {
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__le32 io_port; /* IDE Base Port Address */
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__le32 control_port; /* IDE Control Port Address */
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__le32 devices[2]; /* device connected to this channel */
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}
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__attribute__((packed));
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/*
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* Array information.
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*/
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struct hpt_array_info_v3 {
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u8 name[MAX_ARRAYNAME_LEN]; /* array name */
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u8 description[64]; /* array description */
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u8 create_manager[16]; /* who created it */
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__le32 create_time; /* when created it */
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u8 array_type; /* array type */
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u8 block_size_shift; /* stripe size */
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u8 ndisk; /* Number of ID in Members[] */
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u8 reserved;
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__le32 flags; /* working flags, see ARRAY_FLAG_XXX */
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__le32 members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */
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__le32 rebuilding_progress;
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__le64 rebuilt_sectors; /* rebuilding point (LBA) for single member */
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__le32 transform_source;
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__le32 transform_target; /* destination device ID */
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__le32 transforming_progress;
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__le32 signature; /* persistent identification*/
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__le16 critical_members; /* bit mask of critical members */
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__le16 reserve2;
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__le32 reserve;
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}
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__attribute__((packed));
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/*
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* physical device information.
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*/
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#define MAX_PARENTS_PER_DISK 8
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struct hpt_device_info_v2 {
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u8 ctlr_id; /* controller id */
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u8 path_id; /* bus */
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u8 target_id; /* id */
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u8 device_mode_setting; /* Current Data Transfer mode: 0-4 PIO0-4 */
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/* 5-7 MW DMA0-2, 8-13 UDMA0-5 */
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u8 device_type; /* device type */
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u8 usable_mode; /* highest usable mode */
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#ifdef __BIG_ENDIAN_BITFIELD
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u8 NCQ_enabled: 1;
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u8 NCQ_supported: 1;
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u8 TCQ_enabled: 1;
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u8 TCQ_supported: 1;
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u8 write_cache_enabled: 1;
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u8 write_cache_supported: 1;
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u8 read_ahead_enabled: 1;
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u8 read_ahead_supported: 1;
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u8 reserved6: 6;
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u8 spin_up_mode: 2;
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#else
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u8 read_ahead_supported: 1;
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u8 read_ahead_enabled: 1;
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u8 write_cache_supported: 1;
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u8 write_cache_enabled: 1;
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u8 TCQ_supported: 1;
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u8 TCQ_enabled: 1;
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u8 NCQ_supported: 1;
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u8 NCQ_enabled: 1;
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u8 spin_up_mode: 2;
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u8 reserved6: 6;
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#endif
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__le32 flags; /* working flags, see DEVICE_FLAG_XXX */
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u8 ident[150]; /* (partitial) Identify Data of this device */
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__le64 total_free;
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__le64 max_free;
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__le64 bad_sectors;
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__le32 parent_arrays[MAX_PARENTS_PER_DISK];
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}
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__attribute__((packed));
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/*
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* Logical device information.
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*/
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#define INVALID_TARGET_ID 0xFF
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#define INVALID_BUS_ID 0xFF
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struct hpt_logical_device_info_v3 {
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u8 type; /* LDT_ARRAY or LDT_DEVICE */
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u8 cache_policy; /* refer to CACHE_POLICY_xxx */
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u8 vbus_id; /* vbus sequence in vbus_list */
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u8 target_id; /* OS target id. 0xFF is invalid */
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/* OS name: DISK $VBusId_$TargetId */
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__le64 capacity; /* array capacity */
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__le32 parent_array; /* don't use this field for physical
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device. use ParentArrays field in
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hpt_device_info_v2 */
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/* reserved statistic fields */
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__le32 stat1;
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__le32 stat2;
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__le32 stat3;
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__le32 stat4;
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union {
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struct hpt_array_info_v3 array;
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struct hpt_device_info_v2 device;
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} __attribute__((packed)) u;
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}
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__attribute__((packed));
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/*
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* ioctl structure
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*/
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#define HPT_IOCTL_MAGIC 0xA1B2C3D4
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struct hpt_ioctl_u {
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u32 magic; /* used to check if it's a valid ioctl packet */
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u32 ioctl_code; /* operation control code */
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void __user *inbuf; /* input data buffer */
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u32 inbuf_size; /* size of input data buffer */
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void __user *outbuf; /* output data buffer */
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u32 outbuf_size; /* size of output data buffer */
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void __user *bytes_returned; /* count of bytes returned */
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}
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__attribute__((packed));
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struct hpt_iopmu
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{
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__le32 resrved0[4];
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__le32 inbound_msgaddr0;
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__le32 inbound_msgaddr1;
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__le32 outbound_msgaddr0;
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__le32 outbound_msgaddr1;
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__le32 inbound_doorbell;
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__le32 inbound_intstatus;
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__le32 inbound_intmask;
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__le32 outbound_doorbell;
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__le32 outbound_intstatus;
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__le32 outbound_intmask;
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__le32 reserved1[2];
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__le32 inbound_queue;
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__le32 outbound_queue;
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};
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#define IOPMU_QUEUE_EMPTY 0xffffffff
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#define IOPMU_QUEUE_MASK_HOST_BITS 0xf0000000
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#define IOPMU_QUEUE_ADDR_HOST_BIT 0x80000000
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#define IOPMU_OUTBOUND_INT_MSG0 1
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#define IOPMU_OUTBOUND_INT_MSG1 2
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#define IOPMU_OUTBOUND_INT_DOORBELL 4
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#define IOPMU_OUTBOUND_INT_POSTQUEUE 8
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#define IOPMU_OUTBOUND_INT_PCI 0x10
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#define IOPMU_INBOUND_INT_MSG0 1
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#define IOPMU_INBOUND_INT_MSG1 2
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#define IOPMU_INBOUND_INT_DOORBELL 4
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#define IOPMU_INBOUND_INT_ERROR 8
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#define IOPMU_INBOUND_INT_POSTQUEUE 0x10
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enum hpt_iopmu_message {
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/* host-to-iop messages */
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IOPMU_INBOUND_MSG0_NOP = 0,
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IOPMU_INBOUND_MSG0_RESET,
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IOPMU_INBOUND_MSG0_FLUSH,
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IOPMU_INBOUND_MSG0_SHUTDOWN,
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IOPMU_INBOUND_MSG0_STOP_BACKGROUND_TASK,
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IOPMU_INBOUND_MSG0_START_BACKGROUND_TASK,
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IOPMU_INBOUND_MSG0_MAX = 0xff,
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/* iop-to-host messages */
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IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_0 = 0x100,
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IOPMU_OUTBOUND_MSG0_REGISTER_DEVICE_MAX = 0x1ff,
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IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_0 = 0x200,
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IOPMU_OUTBOUND_MSG0_UNREGISTER_DEVICE_MAX = 0x2ff,
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IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_0 = 0x300,
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IOPMU_OUTBOUND_MSG0_REVALIDATE_DEVICE_MAX = 0x3ff,
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};
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struct hpt_iop_request_header
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{
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__le32 size;
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__le32 type;
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__le32 flags;
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__le32 result;
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__le32 context; /* host context */
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__le32 context_hi32;
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};
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#define IOP_REQUEST_FLAG_SYNC_REQUEST 1
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#define IOP_REQUEST_FLAG_BIST_REQUEST 2
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#define IOP_REQUEST_FLAG_REMAPPED 4
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#define IOP_REQUEST_FLAG_OUTPUT_CONTEXT 8
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enum hpt_iop_request_type {
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IOP_REQUEST_TYPE_GET_CONFIG = 0,
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IOP_REQUEST_TYPE_SET_CONFIG,
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IOP_REQUEST_TYPE_BLOCK_COMMAND,
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IOP_REQUEST_TYPE_SCSI_COMMAND,
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IOP_REQUEST_TYPE_IOCTL_COMMAND,
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IOP_REQUEST_TYPE_MAX
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};
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enum hpt_iop_result_type {
|
||||
IOP_RESULT_PENDING = 0,
|
||||
IOP_RESULT_SUCCESS,
|
||||
IOP_RESULT_FAIL,
|
||||
IOP_RESULT_BUSY,
|
||||
IOP_RESULT_RESET,
|
||||
IOP_RESULT_INVALID_REQUEST,
|
||||
IOP_RESULT_BAD_TARGET,
|
||||
IOP_RESULT_MODE_SENSE_CHECK_CONDITION,
|
||||
};
|
||||
|
||||
struct hpt_iop_request_get_config
|
||||
{
|
||||
struct hpt_iop_request_header header;
|
||||
__le32 interface_version;
|
||||
__le32 firmware_version;
|
||||
__le32 max_requests;
|
||||
__le32 request_size;
|
||||
__le32 max_sg_count;
|
||||
__le32 data_transfer_length;
|
||||
__le32 alignment_mask;
|
||||
__le32 max_devices;
|
||||
__le32 sdram_size;
|
||||
};
|
||||
|
||||
struct hpt_iop_request_set_config
|
||||
{
|
||||
struct hpt_iop_request_header header;
|
||||
__le32 iop_id;
|
||||
__le32 vbus_id;
|
||||
__le32 reserve[6];
|
||||
};
|
||||
|
||||
struct hpt_iopsg
|
||||
{
|
||||
__le32 size;
|
||||
__le32 eot; /* non-zero: end of table */
|
||||
__le64 pci_address;
|
||||
};
|
||||
|
||||
struct hpt_iop_request_block_command
|
||||
{
|
||||
struct hpt_iop_request_header header;
|
||||
u8 channel;
|
||||
u8 target;
|
||||
u8 lun;
|
||||
u8 pad1;
|
||||
__le16 command; /* IOP_BLOCK_COMMAND_{READ,WRITE} */
|
||||
__le16 sectors;
|
||||
__le64 lba;
|
||||
struct hpt_iopsg sg_list[1];
|
||||
};
|
||||
|
||||
#define IOP_BLOCK_COMMAND_READ 1
|
||||
#define IOP_BLOCK_COMMAND_WRITE 2
|
||||
#define IOP_BLOCK_COMMAND_VERIFY 3
|
||||
#define IOP_BLOCK_COMMAND_FLUSH 4
|
||||
#define IOP_BLOCK_COMMAND_SHUTDOWN 5
|
||||
|
||||
struct hpt_iop_request_scsi_command
|
||||
{
|
||||
struct hpt_iop_request_header header;
|
||||
u8 channel;
|
||||
u8 target;
|
||||
u8 lun;
|
||||
u8 pad1;
|
||||
u8 cdb[16];
|
||||
__le32 dataxfer_length;
|
||||
struct hpt_iopsg sg_list[1];
|
||||
};
|
||||
|
||||
struct hpt_iop_request_ioctl_command
|
||||
{
|
||||
struct hpt_iop_request_header header;
|
||||
__le32 ioctl_code;
|
||||
__le32 inbuf_size;
|
||||
__le32 outbuf_size;
|
||||
__le32 bytes_returned;
|
||||
u8 buf[1];
|
||||
/* out data should be put at buf[(inbuf_size+3)&~3] */
|
||||
};
|
||||
|
||||
#define HPTIOP_MAX_REQUESTS 256u
|
||||
|
||||
struct hptiop_request {
|
||||
struct hptiop_request * next;
|
||||
void * req_virt;
|
||||
u32 req_shifted_phy;
|
||||
struct scsi_cmnd * scp;
|
||||
int index;
|
||||
};
|
||||
|
||||
struct hpt_scsi_pointer {
|
||||
int mapped;
|
||||
int sgcnt;
|
||||
dma_addr_t dma_handle;
|
||||
};
|
||||
|
||||
#define HPT_SCP(scp) ((struct hpt_scsi_pointer *)&(scp)->SCp)
|
||||
|
||||
struct hptiop_hba {
|
||||
struct hpt_iopmu __iomem * iop;
|
||||
struct Scsi_Host * host;
|
||||
struct pci_dev * pcidev;
|
||||
|
||||
struct list_head link;
|
||||
|
||||
/* IOP config info */
|
||||
u32 firmware_version;
|
||||
u32 sdram_size;
|
||||
u32 max_devices;
|
||||
u32 max_requests;
|
||||
u32 max_request_size;
|
||||
u32 max_sg_descriptors;
|
||||
|
||||
u32 req_size; /* host-allocated request buffer size */
|
||||
int initialized;
|
||||
int msg_done;
|
||||
|
||||
struct hptiop_request * req_list;
|
||||
struct hptiop_request reqs[HPTIOP_MAX_REQUESTS];
|
||||
|
||||
/* used to free allocated dma area */
|
||||
void * dma_coherent;
|
||||
dma_addr_t dma_coherent_handle;
|
||||
|
||||
atomic_t reset_count;
|
||||
atomic_t resetting;
|
||||
|
||||
wait_queue_head_t reset_wq;
|
||||
wait_queue_head_t ioctl_wq;
|
||||
};
|
||||
|
||||
struct hpt_ioctl_k
|
||||
{
|
||||
struct hptiop_hba * hba;
|
||||
u32 ioctl_code;
|
||||
u32 inbuf_size;
|
||||
u32 outbuf_size;
|
||||
void * inbuf;
|
||||
void * outbuf;
|
||||
u32 * bytes_returned;
|
||||
void (*done)(struct hpt_ioctl_k *);
|
||||
int result; /* HPT_IOCTL_RESULT_ */
|
||||
};
|
||||
|
||||
#define HPT_IOCTL_RESULT_OK 0
|
||||
#define HPT_IOCTL_RESULT_FAILED (-1)
|
||||
|
||||
#if 0
|
||||
#define dprintk(fmt, args...) do { printk(fmt, ##args); } while(0)
|
||||
#else
|
||||
#define dprintk(fmt, args...)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue