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Allwinner DT changes for 4.12 

As usual a number of changes, among which:
   - All the sun5i DTSI has been reworked based on the new documentation and
     the IPs that are actually found in all those SoCs. Part of that rework
     also brought the GR8 DTSI to include sun5i.dtsi
   - Mali devfreq and thermal throttling support on the A33
   - AC power supplies for the AXP209 and AXP22X PMIC
   - CAN support for the A20
   - CPUFreq-based thermal throttling for the A33
   - New board: NanoPi NEO Air
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Merge tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Allwinner DT changes for 4.12

As usual a number of changes, among which:
  - All the sun5i DTSI has been reworked based on the new documentation and
    the IPs that are actually found in all those SoCs. Part of that rework
    also brought the GR8 DTSI to include sun5i.dtsi
  - Mali devfreq and thermal throttling support on the A33
  - AC power supplies for the AXP209 and AXP22X PMIC
  - CAN support for the A20
  - CPUFreq-based thermal throttling for the A33
  - New board: NanoPi NEO Air

* tag 'sunxi-dt-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (38 commits)
  ARM: sun8i: sina33: add highest OPP of CPUs
  ARM: sun8i: a33: Add devfreq-based GPU cooling
  ARM: sun8i: a33: add CPU thermal throttling
  ARM: sun8i: a33: add thermal sensor
  ARM: dts: sun7i: fix device node ordering
  ARM: dts: sun4i: fix device node ordering
  ARM: dts: sun7i: Add can0_pins_a pinctrl settings
  ARM: dts: sun7i: Add CAN node
  ARM: dts: sun4i: Add can0_pins_a pinctrl settings
  ARM: dts: sun4i: Add CAN node
  ARM: sun7i: cubietruck: enable ACIN und USB power supply subnode
  ARM: dts: sun5i: Add interrupt for display backend
  dt-bindings: display: sun4i: Add display backend interrupt to device tree binding
  ARM: dts: sun7i: Use axp209.dtsi on A20-OLinuXino-Micro
  ARM: dts: sun6i: sina31s: Enable SPDIF out
  ARM: sun8i: sina33: add cpu-supply
  ARM: sun8i: a33: add all operating points
  ARM: sun5i: chip: enable ACIN power supply subnode
  ARM: dts: sun8i: sina33: enable ACIN power supply subnode
  ARM: dtsi: axp22x: add AC power supply subnode
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-04-19 05:37:06 -07:00
parent 1409ce036c 367d2b0cb1
commit ec4c22e7c3
88 changed files with 813 additions and 975 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
View File

@ -94,6 +94,7 @@ Required properties:
* allwinner,sun6i-a31-display-backend
* allwinner,sun8i-a33-display-backend
- reg: base address and size of the memory-mapped region.
- interrupts: interrupt associated to this IP
- clocks: phandles to the clocks feeding the frontend and backend
* ahb: the backend interface clock
* mod: the backend module clock
@ -265,6 +266,7 @@ fe0: display-frontend@1e00000 {
be0: display-backend@1e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <47>;
clocks = <&ahb_gates 44>, <&de_be_clk>,
<&dram_gates 26>;
clock-names = "ahb", "mod",

8
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
View File

@ -35,6 +35,14 @@ Optional properties:
- interrupt-names and interrupts:
* pmu: Power Management Unit interrupt, if implemented in hardware
- memory-region:
Memory region to allocate from, as defined in
Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt
- operating-points-v2:
Operating Points for the GPU, as defined in
Documentation/devicetree/bindings/opp/opp.txt
Vendor-specific bindings
------------------------

1
arch/arm/boot/dts/Makefile
View File

@ -881,6 +881,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-beelink-x2.dtb \
sun8i-h3-nanopi-m1.dtb \
sun8i-h3-nanopi-neo.dtb \
sun8i-h3-nanopi-neo-air.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \

5
arch/arm/boot/dts/axp209.dtsi
View File

@ -53,6 +53,11 @@
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp202-ac-power-supply";
status = "disabled";
};
axp_gpio: gpio {
compatible = "x-powers,axp209-gpio";
gpio-controller;

5
arch/arm/boot/dts/axp22x.dtsi
View File

@ -52,6 +52,11 @@
interrupt-controller;
#interrupt-cells = <1>;
ac_power_supply: ac-power-supply {
compatible = "x-powers,axp221-ac-power-supply";
status = "disabled";
};
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <3000>;

1
arch/arm/boot/dts/sun4i-a10-a1000.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele A1000";

1
arch/arm/boot/dts/sun4i-a10-cubieboard.dts
View File

@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard";

1
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {

1
arch/arm/boot/dts/sun4i-a10-hackberry.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Miniand Hackberry";

1
arch/arm/boot/dts/sun4i-a10-inet1.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {

1
arch/arm/boot/dts/sun4i-a10-inet9f-rev03.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "iNet-9F Rev 03";

1
arch/arm/boot/dts/sun4i-a10-jesurun-q5.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Jesurun Q5";

1
arch/arm/boot/dts/sun4i-a10-marsboard.dts
View File

@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "HAOYU Electronics Marsboard A10";

1
arch/arm/boot/dts/sun4i-a10-mini-xplus.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "PineRiver Mini X-Plus";

1
arch/arm/boot/dts/sun4i-a10-mk802.dts
View File

@ -44,7 +44,6 @@
#include "sun4i-a10.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "MK802";

1
arch/arm/boot/dts/sun4i-a10-olinuxino-lime.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A10-OLinuXino-LIME";

1
arch/arm/boot/dts/sun4i-a10-pcduino.dts
View File

@ -47,7 +47,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LinkSprite pcDuino";

1
arch/arm/boot/dts/sun4i-a10-pov-protab2-ips9.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {

40
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -47,7 +47,6 @@
#include <dt-bindings/clock/sun4i-a10-pll2.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&intc>;
@ -974,6 +973,11 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
can0_pins_a: can0@0 {
pins = "PH20", "PH21";
function = "can";
};
emac_pins_a: emac0@0 {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
@ -1283,6 +1287,22 @@
status = "disabled";
};
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <62>;
clocks = <&apb1_gates 6>;
status = "disabled";
};
ps21: ps2@01c2a400 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a400 0x400>;
interrupts = <63>;
clocks = <&apb1_gates 7>;
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
@ -1313,19 +1333,11 @@
#size-cells = <0>;
};
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <62>;
clocks = <&apb1_gates 6>;
status = "disabled";
};
ps21: ps2@01c2a400 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a400 0x400>;
interrupts = <63>;
clocks = <&apb1_gates 7>;
can0: can@01c2bc00 {
compatible = "allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <26>;
clocks = <&apb1_gates 4>;
status = "disabled";
};
};

1
arch/arm/boot/dts/sun5i-a10s-auxtek-t003.dts
View File

@ -44,7 +44,6 @@
#include "sun5i-a10s.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Auxtek t003 A10s hdmi tv-stick";

1
arch/arm/boot/dts/sun5i-a10s-auxtek-t004.dts
View File

@ -44,7 +44,6 @@
#include "sun5i-a10s.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Auxtek t004 A10s hdmi tv-stick";

5
arch/arm/boot/dts/sun5i-a10s-olinuxino-micro.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A10s-Olinuxino Micro";
@ -83,7 +82,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_a>;
pinctrl-0 = <&emac_pins_b>;
phy = <&phy1>;
status = "okay";
};
@ -257,7 +256,7 @@
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins_a>;
pinctrl-0 = <&uart2_pins_b>;
status = "okay";
};

1
arch/arm/boot/dts/sun5i-a10s-r7-tv-dongle.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "R7 A10s hdmi tv-stick";

3
arch/arm/boot/dts/sun5i-a10s-wobo-i5.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "A10s-Wobo i5";
@ -95,7 +94,7 @@
&emac {
pinctrl-names = "default";
pinctrl-0 = <&emac_pins_b>;
pinctrl-0 = <&emac_pins_a>;
phy = <&phy1>;
status = "okay";
};

77
arch/arm/boot/dts/sun5i-a10s.dtsi
View File

@ -47,7 +47,6 @@
#include "sun5i.dtsi"
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&intc>;
@ -61,7 +60,7 @@
#size-cells = <1>;
ranges;
framebuffer@0 {
framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-hdmi";
@ -70,45 +69,9 @@
<&ccu CLK_DE_BE>, <&ccu CLK_HDMI>;
status = "disabled";
};
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
framebuffer@2 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
};
soc@01c00000 {
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
mdio: mdio@01c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
pwm: pwm@01c20e00 {
compatible = "allwinner,sun5i-a10s-pwm";
reg = <0x01c20e00 0xc>;
@ -116,26 +79,6 @@
#pwm-cells = <3>;
status = "disabled";
};
uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
uart2: serial@01c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
};
};
@ -151,12 +94,12 @@
function = "uart0";
};
uart2_pins_a: uart2@0 {
uart2_pins_b: uart2@1 {
pins = "PC18", "PC19";
function = "uart2";
};
emac_pins_a: emac0@0 {
emac_pins_b: emac0@1 {
pins = "PA0", "PA1", "PA2",
"PA3", "PA4", "PA5", "PA6",
"PA7", "PA8", "PA9", "PA10",
@ -165,15 +108,6 @@
function = "emac";
};
emac_pins_b: emac0@1 {
pins = "PD6", "PD7", "PD10",
"PD11", "PD12", "PD13", "PD14",
"PD15", "PD18", "PD19", "PD20",
"PD21", "PD22", "PD23", "PD24",
"PD25", "PD26", "PD27";
function = "emac";
};
mmc1_pins_a: mmc1@0 {
pins = "PG3", "PG4", "PG5",
"PG6", "PG7", "PG8";
@ -193,9 +127,4 @@
};
&sram_a {
emac_sram: sram-section@8000 {
compatible = "allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
status = "disabled";
};
};

1
arch/arm/boot/dts/sun5i-a13-empire-electronix-d709.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/pwm/pwm.h>
/ {

1
arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "HSG H702";

1
arch/arm/boot/dts/sun5i-a13-licheepi-one.dts
View File

@ -50,7 +50,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Lichee Pi One";

1
arch/arm/boot/dts/sun5i-a13-olinuxino-micro.dts
View File

@ -46,7 +46,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A13-Olinuxino Micro";

1
arch/arm/boot/dts/sun5i-a13-olinuxino.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A13-Olinuxino";

140
arch/arm/boot/dts/sun5i-a13.dtsi
View File

@ -46,27 +46,11 @@
#include "sun5i.dtsi"
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&intc>;
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
};
thermal-zones {
cpu_thermal {
/* milliseconds */
@ -105,44 +89,6 @@
};
soc@01c00000 {
tcon0: lcd-controller@01c0c000 {
compatible = "allwinner,sun5i-a13-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <44>;
resets = <&ccu RST_LCD>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB_LCD>,
<&ccu CLK_TCON_CH0>,
<&ccu CLK_TCON_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
pwm: pwm@01c20e00 {
compatible = "allwinner,sun5i-a13-pwm";
reg = <0x01c20e00 0xc>;
@ -151,74 +97,6 @@
status = "disabled";
};
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun5i-a13-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <47>;
clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@01e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE>;
status = "disabled";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_be0>;
};
};
};
};
};
};
@ -244,22 +122,4 @@
&pio {
compatible = "allwinner,sun5i-a13-pinctrl";
lcd_rgb666_pins: lcd_rgb666@0 {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
function = "lcd0";
};
uart1_pins_a: uart1@0 {
pins = "PE10", "PE11";
function = "uart1";
};
uart1_pins_b: uart1@1 {
pins = "PG3", "PG4";
function = "uart1";
};
};

4
arch/arm/boot/dts/sun5i-gr8-chip-pro.dts
View File

@ -171,7 +171,7 @@
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>, <&pwm1_pins>;
pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
status = "disabled";
};
@ -220,7 +220,7 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
status = "okay";
};

4
arch/arm/boot/dts/sun5i-gr8-evb.dts
View File

@ -281,7 +281,7 @@
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins_a>;
pinctrl-0 = <&pwm0_pins>;
status = "okay";
};
@ -332,7 +332,7 @@
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins_a>, <&uart1_cts_rts_pins_a>;
pinctrl-0 = <&uart1_pins_b>, <&uart1_cts_rts_pins_a>;
status = "okay";
};

620
arch/arm/boot/dts/sun5i-gr8.dtsi
View File

@ -42,429 +42,19 @@
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "sun5i.dtsi"
#include <dt-bindings/clock/sun5i-ccu.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/reset/sun5i-ccu.h>
/ {
interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
clocks = <&ccu CLK_CPU>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc24M: clk@01c20050 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
clock-output-names = "osc24M";
};
osc32k: clk@0 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
clock-output-names = "osc32k";
};
};
display-engine {
compatible = "allwinner,sun5i-a13-display-engine";
allwinner,pipelines = <&fe0>;
};
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram_a: sram@00000000 {
compatible = "mmio-sram";
reg = <0x00000000 0xc000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00000000 0xc000>;
};
sram_d: sram@00010000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x00010000 0x1000>;
otg_sram: sram-section@0000 {
compatible = "allwinner,sun4i-a10-sram-d";
reg = <0x0000 0x1000>;
status = "disabled";
};
};
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;
interrupts = <27>;
clocks = <&ccu CLK_AHB_DMA>;
#dma-cells = <2>;
};
nfc: nand@01c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;
clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
interrupts = <10>;
clocks = <&ccu CLK_AHB_SPI0>, <&ccu CLK_SPI0>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 27>,
<&dma SUN4I_DMA_DEDICATED 26>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi1: spi@01c06000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c06000 0x1000>;
interrupts = <11>;
clocks = <&ccu CLK_AHB_SPI1>, <&ccu CLK_SPI1>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 9>,
<&dma SUN4I_DMA_DEDICATED 8>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
tve0: tv-encoder@01c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ccu CLK_AHB_TVE>;
resets = <&ccu RST_TVE>;
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
tve0_in_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_tve0>;
};
};
};
tcon0: lcd-controller@01c0c000 {
compatible = "allwinner,sun5i-a13-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <44>;
resets = <&ccu RST_LCD>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB_LCD>,
<&ccu CLK_TCON_CH0>,
<&ccu CLK_TCON_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon0_out_tve0: endpoint@1 {
reg = <1>;
remote-endpoint = <&tve0_in_tcon0>;
};
};
};
};
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
clocks = <&ccu CLK_AHB_MMC0>, <&ccu CLK_MMC0>;
clock-names = "ahb", "mmc";
interrupts = <32>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc1: mmc@01c10000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c10000 0x1000>;
clocks = <&ccu CLK_AHB_MMC1>, <&ccu CLK_MMC1>;
clock-names = "ahb", "mmc";
interrupts = <33>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
mmc2: mmc@01c11000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c11000 0x1000>;
clocks = <&ccu CLK_AHB_MMC2>, <&ccu CLK_MMC2>;
clock-names = "ahb", "mmc";
interrupts = <34>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
usb_otg: usb@01c13000 {
compatible = "allwinner,sun4i-a10-musb";
reg = <0x01c13000 0x0400>;
clocks = <&ccu CLK_AHB_OTG>;
interrupts = <38>;
interrupt-names = "mc";
phys = <&usbphy 0>;
phy-names = "usb";
extcon = <&usbphy 0>;
allwinner,sram = <&otg_sram 1>;
status = "disabled";
dr_mode = "otg";
};
usbphy: phy@01c13400 {
#phy-cells = <1>;
compatible = "allwinner,sun5i-a13-usb-phy";
reg = <0x01c13400 0x10 0x01c14800 0x4>;
reg-names = "phy_ctrl", "pmu1";
clocks = <&ccu CLK_USB_PHY0>;
clock-names = "usb_phy";
resets = <&ccu RST_USB_PHY0>, <&ccu RST_USB_PHY1>;
reset-names = "usb0_reset", "usb1_reset";
status = "disabled";
};
ehci0: usb@01c14000 {
compatible = "allwinner,sun5i-a13-ehci", "generic-ehci";
reg = <0x01c14000 0x100>;
interrupts = <39>;
clocks = <&ccu CLK_AHB_EHCI>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
ohci0: usb@01c14400 {
compatible = "allwinner,sun5i-a13-ohci", "generic-ohci";
reg = <0x01c14400 0x100>;
interrupts = <40>;
clocks = <&ccu CLK_USB_OHCI>, <&ccu CLK_AHB_OHCI>;
phys = <&usbphy 1>;
phy-names = "usb";
status = "disabled";
};
spi2: spi@01c17000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c17000 0x1000>;
interrupts = <12>;
clocks = <&ccu CLK_AHB_SPI2>, <&ccu CLK_SPI2>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 29>,
<&dma SUN4I_DMA_DEDICATED 28>;
dma-names = "rx", "tx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
ccu: clock@01c20000 {
compatible = "nextthing,gr8-ccu";
reg = <0x01c20000 0x400>;
clocks = <&osc24M>, <&osc32k>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
};
intc: interrupt-controller@01c20400 {
compatible = "allwinner,sun4i-a10-ic";
reg = <0x01c20400 0x400>;
interrupt-controller;
#interrupt-cells = <1>;
};
pio: pinctrl@01c20800 {
compatible = "nextthing,gr8-pinctrl";
reg = <0x01c20800 0x400>;
interrupts = <28>;
clocks = <&ccu CLK_APB0_PIO>;
gpio-controller;
interrupt-controller;
#interrupt-cells = <3>;
#gpio-cells = <3>;
i2c0_pins_a: i2c0@0 {
pins = "PB0", "PB1";
function = "i2c0";
};
i2c1_pins_a: i2c1@0 {
pins = "PB15", "PB16";
function = "i2c1";
};
i2c2_pins_a: i2c2@0 {
pins = "PB17", "PB18";
function = "i2c2";
};
i2s0_data_pins_a: i2s0-data@0 {
pins = "PB6", "PB7", "PB8", "PB9";
function = "i2s0";
};
i2s0_mclk_pins_a: i2s0-mclk@0 {
pins = "PB5";
function = "i2s0";
};
ir0_rx_pins_a: ir0@0 {
pins = "PB4";
function = "ir0";
};
lcd_rgb666_pins: lcd-rgb666@0 {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
function = "lcd0";
};
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
drive-strength = <30>;
};
nand_pins_a: nand-base0@0 {
pins = "PC0", "PC1", "PC2",
"PC5", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14",
"PC15";
function = "nand0";
};
nand_cs0_pins_a: nand-cs@0 {
pins = "PC4";
function = "nand0";
};
nand_rb0_pins_a: nand-rb@0 {
pins = "PC6";
function = "nand0";
};
pwm0_pins_a: pwm0@0 {
pins = "PB2";
function = "pwm0";
};
pwm1_pins: pwm1 {
pins = "PG13";
function = "pwm1";
};
spdif_tx_pins_a: spdif@0 {
pins = "PB10";
function = "spdif";
bias-pull-up;
};
uart1_pins_a: uart1@1 {
pins = "PG3", "PG4";
function = "uart1";
};
uart1_cts_rts_pins_a: uart1-cts-rts@0 {
pins = "PG5", "PG6";
function = "uart1";
};
uart2_pins_a: uart2@1 {
pins = "PD2", "PD3";
function = "uart2";
};
uart2_cts_rts_pins_a: uart2-cts-rts@0 {
pins = "PD4", "PD5";
function = "uart2";
};
uart3_pins_a: uart3@1 {
pins = "PG9", "PG10";
function = "uart3";
};
uart3_cts_rts_pins_a: uart3-cts-rts@0 {
pins = "PG11", "PG12";
function = "uart3";
};
};
pwm: pwm@01c20e00 {
compatible = "allwinner,sun5i-a10s-pwm";
reg = <0x01c20e00 0xc>;
@ -473,18 +63,6 @@
status = "disabled";
};
timer@01c20c00 {
compatible = "allwinner,sun4i-a10-timer";
reg = <0x01c20c00 0x90>;
interrupts = <22>;
clocks = <&ccu CLK_HOSC>;
};
wdt: watchdog@01c20c90 {
compatible = "allwinner,sun4i-a10-wdt";
reg = <0x01c20c90 0x10>;
};
spdif: spdif@01c21000 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-spdif";
@ -498,15 +76,6 @@
status = "disabled";
};
ir0: ir@01c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
clock-names = "apb", "ir";
interrupts = <5>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
i2s0: i2s@01c22400 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-i2s";
@ -519,168 +88,39 @@
dma-names = "rx", "tx";
status = "disabled";
};
lradc: lradc@01c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
interrupts = <31>;
status = "disabled";
};
codec: codec@01c22c00 {
#sound-dai-cells = <0>;
compatible = "allwinner,sun4i-a10-codec";
reg = <0x01c22c00 0x40>;
interrupts = <30>;
clocks = <&ccu CLK_APB0_CODEC>, <&ccu CLK_CODEC>;
clock-names = "apb", "codec";
dmas = <&dma SUN4I_DMA_NORMAL 19>,
<&dma SUN4I_DMA_NORMAL 19>;
dma-names = "rx", "tx";
status = "disabled";
};
rtp: rtp@01c25000 {
compatible = "allwinner,sun5i-a13-ts";
reg = <0x01c25000 0x100>;
interrupts = <29>;
#thermal-sensor-cells = <0>;
};
uart1: serial@01c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
interrupts = <2>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART1>;
status = "disabled";
};
uart2: serial@01c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
uart3: serial@01c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
interrupts = <4>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART3>;
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2ac00 0x400>;
interrupts = <7>;
clocks = <&ccu CLK_APB1_I2C0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c1: i2c@01c2b000 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b000 0x400>;
interrupts = <8>;
clocks = <&ccu CLK_APB1_I2C1>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
i2c2: i2c@01c2b400 {
compatible = "allwinner,sun4i-a10-i2c";
reg = <0x01c2b400 0x400>;
interrupts = <9>;
clocks = <&ccu CLK_APB1_I2C2>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
timer@01c60000 {
compatible = "allwinner,sun5i-a13-hstimer";
reg = <0x01c60000 0x1000>;
interrupts = <82>, <83>;
clocks = <&ccu CLK_AHB_HSTIMER>;
};
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun5i-a13-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <47>;
clocks = <&ccu CLK_AHB_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@01e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE>;
status = "disabled";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
&ccu {
compatible = "nextthing,gr8-ccu";
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
&pio {
compatible = "nextthing,gr8-pinctrl";
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_be0>;
};
};
};
};
i2s0_data_pins_a: i2s0-data@0 {
pins = "PB6", "PB7", "PB8", "PB9";
function = "i2s0";
};
i2s0_mclk_pins_a: i2s0-mclk@0 {
pins = "PB5";
function = "i2s0";
};
pwm1_pins: pwm1 {
pins = "PG13";
function = "pwm1";
};
spdif_tx_pins_a: spdif@0 {
pins = "PB10";
function = "spdif";
bias-pull-up;
};
uart1_cts_rts_pins_a: uart1-cts-rts@0 {
pins = "PG5", "PG6";
function = "uart1";
};
};

6
arch/arm/boot/dts/sun5i-r8-chip.dts
View File

@ -128,6 +128,10 @@
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins_a>;
@ -281,7 +285,7 @@
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins_a>,
<&uart3_pins_cts_rts_a>;
<&uart3_cts_rts_pins_a>;
status = "okay";
};

40
arch/arm/boot/dts/sun5i-r8.dtsi
View File

@ -45,43 +45,3 @@
#include "sun5i-a13.dtsi"
/ {
chosen {
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
};
soc@01c00000 {
tve0: tv-encoder@01c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ccu CLK_AHB_TVE>;
resets = <&ccu RST_TVE>;
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
tve0_in_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_tve0>;
};
};
};
};
};
&tcon0_out {
tcon0_out_tve0: endpoint@1 {
reg = <1>;
remote-endpoint = <&tve0_in_tcon0>;
};
};

284
arch/arm/boot/dts/sun5i.dtsi
View File

@ -46,7 +46,6 @@
#include <dt-bindings/clock/sun5i-ccu.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/reset/sun5i-ccu.h>
/ {
@ -64,6 +63,31 @@
};
};
chosen {
#address-cells = <1>;
#size-cells = <1>;
ranges;
framebuffer@0 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0";
clocks = <&ccu CLK_AHB_LCD>, <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH0>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
framebuffer@1 {
compatible = "allwinner,simple-framebuffer",
"simple-framebuffer";
allwinner,pipeline = "de_be0-lcd0-tve0";
clocks = <&ccu CLK_AHB_TVE>, <&ccu CLK_AHB_LCD>,
<&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_TCON_CH1>, <&ccu CLK_DRAM_DE_BE>;
status = "disabled";
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
@ -105,6 +129,12 @@
ranges = <0 0x00000000 0xc000>;
};
emac_sram: sram-section@8000 {
compatible = "allwinner,sun4i-a10-sram-a3-a4";
reg = <0x8000 0x4000>;
status = "disabled";
};
sram_d: sram@00010000 {
compatible = "mmio-sram";
reg = <0x00010000 0x1000>;
@ -128,6 +158,19 @@
#dma-cells = <2>;
};
nfc: nand@01c03000 {
compatible = "allwinner,sun4i-a10-nand";
reg = <0x01c03000 0x1000>;
interrupts = <37>;
clocks = <&ccu CLK_AHB_NAND>, <&ccu CLK_NAND>;
clock-names = "ahb", "mod";
dmas = <&dma SUN4I_DMA_DEDICATED 3>;
dma-names = "rxtx";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
spi0: spi@01c05000 {
compatible = "allwinner,sun4i-a10-spi";
reg = <0x01c05000 0x1000>;
@ -156,6 +199,84 @@
#size-cells = <0>;
};
tve0: tv-encoder@01c0a000 {
compatible = "allwinner,sun4i-a10-tv-encoder";
reg = <0x01c0a000 0x1000>;
clocks = <&ccu CLK_AHB_TVE>;
resets = <&ccu RST_TVE>;
status = "disabled";
port {
#address-cells = <1>;
#size-cells = <0>;
tve0_in_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_out_tve0>;
};
};
};
emac: ethernet@01c0b000 {
compatible = "allwinner,sun4i-a10-emac";
reg = <0x01c0b000 0x1000>;
interrupts = <55>;
clocks = <&ccu CLK_AHB_EMAC>;
allwinner,sram = <&emac_sram 1>;
status = "disabled";
};
mdio: mdio@01c0b080 {
compatible = "allwinner,sun4i-a10-mdio";
reg = <0x01c0b080 0x14>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
tcon0: lcd-controller@01c0c000 {
compatible = "allwinner,sun5i-a13-tcon";
reg = <0x01c0c000 0x1000>;
interrupts = <44>;
resets = <&ccu RST_LCD>;
reset-names = "lcd";
clocks = <&ccu CLK_AHB_LCD>,
<&ccu CLK_TCON_CH0>,
<&ccu CLK_TCON_CH1>;
clock-names = "ahb",
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
tcon0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tcon0_in_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_out_tcon0>;
};
};
tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon0_out_tve0: endpoint@1 {
reg = <1>;
remote-endpoint = <&tve0_in_tcon0>;
};
};
};
};
mmc0: mmc@01c0f000 {
compatible = "allwinner,sun5i-a13-mmc";
reg = <0x01c0f000 0x1000>;
@ -273,6 +394,15 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
emac_pins_a: emac0@0 {
pins = "PD6", "PD7", "PD10",
"PD11", "PD12", "PD13", "PD14",
"PD15", "PD18", "PD19", "PD20",
"PD21", "PD22", "PD23", "PD24",
"PD25", "PD26", "PD27";
function = "emac";
};
i2c0_pins_a: i2c0@0 {
pins = "PB0", "PB1";
function = "i2c0";
@ -288,6 +418,11 @@
function = "i2c2";
};
ir0_rx_pins_a: ir0@0 {
pins = "PB4";
function = "ir0";
};
lcd_rgb565_pins: lcd_rgb565@0 {
pins = "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
@ -296,6 +431,14 @@
function = "lcd0";
};
lcd_rgb666_pins: lcd_rgb666@0 {
pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
"PD10", "PD11", "PD12", "PD13", "PD14", "PD15",
"PD18", "PD19", "PD20", "PD21", "PD22", "PD23",
"PD24", "PD25", "PD26", "PD27";
function = "lcd0";
};
mmc0_pins_a: mmc0@0 {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
@ -321,6 +464,24 @@
bias-pull-up;
};
nand_pins_a: nand-base0@0 {
pins = "PC0", "PC1", "PC2",
"PC5", "PC8", "PC9", "PC10",
"PC11", "PC12", "PC13", "PC14",
"PC15";
function = "nand0";
};
nand_cs0_pins_a: nand-cs@0 {
pins = "PC4";
function = "nand0";
};
nand_rb0_pins_a: nand-rb@0 {
pins = "PC6";
function = "nand0";
};
spi2_pins_a: spi2@0 {
pins = "PE1", "PE2", "PE3";
function = "spi2";
@ -331,12 +492,32 @@
function = "spi2";
};
uart1_pins_a: uart1@0 {
pins = "PE10", "PE11";
function = "uart1";
};
uart1_pins_b: uart1@1 {
pins = "PG3", "PG4";
function = "uart1";
};
uart2_pins_a: uart2@0 {
pins = "PD2", "PD3";
function = "uart2";
};
uart2_cts_rts_pins_a: uart2-cts-rts@0 {
pins = "PD4", "PD5";
function = "uart2";
};
uart3_pins_a: uart3@0 {
pins = "PG9", "PG10";
function = "uart3";
};
uart3_pins_cts_rts_a: uart3-cts-rts@0 {
uart3_cts_rts_pins_a: uart3-cts-rts@0 {
pins = "PG11", "PG12";
function = "uart3";
};
@ -359,6 +540,15 @@
reg = <0x01c20c90 0x10>;
};
ir0: ir@01c21800 {
compatible = "allwinner,sun4i-a10-ir";
clocks = <&ccu CLK_APB0_IR>, <&ccu CLK_IR>;
clock-names = "apb", "ir";
interrupts = <5>;
reg = <0x01c21800 0x40>;
status = "disabled";
};
lradc: lradc@01c22800 {
compatible = "allwinner,sun4i-a10-lradc-keys";
reg = <0x01c22800 0x100>;
@ -391,6 +581,16 @@
#thermal-sensor-cells = <0>;
};
uart0: serial@01c28000 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28000 0x400>;
interrupts = <1>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART0>;
status = "disabled";
};
uart1: serial@01c28400 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28400 0x400>;
@ -401,6 +601,16 @@
status = "disabled";
};
uart2: serial@01c28800 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28800 0x400>;
interrupts = <3>;
reg-shift = <2>;
reg-io-width = <4>;
clocks = <&ccu CLK_APB1_UART2>;
status = "disabled";
};
uart3: serial@01c28c00 {
compatible = "snps,dw-apb-uart";
reg = <0x01c28c00 0x400>;
@ -447,5 +657,75 @@
interrupts = <82>, <83>;
clocks = <&ccu CLK_AHB_HSTIMER>;
};
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun5i-a13-display-frontend";
reg = <0x01e00000 0x20000>;
interrupts = <47>;
clocks = <&ccu CLK_DE_FE>, <&ccu CLK_DE_FE>,
<&ccu CLK_DRAM_DE_FE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_FE>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
fe0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
fe0_out_be0: endpoint@0 {
reg = <0>;
remote-endpoint = <&be0_in_fe0>;
};
};
};
};
be0: display-backend@01e60000 {
compatible = "allwinner,sun5i-a13-display-backend";
reg = <0x01e60000 0x10000>;
interrupts = <47>;
clocks = <&ccu CLK_AHB_DE_BE>, <&ccu CLK_DE_BE>,
<&ccu CLK_DRAM_DE_BE>;
clock-names = "ahb", "mod",
"ram";
resets = <&ccu RST_DE_BE>;
status = "disabled";
assigned-clocks = <&ccu CLK_DE_BE>;
assigned-clock-rates = <300000000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
be0_in: port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
be0_in_fe0: endpoint@0 {
reg = <0>;
remote-endpoint = <&fe0_out_be0>;
};
};
be0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
be0_out_tcon0: endpoint@0 {
reg = <0>;
remote-endpoint = <&tcon0_in_be0>;
};
};
};
};
};
};

1
arch/arm/boot/dts/sun6i-a31-app4-evb1.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Allwinner A31 APP4 EVB1 Evaluation Board";

1
arch/arm/boot/dts/sun6i-a31-colombus.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "WITS A31 Colombus Evaluation Board";

1
arch/arm/boot/dts/sun6i-a31-hummingbird.dts
View File

@ -47,7 +47,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A31 Hummingbird";

1
arch/arm/boot/dts/sun6i-a31-i7.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele I7 Quad top set box";

1
arch/arm/boot/dts/sun6i-a31-m9.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele M9 top set box";

1
arch/arm/boot/dts/sun6i-a31-mele-a1000g-quad.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele A1000G Quad top set box";

1
arch/arm/boot/dts/sun6i-a31.dtsi
View File

@ -48,7 +48,6 @@
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/clock/sun6i-a31-ccu.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>
/ {

2
arch/arm/boot/dts/sun6i-a31s-cs908.dts
View File

@ -43,8 +43,6 @@
/dts-v1/;
#include "sun6i-a31s.dtsi"
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "CSQ CS908 top set box";
compatible = "csq,cs908", "allwinner,sun6i-a31s";

1
arch/arm/boot/dts/sun6i-a31s-primo81.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "MSI Primo81 tablet";

1
arch/arm/boot/dts/sun6i-a31s-sina31s-core.dtsi
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Sinlinx SinA31s Core Board";

23
arch/arm/boot/dts/sun6i-a31s-sina31s.dts
View File

@ -63,6 +63,23 @@
gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board SPDIF";
simple-audio-card,cpu {
sound-dai = <&spdif>;
};
simple-audio-card,codec {
sound-dai = <&spdif_out>;
};
};
spdif_out: spdif-out {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
};
};
&codec {
@ -153,6 +170,12 @@
regulator-name = "vcc-gmac-phy";
};
&spdif {
pinctrl-names = "default";
pinctrl-0 = <&spdif_pins_a>;
status = "okay";
};
&usb_otg {
dr_mode = "peripheral";
status = "okay";

57
arch/arm/boot/dts/sun6i-a31s-sinovoip-bpi-m2.dts
View File

@ -86,6 +86,10 @@
};
};
&cpu0 {
cpu-supply = <&reg_dcdc3>;
};
&ehci0 {
status = "okay";
};
@ -151,6 +155,17 @@
status = "okay";
};
&p2wi {
status = "okay";
axp22x: pmic@68 {
compatible = "x-powers,axp221";
reg = <0x68>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
};
};
&pio {
gmac_phy_reset_pin_bpi_m2: gmac_phy_reset_pin@0 {
pins = "PA21";
@ -176,6 +191,48 @@
};
};
#include "axp22x.dtsi"
&reg_dc5ldo {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd-cpus";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vdd-3v0";
};
&reg_dcdc2 {
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd-gpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc4 {
regulator-always-on;
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1320000>;
regulator-name = "vdd-sys-dll";
};
&reg_dcdc5 {
regulator-always-on;
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-name = "vcc-dram";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;

1
arch/arm/boot/dts/sun6i-a31s-yones-toptech-bs1078-v2.dts
View File

@ -45,7 +45,6 @@
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Yones TopTech BS1078 v2 Tablet";

1
arch/arm/boot/dts/sun6i-reference-design-tablet.dtsi
View File

@ -44,7 +44,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
aliases {

1
arch/arm/boot/dts/sun7i-a20-bananapi.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LeMaker Banana Pi";

1
arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard2";

9
arch/arm/boot/dts/sun7i-a20-cubietruck.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubietruck";
@ -268,6 +267,10 @@
#include "axp209.dtsi"
&ac_power_supply {
status = "okay";
};
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
@ -324,6 +327,10 @@
status = "okay";
};
&usb_power_supply {
status = "okay";
};
&usbphy {
pinctrl-names = "default";
pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;

1
arch/arm/boot/dts/sun7i-a20-hummingbird.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A20 Hummingbird";

1
arch/arm/boot/dts/sun7i-a20-i12-tvbox.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "I12 / Q5 / QT840A A20 tvbox";

1
arch/arm/boot/dts/sun7i-a20-icnova-swac.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "ICnova-A20 SWAC";

1
arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Lamobo R1";

1
arch/arm/boot/dts/sun7i-a20-m3.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Mele M3";

1
arch/arm/boot/dts/sun7i-a20-mk808c.dts
View File

@ -53,7 +53,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "mk808c";

1
arch/arm/boot/dts/sun7i-a20-olimex-som-evb.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-Olimex-SOM-EVB";

1
arch/arm/boot/dts/sun7i-a20-olinuxino-lime.dts
View File

@ -49,7 +49,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-OLinuXino-LIME";

1
arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-OLinuXino-LIME2";

36
arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
View File

@ -49,7 +49,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Olimex A20-Olinuxino Micro";
@ -85,6 +84,14 @@
status = "okay";
};
&codec {
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc2>;
};
&ehci0 {
status = "okay";
};
@ -111,13 +118,9 @@
status = "okay";
axp209: pmic@34 {
compatible = "x-powers,axp209";
reg = <0x34>;
interrupt-parent = <&nmi_intc>;
interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <1>;
};
};
@ -251,6 +254,29 @@
};
};
#include "axp209.dtsi"
&reg_dcdc2 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-cpu";
};
&reg_dcdc3 {
regulator-always-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1400000>;
regulator-name = "vdd-int-dll";
};
&reg_ldo2 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "avcc";
};
&reg_ahci_5v {
status = "okay";
};

1
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Orange Pi Mini";

1
arch/arm/boot/dts/sun7i-a20-orangepi.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Orange Pi";

1
arch/arm/boot/dts/sun7i-a20-pcduino3.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "LinkSprite pcDuino3";

46
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -49,7 +49,6 @@
#include <dt-bindings/clock/sun4i-a10-pll2.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&gic>;
@ -1096,6 +1095,11 @@
#interrupt-cells = <3>;
#gpio-cells = <3>;
can0_pins_a: can0@0 {
pins = "PH20", "PH21";
function = "can";
};
clk_out_a_pins_a: clk_out_a@0 {
pins = "PI12";
function = "clk_out_a";
@ -1538,6 +1542,22 @@
status = "disabled";
};
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 6>;
status = "disabled";
};
ps21: ps2@01c2a400 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a400 0x400>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 7>;
status = "disabled";
};
i2c0: i2c@01c2ac00 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
@ -1582,6 +1602,15 @@
#size-cells = <0>;
};
can0: can@01c2bc00 {
compatible = "allwinner,sun7i-a20-can",
"allwinner,sun4i-a10-can";
reg = <0x01c2bc00 0x400>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 4>;
status = "disabled";
};
i2c4: i2c@01c2c000 {
compatible = "allwinner,sun7i-a20-i2c",
"allwinner,sun4i-a10-i2c";
@ -1629,20 +1658,5 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
ps20: ps2@01c2a000 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a000 0x400>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 6>;
status = "disabled";
};
ps21: ps2@01c2a400 {
compatible = "allwinner,sun4i-a10-ps2";
reg = <0x01c2a400 0x400>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&apb1_gates 7>;
status = "disabled";
};
};
};

2
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -47,7 +47,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
/ {
@ -493,6 +492,7 @@
clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
clock-names = "bus", "core";
resets = <&ccu RST_BUS_GPU>;
#cooling-cells = <2>;
assigned-clocks = <&ccu CLK_GPU>;
assigned-clock-rates = <408000000>;

1
arch/arm/boot/dts/sun8i-a23-evb.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Allwinner A23 Evaluation Board";

10
arch/arm/boot/dts/sun8i-a23-q8-tablet.dts
View File

@ -50,7 +50,6 @@
};
&codec {
pinctrl-0 = <&codec_pa_pin>;
allwinner,pa-gpios = <&pio 7 9 GPIO_ACTIVE_HIGH>; /* PH9 */
allwinner,audio-routing =
"Headphone", "HP",
@ -62,12 +61,3 @@
"Headset Mic", "HBIAS";
status = "okay";
};
&pio {
codec_pa_pin: codec_pa_pin@0 {
allwinner,pins = "PH9";
allwinner,function = "gpio_out";
allwinner,drive = <SUN4I_PINCTRL_10_MA>;
allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
};
};

23
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
View File

@ -48,7 +48,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Sinlinx SinA33";
@ -84,6 +83,24 @@
status = "okay";
};
&cpu0 {
cpu-supply = <&reg_dcdc3>;
};
&cpu0_opp_table {
opp@1104000000 {
opp-hz = /bits/ 64 <1104000000>;
opp-microvolt = <1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1320000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
};
&de {
status = "okay";
};
@ -175,6 +192,10 @@
#include "axp223.dtsi"
&ac_power_supply {
status = "okay";
};
&reg_aldo1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;

155
arch/arm/boot/dts/sun8i-a33.dtsi
View File

@ -43,24 +43,79 @@
*/
#include "sun8i-a23-a33.dtsi"
#include <dt-bindings/thermal/thermal.h>
/ {
cpu0_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp-shared;
opp@120000000 {
opp-hz = /bits/ 64 <120000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@240000000 {
opp-hz = /bits/ 64 <240000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@312000000 {
opp-hz = /bits/ 64 <312000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@408000000 {
opp-hz = /bits/ 64 <408000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@480000000 {
opp-hz = /bits/ 64 <480000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@504000000 {
opp-hz = /bits/ 64 <504000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@600000000 {
opp-hz = /bits/ 64 <600000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@648000000 {
opp-hz = /bits/ 64 <648000000>;
opp-microvolt = <1040000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@816000000 {
opp-hz = /bits/ 64 <816000000>;
opp-microvolt = <1100000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@912000000 {
opp-hz = /bits/ 64 <912000000>;
opp-microvolt = <1200000>;
clock-latency-ns = <244144>; /* 8 32k periods */
};
opp@1008000000 {
opp-hz = /bits/ 64 <1008000000>;
opp-microvolt = <1200000>;
@ -79,6 +134,7 @@
clocks = <&ccu CLK_CPUX>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
};
cpu@2 {
@ -100,6 +156,27 @@
status = "disabled";
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&ths>;
};
mali_opp_table: gpu-opp-table {
compatible = "operating-points-v2";
opp@144000000 {
opp-hz = /bits/ 64 <144000000>;
};
opp@240000000 {
opp-hz = /bits/ 64 <240000000>;
};
opp@384000000 {
opp-hz = /bits/ 64 <384000000>;
};
};
memory {
reg = <0x40000000 0x80000000>;
};
@ -196,6 +273,13 @@
status = "disabled";
};
ths: ths@01c25000 {
compatible = "allwinner,sun8i-a33-ths";
reg = <0x01c25000 0x100>;
#thermal-sensor-cells = <0>;
#io-channel-cells = <0>;
};
fe0: display-frontend@01e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;
@ -306,12 +390,83 @@
};
};
};
thermal-zones {
cpu_thermal {
/* milliseconds */
polling-delay-passive = <250>;
polling-delay = <1000>;
thermal-sensors = <&ths>;
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_alert1>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map2 {
trip = <&gpu_alert0>;
cooling-device = <&mali 1 THERMAL_NO_LIMIT>;
};
map3 {
trip = <&gpu_alert1>;
cooling-device = <&mali 2 THERMAL_NO_LIMIT>;
};
};
trips {
cpu_alert0: cpu_alert0 {
/* milliCelsius */
temperature = <75000>;
hysteresis = <2000>;
type = "passive";
};
gpu_alert0: gpu_alert0 {
/* milliCelsius */
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_alert1: cpu_alert1 {
/* milliCelsius */
temperature = <90000>;
hysteresis = <2000>;
type = "hot";
};
gpu_alert1: gpu_alert1 {
/* milliCelsius */
temperature = <95000>;
hysteresis = <2000>;
type = "hot";
};
cpu_crit: cpu_crit {
/* milliCelsius */
temperature = <110000>;
hysteresis = <2000>;
type = "critical";
};
};
};
};
};
&ccu {
compatible = "allwinner,sun8i-a33-ccu";
};
&mali {
operating-points-v2 = <&mali_opp_table>;
};
&pio {
compatible = "allwinner,sun8i-a33-pinctrl";
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,

2
arch/arm/boot/dts/sun8i-a83t.dtsi
View File

@ -47,8 +47,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
interrupt-parent = <&gic>;

1
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
View File

@ -49,7 +49,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Zero";

1
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Banana Pi BPI-M2-Plus";

11
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Beelink X2";
@ -138,6 +137,16 @@
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&ohci1 {
status = "okay";
};

96
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts Normal file
View File

@ -0,0 +1,96 @@
/*
* Copyright (C) 2017 Jelle van der Waa <jelle@vdwaa.nl>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "FriendlyARM NanoPi NEO Air";
compatible = "friendlyarm,nanopi-neo-air", "allwinner,sun8i-h3";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
pwr {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
status {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
};
};
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
cd-inverted;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&usbphy {
/* USB VBUS is always on */
status = "okay";
};

1
arch/arm/boot/dts/sun8i-h3-nanopi.dtsi
View File

@ -47,7 +47,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
aliases {

1
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi 2";

1
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi Lite";

1
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi One";

1
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts
View File

@ -46,7 +46,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Xunlong Orange Pi PC";

1
arch/arm/boot/dts/sun9i-a80-cubieboard4.dts
View File

@ -47,7 +47,6 @@
#include "sun9i-a80.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Cubietech Cubieboard4";

1
arch/arm/boot/dts/sun9i-a80-optimus.dts
View File

@ -46,7 +46,6 @@
#include "sun9i-a80.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
/ {
model = "Merrii A80 Optimus Board";

2
arch/arm/boot/dts/sun9i-a80.dtsi
View File

@ -46,8 +46,6 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include <dt-bindings/clock/sun9i-a80-ccu.h>
#include <dt-bindings/clock/sun9i-a80-de.h>
#include <dt-bindings/clock/sun9i-a80-usb.h>

1
arch/arm/boot/dts/sunxi-common-regulators.dtsi
View File

@ -43,7 +43,6 @@
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
&pio {
ahci_pwr_pin_a: ahci_pwr_pin@0 {

1
arch/arm/boot/dts/sunxi-reference-design-tablet.dtsi
View File

@ -42,7 +42,6 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>
#include "sunxi-common-regulators.dtsi"
&i2c0 {