KVM: arm/arm64: Don't assume initialized vgic when setting PMU IRQ
The PMU IRQ number is set through the VCPU device's KVM_SET_DEVICE_ATTR ioctl handler for the KVM_ARM_VCPU_PMU_V3_IRQ attribute, but there is no enforced or stated requirement that this must happen after initializing the VGIC. As a result, calling vgic_valid_spi() which relies on the nr_spis being set during the VGIC init can incorrectly fail. Introduce irq_is_spi, which determines if an IRQ number is within the SPI range without verifying it against the actual VGIC properties. Signed-off-by: Christoffer Dall <cdall@linaro.org> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -39,6 +39,8 @@
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#define KVM_IRQCHIP_NUM_PINS (1020 - 32)
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#define KVM_IRQCHIP_NUM_PINS (1020 - 32)
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#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
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#define irq_is_ppi(irq) ((irq) >= VGIC_NR_SGIS && (irq) < VGIC_NR_PRIVATE_IRQS)
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#define irq_is_spi(irq) ((irq) >= VGIC_NR_PRIVATE_IRQS && \
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(irq) <= VGIC_MAX_SPI)
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enum vgic_type {
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enum vgic_type {
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VGIC_V2, /* Good ol' GICv2 */
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VGIC_V2, /* Good ol' GICv2 */
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@ -458,10 +458,24 @@ int kvm_arm_pmu_v3_enable(struct kvm_vcpu *vcpu)
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/*
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/*
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* A valid interrupt configuration for the PMU is either to have a
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* A valid interrupt configuration for the PMU is either to have a
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* properly configured interrupt number and using an in-kernel
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* properly configured interrupt number and using an in-kernel
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* irqchip, or to neither set an IRQ nor create an in-kernel irqchip.
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* irqchip, or to not have an in-kernel GIC and not set an IRQ.
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*/
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*/
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if (kvm_arm_pmu_irq_initialized(vcpu) != irqchip_in_kernel(vcpu->kvm))
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if (irqchip_in_kernel(vcpu->kvm)) {
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return -EINVAL;
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int irq = vcpu->arch.pmu.irq_num;
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if (!kvm_arm_pmu_irq_initialized(vcpu))
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return -EINVAL;
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/*
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* If we are using an in-kernel vgic, at this point we know
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* the vgic will be initialized, so we can check the PMU irq
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* number against the dimensions of the vgic and make sure
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* it's valid.
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*/
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if (!irq_is_ppi(irq) && !vgic_valid_spi(vcpu->kvm, irq))
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return -EINVAL;
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} else if (kvm_arm_pmu_irq_initialized(vcpu)) {
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return -EINVAL;
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}
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kvm_pmu_vcpu_reset(vcpu);
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kvm_pmu_vcpu_reset(vcpu);
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vcpu->arch.pmu.ready = true;
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vcpu->arch.pmu.ready = true;
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@ -547,7 +561,7 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
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return -EFAULT;
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return -EFAULT;
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/* The PMU overflow interrupt can be a PPI or a valid SPI. */
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/* The PMU overflow interrupt can be a PPI or a valid SPI. */
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if (!(irq_is_ppi(irq) || vgic_valid_spi(vcpu->kvm, irq)))
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if (!(irq_is_ppi(irq) || irq_is_spi(irq)))
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return -EINVAL;
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return -EINVAL;
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if (!pmu_irq_is_valid(vcpu->kvm, irq))
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if (!pmu_irq_is_valid(vcpu->kvm, irq))
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