ide: add "vlb|pci_clock=" parameter
* Add "vlb_clock=" parameter for specifying VLB clock frequency (in MHz). * Add "pci_clock=" parameter for specifying PCI bus clock frequency (in MHz). While at it: * qd65xx.c: rename {active,recovery}_cycle variables to {act,rec}_cyc. Cc: Alan Cox <alan@lxorguk.ukuu.org.uk> Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
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10569713c7
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@ -1116,6 +1116,18 @@ static void ide_port_class_release(struct device *portdev)
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put_device(&hwif->gendev);
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}
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int ide_vlb_clk;
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EXPORT_SYMBOL_GPL(ide_vlb_clk);
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module_param_named(vlb_clock, ide_vlb_clk, int, 0);
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MODULE_PARM_DESC(vlb_clock, "VLB clock frequency (in MHz)");
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int ide_pci_clk;
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EXPORT_SYMBOL_GPL(ide_pci_clk);
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module_param_named(pci_clock, ide_pci_clk, int, 0);
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MODULE_PARM_DESC(pci_clock, "PCI bus clock frequency (in MHz)");
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static unsigned int ide_ignore_cable;
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static int ide_set_ignore_cable(const char *s, struct kernel_param *kp)
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@ -116,7 +116,7 @@ static void ali14xx_set_pio_mode(ide_drive_t *drive, const u8 pio)
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int time1, time2;
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u8 param1, param2, param3, param4;
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unsigned long flags;
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int bus_speed = system_bus_clock();
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int bus_speed = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
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/* calculate timing, according to PIO mode */
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time1 = ide_pio_cycle_time(drive, pio);
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@ -212,8 +212,8 @@ static u8 ht_pio2timings(ide_drive_t *drive, const u8 pio)
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{
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int active_time, recovery_time;
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int active_cycles, recovery_cycles;
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int bus_speed = system_bus_clock();
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int bus_speed = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
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if (pio) {
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unsigned int cycle_time;
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@ -114,17 +114,18 @@ static void qd65xx_select(ide_drive_t *drive)
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static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
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{
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u8 active_cycle,recovery_cycle;
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int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
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u8 act_cyc, rec_cyc;
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if (system_bus_clock()<=33) {
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active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
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recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
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if (clk <= 33) {
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act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
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rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
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} else {
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active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
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recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
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act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
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rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
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}
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return((recovery_cycle<<4) | 0x08 | active_cycle);
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return (rec_cyc << 4) | 0x08 | act_cyc;
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}
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/*
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@ -135,10 +136,13 @@ static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery
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static u8 qd6580_compute_timing (int active_time, int recovery_time)
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{
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u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
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u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
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int clk = ide_vlb_clk ? ide_vlb_clk : system_bus_clock();
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u8 act_cyc, rec_cyc;
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return((recovery_cycle<<4) | active_cycle);
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act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
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rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
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return (rec_cyc << 4) | act_cyc;
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}
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/*
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@ -140,7 +140,7 @@ static void aec_set_pio_mode(ide_drive_t *drive, const u8 pio)
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static unsigned int __devinit init_chipset_aec62xx(struct pci_dev *dev, const char *name)
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{
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int bus_speed = system_bus_clock();
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int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
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if (bus_speed <= 33)
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pci_set_drvdata(dev, (void *) aec6xxx_33_base);
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@ -294,7 +294,7 @@ static void ali_set_pio_mode(ide_drive_t *drive, const u8 pio)
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int s_time, a_time, c_time;
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u8 s_clc, a_clc, r_clc;
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unsigned long flags;
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int bus_speed = system_bus_clock();
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int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
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int port = hwif->channel ? 0x5c : 0x58;
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int portFIFO = hwif->channel ? 0x55 : 0x54;
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u8 cd_dma_fifo = 0;
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@ -179,7 +179,7 @@ static unsigned int __devinit init_chipset_amd74xx(struct pci_dev *dev,
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* Determine the system bus clock.
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*/
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amd_clock = system_bus_clock() * 1000;
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amd_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
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switch (amd_clock) {
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case 33000: amd_clock = 33333; break;
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@ -552,7 +552,14 @@ static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
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{
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int setup_time, active_time, recovery_time, clock_time;
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u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
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int bus_speed = system_bus_clock();
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int bus_speed;
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if (cmd640_vlb && ide_vlb_clk)
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bus_speed = ide_vlb_clk;
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else if (!cmd640_vlb && ide_pci_clk)
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bus_speed = ide_pci_clk;
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else
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bus_speed = system_bus_clock();
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if (pio_mode > 5)
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pio_mode = 5;
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@ -68,8 +68,8 @@ static u8 quantize_timing(int timing, int quant)
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*/
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static void program_cycle_times (ide_drive_t *drive, int cycle_time, int active_time)
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{
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struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
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int clock_time = 1000 / system_bus_clock();
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struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
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int clock_time = 1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock());
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u8 cycle_count, active_count, recovery_count, drwtim;
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static const u8 recovery_values[] =
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{15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
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@ -128,7 +128,7 @@ static void cmd64x_tune_pio(ide_drive_t *drive, const u8 pio)
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ide_pio_timings[pio].active_time);
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setup_count = quantize_timing(ide_pio_timings[pio].setup_time,
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1000 / system_bus_clock());
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1000 / (ide_pci_clk ? ide_pci_clk : system_bus_clock()));
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/*
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* The primary channel has individual address setup timing registers
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@ -136,7 +136,7 @@ static int calc_clk(int time, int bus_speed)
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static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
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{
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int clk1, clk2;
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int bus_speed = system_bus_clock(); /* get speed of PCI bus */
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int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
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/* we don't check against CY82C693's min and max speed,
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* so you can play with the idebus=xx parameter
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@ -210,7 +210,7 @@ static void compute_clocks(int pio, pio_clocks_t *clks)
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{
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if (pio != PIO_NOT_EXIST) {
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int adr_setup, data_pls;
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int bus_speed = system_bus_clock();
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int bus_speed = ide_pci_clk ? ide_pci_clk : system_bus_clock();
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adr_setup = ide_pio_timings[pio].setup_time;
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data_pls = ide_pio_timings[pio].active_time;
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@ -340,7 +340,7 @@ static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const
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* Determine system bus clock.
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*/
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via_clock = system_bus_clock() * 1000;
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via_clock = (ide_pci_clk ? ide_pci_clk : system_bus_clock()) * 1000;
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switch (via_clock) {
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case 33000: via_clock = 33333; break;
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@ -801,6 +801,9 @@ extern ide_hwif_t ide_hwifs[]; /* master data repository */
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#endif
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extern int noautodma;
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extern int ide_vlb_clk;
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extern int ide_pci_clk;
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ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
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static inline ide_hwif_t *ide_find_port(void)
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