ARM: dts: stm32: fix spi1 pin assignment on stm32mp15
[ Upstream commit1b9f0ec81a
] Bank A and B IOs can't be handled by the pin controller 'Z'. This patch assign spi1 pin definition to the correct controller. Fixes:9ad65d245b
("ARM: dts: stm32: stm32mp15-pinctrl: add spi1-1 pinmux group") Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -1880,6 +1880,21 @@
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spi1_pins_b: spi1-1 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
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<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
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bias-disable;
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drive-push-pull;
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slew-rate = <1>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
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bias-disable;
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};
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};
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spi2_pins_a: spi2-0 {
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pins1 {
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pinmux = <STM32_PINMUX('B', 10, AF5)>, /* SPI2_SCK */
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@ -2448,19 +2463,4 @@
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bias-disable;
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};
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};
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spi1_pins_b: spi1-1 {
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pins1 {
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pinmux = <STM32_PINMUX('A', 5, AF5)>, /* SPI1_SCK */
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<STM32_PINMUX('B', 5, AF5)>; /* SPI1_MOSI */
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bias-disable;
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drive-push-pull;
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slew-rate = <1>;
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};
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pins2 {
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pinmux = <STM32_PINMUX('A', 6, AF5)>; /* SPI1_MISO */
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bias-disable;
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};
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};
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};
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