dt-bindings: aspeed-lpc: Document LPC Host Interface Controller
The LPC Host Interface Controller is part of a BMC SoC that is used for communication with the host. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -109,9 +109,50 @@ lpc: lpc@1e789000 {
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};
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};
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BMC Node Children
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==================
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Host Node Children
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==================
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LPC Host Interface Controller
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-------------------
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The LPC Host Interface Controller manages functions exposed to the host such as
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LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
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management and bus snoop configuration.
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Required properties:
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- compatible: One of:
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"aspeed,ast2400-lpc-ctrl";
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"aspeed,ast2500-lpc-ctrl";
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- reg: contains offset/length values of the host interface controller
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memory regions
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- clocks: contains a phandle to the syscon node describing the clocks.
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There should then be one cell representing the clock to use
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- memory-region: A phandle to a reserved_memory region to be used for the LPC
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to AHB mapping
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- flash: A phandle to the SPI flash controller containing the flash to
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be exposed over the LPC to AHB mapping
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Example:
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lpc-host@80 {
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lpc_ctrl: lpc-ctrl@0 {
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compatible = "aspeed,ast2500-lpc-ctrl";
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reg = <0x0 0x80>;
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clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
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memory-region = <&flash_memory>;
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flash = <&spi>;
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};
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};
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LPC Host Controller
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-------------------
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