Merge branch 'drm-fixes-3.19' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
some minor radeon fixes. * 'drm-fixes-3.19' of git://people.freedesktop.org/~agd5f/linux: drm/radeon: integer underflow in radeon_cp_dispatch_texture() drm/radeon: adjust default bapm settings for KV drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw drm/radeon: fix sad_count check for dce3 drm/radeon: KV has three PPLLs (v2)
This commit is contained in:
commit
eaee8ec4eb
|
@ -1851,10 +1851,9 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
|
||||||
return pll;
|
return pll;
|
||||||
}
|
}
|
||||||
/* otherwise, pick one of the plls */
|
/* otherwise, pick one of the plls */
|
||||||
if ((rdev->family == CHIP_KAVERI) ||
|
if ((rdev->family == CHIP_KABINI) ||
|
||||||
(rdev->family == CHIP_KABINI) ||
|
|
||||||
(rdev->family == CHIP_MULLINS)) {
|
(rdev->family == CHIP_MULLINS)) {
|
||||||
/* KB/KV/ML has PPLL1 and PPLL2 */
|
/* KB/ML has PPLL1 and PPLL2 */
|
||||||
pll_in_use = radeon_get_pll_use_mask(crtc);
|
pll_in_use = radeon_get_pll_use_mask(crtc);
|
||||||
if (!(pll_in_use & (1 << ATOM_PPLL2)))
|
if (!(pll_in_use & (1 << ATOM_PPLL2)))
|
||||||
return ATOM_PPLL2;
|
return ATOM_PPLL2;
|
||||||
|
@ -1863,7 +1862,7 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc)
|
||||||
DRM_ERROR("unable to allocate a PPLL\n");
|
DRM_ERROR("unable to allocate a PPLL\n");
|
||||||
return ATOM_PPLL_INVALID;
|
return ATOM_PPLL_INVALID;
|
||||||
} else {
|
} else {
|
||||||
/* CI has PPLL0, PPLL1, and PPLL2 */
|
/* CI/KV has PPLL0, PPLL1, and PPLL2 */
|
||||||
pll_in_use = radeon_get_pll_use_mask(crtc);
|
pll_in_use = radeon_get_pll_use_mask(crtc);
|
||||||
if (!(pll_in_use & (1 << ATOM_PPLL2)))
|
if (!(pll_in_use & (1 << ATOM_PPLL2)))
|
||||||
return ATOM_PPLL2;
|
return ATOM_PPLL2;
|
||||||
|
@ -2155,6 +2154,7 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
|
||||||
case ATOM_PPLL0:
|
case ATOM_PPLL0:
|
||||||
/* disable the ppll */
|
/* disable the ppll */
|
||||||
if ((rdev->family == CHIP_ARUBA) ||
|
if ((rdev->family == CHIP_ARUBA) ||
|
||||||
|
(rdev->family == CHIP_KAVERI) ||
|
||||||
(rdev->family == CHIP_BONAIRE) ||
|
(rdev->family == CHIP_BONAIRE) ||
|
||||||
(rdev->family == CHIP_HAWAII))
|
(rdev->family == CHIP_HAWAII))
|
||||||
atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
|
atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
|
||||||
|
|
|
@ -492,6 +492,10 @@ int radeon_dp_mode_valid_helper(struct drm_connector *connector,
|
||||||
struct radeon_connector_atom_dig *dig_connector;
|
struct radeon_connector_atom_dig *dig_connector;
|
||||||
int dp_clock;
|
int dp_clock;
|
||||||
|
|
||||||
|
if ((mode->clock > 340000) &&
|
||||||
|
(!radeon_connector_is_dp12_capable(connector)))
|
||||||
|
return MODE_CLOCK_HIGH;
|
||||||
|
|
||||||
if (!radeon_connector->con_priv)
|
if (!radeon_connector->con_priv)
|
||||||
return MODE_CLOCK_HIGH;
|
return MODE_CLOCK_HIGH;
|
||||||
dig_connector = radeon_connector->con_priv;
|
dig_connector = radeon_connector->con_priv;
|
||||||
|
|
|
@ -103,7 +103,7 @@ static void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder)
|
||||||
}
|
}
|
||||||
|
|
||||||
sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
|
sad_count = drm_edid_to_sad(radeon_connector->edid, &sads);
|
||||||
if (sad_count < 0) {
|
if (sad_count <= 0) {
|
||||||
DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
|
DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
|
@ -2745,13 +2745,11 @@ int kv_dpm_init(struct radeon_device *rdev)
|
||||||
pi->enable_auto_thermal_throttling = true;
|
pi->enable_auto_thermal_throttling = true;
|
||||||
pi->disable_nb_ps3_in_battery = false;
|
pi->disable_nb_ps3_in_battery = false;
|
||||||
if (radeon_bapm == -1) {
|
if (radeon_bapm == -1) {
|
||||||
/* There are stability issues reported on with
|
/* only enable bapm on KB, ML by default */
|
||||||
* bapm enabled on an asrock system.
|
if (rdev->family == CHIP_KABINI || rdev->family == CHIP_MULLINS)
|
||||||
*/
|
|
||||||
if (rdev->pdev->subsystem_vendor == 0x1849)
|
|
||||||
pi->bapm_enable = false;
|
|
||||||
else
|
|
||||||
pi->bapm_enable = true;
|
pi->bapm_enable = true;
|
||||||
|
else
|
||||||
|
pi->bapm_enable = false;
|
||||||
} else if (radeon_bapm == 0) {
|
} else if (radeon_bapm == 0) {
|
||||||
pi->bapm_enable = false;
|
pi->bapm_enable = false;
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -1703,7 +1703,7 @@ static int radeon_cp_dispatch_texture(struct drm_device * dev,
|
||||||
u32 format;
|
u32 format;
|
||||||
u32 *buffer;
|
u32 *buffer;
|
||||||
const u8 __user *data;
|
const u8 __user *data;
|
||||||
int size, dwords, tex_width, blit_width, spitch;
|
unsigned int size, dwords, tex_width, blit_width, spitch;
|
||||||
u32 height;
|
u32 height;
|
||||||
int i;
|
int i;
|
||||||
u32 texpitch, microtile;
|
u32 texpitch, microtile;
|
||||||
|
|
Loading…
Reference in New Issue