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ath9k: use REG_RMW and rmw buffer in ath9k_hw_def_set_gain 

Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Oleksij Rempel 2015-03-22 19:30:03 +01:00 committed by Kalle Valo
parent b1c1a26461
commit eaa4059d56
1 changed files with 14 additions and 20 deletions
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34
drivers/net/wireless/ath/ath9k/eeprom_def.c
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@ -466,6 +466,7 @@ static void ath9k_hw_def_set_gain(struct ath_hw *ah,
struct ar5416_eeprom_def *eep, struct ar5416_eeprom_def *eep,
u8 txRxAttenLocal, int regChainOffset, int i) u8 txRxAttenLocal, int regChainOffset, int i)
{ {
ENABLE_REG_RMW_BUFFER(ah);
if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) { if (AR5416_VER_MASK >= AR5416_EEP_MINOR_VER_3) {
txRxAttenLocal = pModal->txRxAttenCh[i]; txRxAttenLocal = pModal->txRxAttenCh[i];
@ -483,16 +484,12 @@ static void ath9k_hw_def_set_gain(struct ath_hw *ah,
AR_PHY_GAIN_2GHZ_XATTEN2_DB, AR_PHY_GAIN_2GHZ_XATTEN2_DB,
pModal->xatten2Db[i]); pModal->xatten2Db[i]);
} else { } else {
REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset, REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
(REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) & SM(pModal-> bswMargin[i], AR_PHY_GAIN_2GHZ_BSW_MARGIN),
~AR_PHY_GAIN_2GHZ_BSW_MARGIN) AR_PHY_GAIN_2GHZ_BSW_MARGIN);
| SM(pModal-> bswMargin[i], REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
AR_PHY_GAIN_2GHZ_BSW_MARGIN)); SM(pModal->bswAtten[i], AR_PHY_GAIN_2GHZ_BSW_ATTEN),
REG_WRITE(ah, AR_PHY_GAIN_2GHZ + regChainOffset, AR_PHY_GAIN_2GHZ_BSW_ATTEN);
(REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
~AR_PHY_GAIN_2GHZ_BSW_ATTEN)
| SM(pModal->bswAtten[i],
AR_PHY_GAIN_2GHZ_BSW_ATTEN));
} }
} }
@ -504,17 +501,14 @@ static void ath9k_hw_def_set_gain(struct ath_hw *ah,
AR_PHY_RXGAIN + regChainOffset, AR_PHY_RXGAIN + regChainOffset,
AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]); AR9280_PHY_RXGAIN_TXRX_MARGIN, pModal->rxTxMarginCh[i]);
} else { } else {
REG_WRITE(ah, REG_RMW(ah, AR_PHY_RXGAIN + regChainOffset,
AR_PHY_RXGAIN + regChainOffset, SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN),
(REG_READ(ah, AR_PHY_RXGAIN + regChainOffset) & AR_PHY_RXGAIN_TXRX_ATTEN);
~AR_PHY_RXGAIN_TXRX_ATTEN) REG_RMW(ah, AR_PHY_GAIN_2GHZ + regChainOffset,
| SM(txRxAttenLocal, AR_PHY_RXGAIN_TXRX_ATTEN)); SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN),
REG_WRITE(ah, AR_PHY_GAIN_2GHZ_RXTX_MARGIN);
AR_PHY_GAIN_2GHZ + regChainOffset,
(REG_READ(ah, AR_PHY_GAIN_2GHZ + regChainOffset) &
~AR_PHY_GAIN_2GHZ_RXTX_MARGIN) |
SM(pModal->rxTxMarginCh[i], AR_PHY_GAIN_2GHZ_RXTX_MARGIN));
} }
REG_RMW_BUFFER_FLUSH(ah);
} }
static void ath9k_hw_def_set_board_values(struct ath_hw *ah, static void ath9k_hw_def_set_board_values(struct ath_hw *ah,