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linux-sg2042
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Merge branch 'fix/asoc' into for-linus

This commit is contained in:
Takashi Iwai 2011-01-02 11:01:55 +01:00
parent e03fa055bc 776065e36d
commit ea78484bd5
12 changed files with 164 additions and 226 deletions
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10
sound/soc/codecs/max98088.c
View File

@ -40,7 +40,6 @@ struct max98088_cdata {
};
struct max98088_priv {
u8 reg_cache[M98088_REG_CNT];
enum max98088_type devtype;
void *control_data;
struct max98088_pdata *pdata;
@ -1588,7 +1587,7 @@ static int max98088_dai2_set_fmt(struct snd_soc_dai *codec_dai,
static void max98088_sync_cache(struct snd_soc_codec *codec)
{
struct max98088_priv *max98088 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int i;
if (!codec->cache_sync)
@ -1599,14 +1598,14 @@ static void max98088_sync_cache(struct snd_soc_codec *codec)
/* write back cached values if they're writeable and
* different from the hardware default.
*/
for (i = 1; i < ARRAY_SIZE(max98088->reg_cache); i++) {
for (i = 1; i < codec->driver->reg_cache_size; i++) {
if (!max98088_access[i].writable)
continue;
if (max98088->reg_cache[i] == max98088_reg[i])
if (reg_cache[i] == max98088_reg[i])
continue;
snd_soc_write(codec, i, max98088->reg_cache[i]);
snd_soc_write(codec, i, reg_cache[i]);
}
codec->cache_sync = 0;
@ -1951,7 +1950,6 @@ static int max98088_probe(struct snd_soc_codec *codec)
int ret = 0;
codec->cache_sync = 1;
memcpy(codec->reg_cache, max98088_reg, sizeof(max98088_reg));
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
if (ret != 0) {

9
sound/soc/codecs/wm8523.c
View File

@ -41,7 +41,6 @@ static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
/* codec private data */
struct wm8523_priv {
enum snd_soc_control_type control_type;
u16 reg_cache[WM8523_REGISTER_COUNT];
struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
unsigned int sysclk;
unsigned int rate_constraint_list[WM8523_NUM_RATES];
@ -314,6 +313,7 @@ static int wm8523_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int ret, i;
switch (level) {
@ -344,7 +344,7 @@ static int wm8523_set_bias_level(struct snd_soc_codec *codec,
/* Sync back default/cached values */
for (i = WM8523_AIF_CTRL1;
i < WM8523_MAX_REGISTER; i++)
snd_soc_write(codec, i, wm8523->reg_cache[i]);
snd_soc_write(codec, i, reg_cache[i]);
msleep(100);
@ -414,6 +414,7 @@ static int wm8523_resume(struct snd_soc_codec *codec)
static int wm8523_probe(struct snd_soc_codec *codec)
{
struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int ret, i;
codec->hw_write = (hw_write_t)i2c_master_send;
@ -470,8 +471,8 @@ static int wm8523_probe(struct snd_soc_codec *codec)
}
/* Change some default settings - latch VU and enable ZC */
wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

10
sound/soc/codecs/wm8741.c
View File

@ -41,7 +41,6 @@ static const char *wm8741_supply_names[WM8741_NUM_SUPPLIES] = {
/* codec private data */
struct wm8741_priv {
enum snd_soc_control_type control_type;
u16 reg_cache[WM8741_REGISTER_COUNT];
struct regulator_bulk_data supplies[WM8741_NUM_SUPPLIES];
unsigned int sysclk;
struct snd_pcm_hw_constraint_list *sysclk_constraints;
@ -422,6 +421,7 @@ static int wm8741_resume(struct snd_soc_codec *codec)
static int wm8741_probe(struct snd_soc_codec *codec)
{
struct wm8741_priv *wm8741 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int ret = 0;
ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8741->control_type);
@ -437,10 +437,10 @@ static int wm8741_probe(struct snd_soc_codec *codec)
}
/* Change some default settings - latch VU */
wm8741->reg_cache[WM8741_DACLLSB_ATTENUATION] |= WM8741_UPDATELL;
wm8741->reg_cache[WM8741_DACLMSB_ATTENUATION] |= WM8741_UPDATELM;
wm8741->reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERL;
wm8741->reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERM;
reg_cache[WM8741_DACLLSB_ATTENUATION] |= WM8741_UPDATELL;
reg_cache[WM8741_DACLMSB_ATTENUATION] |= WM8741_UPDATELM;
reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERL;
reg_cache[WM8741_DACRLSB_ATTENUATION] |= WM8741_UPDATERM;
snd_soc_add_controls(codec, wm8741_snd_controls,
ARRAY_SIZE(wm8741_snd_controls));

226
sound/soc/codecs/wm8753.c
View File

@ -65,22 +65,22 @@ static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
* are using 2 wire for device control, so we cache them instead.
*/
static const u16 wm8753_reg[] = {
0x0008, 0x0000, 0x000a, 0x000a,
0x0033, 0x0000, 0x0007, 0x00ff,
0x00ff, 0x000f, 0x000f, 0x007b,
0x0000, 0x0032, 0x0000, 0x00c3,
0x00c3, 0x00c0, 0x0000, 0x0000,
0x0000, 0x0008, 0x0000, 0x000a,
0x000a, 0x0033, 0x0000, 0x0007,
0x00ff, 0x00ff, 0x000f, 0x000f,
0x007b, 0x0000, 0x0032, 0x0000,
0x00c3, 0x00c3, 0x00c0, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0000,
0x0000, 0x0000, 0x0000, 0x0055,
0x0005, 0x0050, 0x0055, 0x0050,
0x0055, 0x0050, 0x0055, 0x0079,
0x0000, 0x0000, 0x0000, 0x0000,
0x0055, 0x0005, 0x0050, 0x0055,
0x0050, 0x0055, 0x0050, 0x0055,
0x0079, 0x0079, 0x0079, 0x0079,
0x0000, 0x0000, 0x0000, 0x0000,
0x0097, 0x0097, 0x0000, 0x0004,
0x0000, 0x0083, 0x0024, 0x01ba,
0x0000, 0x0083, 0x0024, 0x01ba,
0x0000, 0x0000, 0x0000
0x0079, 0x0000, 0x0000, 0x0000,
0x0000, 0x0097, 0x0097, 0x0000,
0x0004, 0x0000, 0x0083, 0x0024,
0x01ba, 0x0000, 0x0083, 0x0024,
0x01ba, 0x0000, 0x0000, 0x0000
};
/* codec private data */
@ -88,57 +88,10 @@ struct wm8753_priv {
enum snd_soc_control_type control_type;
unsigned int sysclk;
unsigned int pcmclk;
u16 reg_cache[ARRAY_SIZE(wm8753_reg)];
int dai_func;
};
/*
* read wm8753 register cache
*/
static inline unsigned int wm8753_read_reg_cache(struct snd_soc_codec *codec,
unsigned int reg)
{
u16 *cache = codec->reg_cache;
if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
return -1;
return cache[reg - 1];
}
/*
* write wm8753 register cache
*/
static inline void wm8753_write_reg_cache(struct snd_soc_codec *codec,
unsigned int reg, unsigned int value)
{
u16 *cache = codec->reg_cache;
if (reg < 1 || reg >= (ARRAY_SIZE(wm8753_reg) + 1))
return;
cache[reg - 1] = value;
}
/*
* write to the WM8753 register space
*/
static int wm8753_write(struct snd_soc_codec *codec, unsigned int reg,
unsigned int value)
{
u8 data[2];
/* data is
* D15..D9 WM8753 register offset
* D8...D0 register data
*/
data[0] = (reg << 1) | ((value >> 8) & 0x0001);
data[1] = value & 0x00ff;
wm8753_write_reg_cache(codec, reg, value);
if (codec->hw_write(codec->control_data, data, 2) == 2)
return 0;
else
return -EIO;
}
#define wm8753_reset(c) wm8753_write(c, WM8753_RESET, 0)
#define wm8753_reset(c) snd_soc_write(c, WM8753_RESET, 0)
/*
* WM8753 Controls
@ -218,7 +171,7 @@ static int wm8753_get_dai(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
int mode = snd_soc_read(codec, WM8753_IOCTL);
ucontrol->value.integer.value[0] = (mode & 0xc) >> 2;
return 0;
@ -228,7 +181,7 @@ static int wm8753_set_dai(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
int mode = wm8753_read_reg_cache(codec, WM8753_IOCTL);
int mode = snd_soc_read(codec, WM8753_IOCTL);
struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
if (((mode & 0xc) >> 2) == ucontrol->value.integer.value[0])
@ -738,17 +691,17 @@ static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
if (pll_id == WM8753_PLL1) {
offset = 0;
enable = 0x10;
reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xffef;
reg = snd_soc_read(codec, WM8753_CLOCK) & 0xffef;
} else {
offset = 4;
enable = 0x8;
reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfff7;
reg = snd_soc_read(codec, WM8753_CLOCK) & 0xfff7;
}
if (!freq_in || !freq_out) {
/* disable PLL */
wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
wm8753_write(codec, WM8753_CLOCK, reg);
snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0026);
snd_soc_write(codec, WM8753_CLOCK, reg);
return 0;
} else {
u16 value = 0;
@ -759,20 +712,20 @@ static int wm8753_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
/* set up N and K PLL divisor ratios */
/* bits 8:5 = PLL_N, bits 3:0 = PLL_K[21:18] */
value = (pll_div.n << 5) + ((pll_div.k & 0x3c0000) >> 18);
wm8753_write(codec, WM8753_PLL1CTL2 + offset, value);
snd_soc_write(codec, WM8753_PLL1CTL2 + offset, value);
/* bits 8:0 = PLL_K[17:9] */
value = (pll_div.k & 0x03fe00) >> 9;
wm8753_write(codec, WM8753_PLL1CTL3 + offset, value);
snd_soc_write(codec, WM8753_PLL1CTL3 + offset, value);
/* bits 8:0 = PLL_K[8:0] */
value = pll_div.k & 0x0001ff;
wm8753_write(codec, WM8753_PLL1CTL4 + offset, value);
snd_soc_write(codec, WM8753_PLL1CTL4 + offset, value);
/* set PLL as input and enable */
wm8753_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
snd_soc_write(codec, WM8753_PLL1CTL1 + offset, 0x0027 |
(pll_div.div2 << 3));
wm8753_write(codec, WM8753_CLOCK, reg | enable);
snd_soc_write(codec, WM8753_CLOCK, reg | enable);
}
return 0;
}
@ -879,7 +832,7 @@ static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01ec;
u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01ec;
/* interface format */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
@ -901,7 +854,7 @@ static int wm8753_vdac_adc_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
wm8753_write(codec, WM8753_PCM, voice);
snd_soc_write(codec, WM8753_PCM, voice);
return 0;
}
@ -922,8 +875,8 @@ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_codec *codec = rtd->codec;
struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
u16 voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x01f3;
u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x017f;
u16 voice = snd_soc_read(codec, WM8753_PCM) & 0x01f3;
u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x017f;
/* bit size */
switch (params_format(params)) {
@ -943,9 +896,9 @@ static int wm8753_pcm_hw_params(struct snd_pcm_substream *substream,
/* sample rate */
if (params_rate(params) * 384 == wm8753->pcmclk)
srate |= 0x80;
wm8753_write(codec, WM8753_SRATE1, srate);
snd_soc_write(codec, WM8753_SRATE1, srate);
wm8753_write(codec, WM8753_PCM, voice);
snd_soc_write(codec, WM8753_PCM, voice);
return 0;
}
@ -958,8 +911,8 @@ static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
struct snd_soc_codec *codec = codec_dai->codec;
u16 voice, ioctl;
voice = wm8753_read_reg_cache(codec, WM8753_PCM) & 0x011f;
ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x015d;
voice = snd_soc_read(codec, WM8753_PCM) & 0x011f;
ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x015d;
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@ -1013,8 +966,8 @@ static int wm8753_pcm_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
wm8753_write(codec, WM8753_PCM, voice);
wm8753_write(codec, WM8753_IOCTL, ioctl);
snd_soc_write(codec, WM8753_PCM, voice);
snd_soc_write(codec, WM8753_IOCTL, ioctl);
return 0;
}
@ -1026,16 +979,16 @@ static int wm8753_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
switch (div_id) {
case WM8753_PCMDIV:
reg = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0x003f;
wm8753_write(codec, WM8753_CLOCK, reg | div);
reg = snd_soc_read(codec, WM8753_CLOCK) & 0x003f;
snd_soc_write(codec, WM8753_CLOCK, reg | div);
break;
case WM8753_BCLKDIV:
reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x01c7;
wm8753_write(codec, WM8753_SRATE2, reg | div);
reg = snd_soc_read(codec, WM8753_SRATE2) & 0x01c7;
snd_soc_write(codec, WM8753_SRATE2, reg | div);
break;
case WM8753_VXCLKDIV:
reg = wm8753_read_reg_cache(codec, WM8753_SRATE2) & 0x003f;
wm8753_write(codec, WM8753_SRATE2, reg | div);
reg = snd_soc_read(codec, WM8753_SRATE2) & 0x003f;
snd_soc_write(codec, WM8753_SRATE2, reg | div);
break;
default:
return -EINVAL;
@ -1050,7 +1003,7 @@ static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
unsigned int fmt)
{
struct snd_soc_codec *codec = codec_dai->codec;
u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01e0;
u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01e0;
/* interface format */
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
@ -1072,7 +1025,7 @@ static int wm8753_hdac_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
wm8753_write(codec, WM8753_HIFI, hifi);
snd_soc_write(codec, WM8753_HIFI, hifi);
return 0;
}
@ -1085,8 +1038,8 @@ static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
struct snd_soc_codec *codec = codec_dai->codec;
u16 ioctl, hifi;
hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x011f;
ioctl = wm8753_read_reg_cache(codec, WM8753_IOCTL) & 0x00ae;
hifi = snd_soc_read(codec, WM8753_HIFI) & 0x011f;
ioctl = snd_soc_read(codec, WM8753_IOCTL) & 0x00ae;
/* set master/slave audio interface */
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
@ -1140,8 +1093,8 @@ static int wm8753_i2s_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
wm8753_write(codec, WM8753_HIFI, hifi);
wm8753_write(codec, WM8753_IOCTL, ioctl);
snd_soc_write(codec, WM8753_HIFI, hifi);
snd_soc_write(codec, WM8753_IOCTL, ioctl);
return 0;
}
@ -1162,8 +1115,8 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
struct snd_soc_pcm_runtime *rtd = substream->private_data;
struct snd_soc_codec *codec = rtd->codec;
struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
u16 srate = wm8753_read_reg_cache(codec, WM8753_SRATE1) & 0x01c0;
u16 hifi = wm8753_read_reg_cache(codec, WM8753_HIFI) & 0x01f3;
u16 srate = snd_soc_read(codec, WM8753_SRATE1) & 0x01c0;
u16 hifi = snd_soc_read(codec, WM8753_HIFI) & 0x01f3;
int coeff;
/* is digital filter coefficient valid ? */
@ -1172,7 +1125,7 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
printk(KERN_ERR "wm8753 invalid MCLK or rate\n");
return coeff;
}
wm8753_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
snd_soc_write(codec, WM8753_SRATE1, srate | (coeff_div[coeff].sr << 1) |
coeff_div[coeff].usb);
/* bit size */
@ -1190,7 +1143,7 @@ static int wm8753_i2s_hw_params(struct snd_pcm_substream *substream,
break;
}
wm8753_write(codec, WM8753_HIFI, hifi);
snd_soc_write(codec, WM8753_HIFI, hifi);
return 0;
}
@ -1201,8 +1154,8 @@ static int wm8753_mode1v_set_dai_fmt(struct snd_soc_dai *codec_dai,
u16 clock;
/* set clk source as pcmclk */
clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
wm8753_write(codec, WM8753_CLOCK, clock);
clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
snd_soc_write(codec, WM8753_CLOCK, clock);
if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
return -EINVAL;
@ -1224,8 +1177,8 @@ static int wm8753_mode2_set_dai_fmt(struct snd_soc_dai *codec_dai,
u16 clock;
/* set clk source as pcmclk */
clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
wm8753_write(codec, WM8753_CLOCK, clock);
clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
snd_soc_write(codec, WM8753_CLOCK, clock);
if (wm8753_vdac_adc_set_dai_fmt(codec_dai, fmt) < 0)
return -EINVAL;
@ -1239,8 +1192,8 @@ static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
u16 clock;
/* set clk source as mclk */
clock = wm8753_read_reg_cache(codec, WM8753_CLOCK) & 0xfffb;
wm8753_write(codec, WM8753_CLOCK, clock | 0x4);
clock = snd_soc_read(codec, WM8753_CLOCK) & 0xfffb;
snd_soc_write(codec, WM8753_CLOCK, clock | 0x4);
if (wm8753_hdac_set_dai_fmt(codec_dai, fmt) < 0)
return -EINVAL;
@ -1252,19 +1205,19 @@ static int wm8753_mode3_4_set_dai_fmt(struct snd_soc_dai *codec_dai,
static int wm8753_mute(struct snd_soc_dai *dai, int mute)
{
struct snd_soc_codec *codec = dai->codec;
u16 mute_reg = wm8753_read_reg_cache(codec, WM8753_DAC) & 0xfff7;
u16 mute_reg = snd_soc_read(codec, WM8753_DAC) & 0xfff7;
struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
/* the digital mute covers the HiFi and Voice DAC's on the WM8753.
* make sure we check if they are not both active when we mute */
if (mute && wm8753->dai_func == 1) {
if (!codec->active)
wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
} else {
if (mute)
wm8753_write(codec, WM8753_DAC, mute_reg | 0x8);
snd_soc_write(codec, WM8753_DAC, mute_reg | 0x8);
else
wm8753_write(codec, WM8753_DAC, mute_reg);
snd_soc_write(codec, WM8753_DAC, mute_reg);
}
return 0;
@ -1273,23 +1226,23 @@ static int wm8753_mute(struct snd_soc_dai *dai, int mute)
static int wm8753_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
u16 pwr_reg = wm8753_read_reg_cache(codec, WM8753_PWR1) & 0xfe3e;
u16 pwr_reg = snd_soc_read(codec, WM8753_PWR1) & 0xfe3e;
switch (level) {
case SND_SOC_BIAS_ON:
/* set vmid to 50k and unmute dac */
wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x00c0);
break;
case SND_SOC_BIAS_PREPARE:
/* set vmid to 5k for quick power up */
wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x01c1);
break;
case SND_SOC_BIAS_STANDBY:
/* mute dac and set vmid to 500k, enable VREF */
wm8753_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
snd_soc_write(codec, WM8753_PWR1, pwr_reg | 0x0141);
break;
case SND_SOC_BIAS_OFF:
wm8753_write(codec, WM8753_PWR1, 0x0001);
snd_soc_write(codec, WM8753_PWR1, 0x0001);
break;
}
codec->bias_level = level;
@ -1477,7 +1430,7 @@ static void wm8753_set_dai_mode(struct snd_soc_codec *codec,
else
dai->driver = &wm8753_all_dai[(wm8753->dai_func << 1) + 1];
}
wm8753_write(codec, WM8753_IOCTL, wm8753->dai_func);
snd_soc_write(codec, WM8753_IOCTL, wm8753->dai_func);
}
static void wm8753_work(struct work_struct *work)
@ -1495,22 +1448,19 @@ static int wm8753_suspend(struct snd_soc_codec *codec, pm_message_t state)
static int wm8753_resume(struct snd_soc_codec *codec)
{
u16 *reg_cache = codec->reg_cache;
int i;
u8 data[2];
u16 *cache = codec->reg_cache;
/* Sync reg_cache with the hardware */
for (i = 0; i < ARRAY_SIZE(wm8753_reg); i++) {
if (i + 1 == WM8753_RESET)
for (i = 1; i < ARRAY_SIZE(wm8753_reg); i++) {
if (i == WM8753_RESET)
continue;
/* No point in writing hardware default values back */
if (cache[i] == wm8753_reg[i])
if (reg_cache[i] == wm8753_reg[i])
continue;
data[0] = ((i + 1) << 1) | ((cache[i] >> 8) & 0x0001);
data[1] = cache[i] & 0x00ff;
codec->hw_write(codec->control_data, data, 2);
snd_soc_write(codec, i, reg_cache[i]);
}
wm8753_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
@ -1548,7 +1498,7 @@ static int run_delayed_work(struct delayed_work *dwork)
static int wm8753_probe(struct snd_soc_codec *codec)
{
struct wm8753_priv *wm8753 = snd_soc_codec_get_drvdata(codec);
int ret = 0, reg;
int ret;
INIT_DELAYED_WORK(&codec->delayed_work, wm8753_work);
@ -1573,26 +1523,16 @@ static int wm8753_probe(struct snd_soc_codec *codec)
msecs_to_jiffies(caps_charge));
/* set the update bits */
reg = wm8753_read_reg_cache(codec, WM8753_LDAC);
wm8753_write(codec, WM8753_LDAC, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_RDAC);
wm8753_write(codec, WM8753_RDAC, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_LADC);
wm8753_write(codec, WM8753_LADC, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_RADC);
wm8753_write(codec, WM8753_RADC, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_LOUT1V);
wm8753_write(codec, WM8753_LOUT1V, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_ROUT1V);
wm8753_write(codec, WM8753_ROUT1V, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_LOUT2V);
wm8753_write(codec, WM8753_LOUT2V, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_ROUT2V);
wm8753_write(codec, WM8753_ROUT2V, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_LINVOL);
wm8753_write(codec, WM8753_LINVOL, reg | 0x0100);
reg = wm8753_read_reg_cache(codec, WM8753_RINVOL);
wm8753_write(codec, WM8753_RINVOL, reg | 0x0100);
snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_LDAC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_RDAC, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_LOUT1V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_ROUT1V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_LOUT2V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_ROUT2V, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_LINVOL, 0x0100, 0x0100);
snd_soc_update_bits(codec, WM8753_RINVOL, 0x0100, 0x0100);
snd_soc_add_controls(codec, wm8753_snd_controls,
ARRAY_SIZE(wm8753_snd_controls));

37
sound/soc/codecs/wm8904.c
View File

@ -50,8 +50,6 @@ static const char *wm8904_supply_names[WM8904_NUM_SUPPLIES] = {
/* codec private data */
struct wm8904_priv {
u16 reg_cache[WM8904_MAX_REGISTER + 1];
enum wm8904_type devtype;
void *control_data;
@ -2094,7 +2092,7 @@ static int wm8904_digital_mute(struct snd_soc_dai *codec_dai, int mute)
static void wm8904_sync_cache(struct snd_soc_codec *codec)
{
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int i;
if (!codec->cache_sync)
@ -2105,14 +2103,14 @@ static void wm8904_sync_cache(struct snd_soc_codec *codec)
/* Sync back cached values if they're different from the
* hardware default.
*/
for (i = 1; i < ARRAY_SIZE(wm8904->reg_cache); i++) {
for (i = 1; i < codec->driver->reg_cache_size; i++) {
if (!wm8904_access[i].writable)
continue;
if (wm8904->reg_cache[i] == wm8904_reg[i])
if (reg_cache[i] == wm8904_reg[i])
continue;
snd_soc_write(codec, i, wm8904->reg_cache[i]);
snd_soc_write(codec, i, reg_cache[i]);
}
codec->cache_sync = 0;
@ -2371,6 +2369,7 @@ static int wm8904_probe(struct snd_soc_codec *codec)
{
struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
struct wm8904_pdata *pdata = wm8904->pdata;
u16 *reg_cache = codec->reg_cache;
int ret, i;
codec->cache_sync = 1;
@ -2437,19 +2436,19 @@ static int wm8904_probe(struct snd_soc_codec *codec)
}
/* Change some default settings - latch VU and enable ZC */
wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU;
wm8904->reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU;
wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU;
wm8904->reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU;
wm8904->reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU |
reg_cache[WM8904_ADC_DIGITAL_VOLUME_LEFT] |= WM8904_ADC_VU;
reg_cache[WM8904_ADC_DIGITAL_VOLUME_RIGHT] |= WM8904_ADC_VU;
reg_cache[WM8904_DAC_DIGITAL_VOLUME_LEFT] |= WM8904_DAC_VU;
reg_cache[WM8904_DAC_DIGITAL_VOLUME_RIGHT] |= WM8904_DAC_VU;
reg_cache[WM8904_ANALOGUE_OUT1_LEFT] |= WM8904_HPOUT_VU |
WM8904_HPOUTLZC;
wm8904->reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU |
reg_cache[WM8904_ANALOGUE_OUT1_RIGHT] |= WM8904_HPOUT_VU |
WM8904_HPOUTRZC;
wm8904->reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU |
reg_cache[WM8904_ANALOGUE_OUT2_LEFT] |= WM8904_LINEOUT_VU |
WM8904_LINEOUTLZC;
wm8904->reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU |
reg_cache[WM8904_ANALOGUE_OUT2_RIGHT] |= WM8904_LINEOUT_VU |
WM8904_LINEOUTRZC;
wm8904->reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE;
reg_cache[WM8904_CLOCK_RATES_0] &= ~WM8904_SR_MODE;
/* Apply configuration from the platform data. */
if (wm8904->pdata) {
@ -2457,23 +2456,23 @@ static int wm8904_probe(struct snd_soc_codec *codec)
if (!pdata->gpio_cfg[i])
continue;
wm8904->reg_cache[WM8904_GPIO_CONTROL_1 + i]
reg_cache[WM8904_GPIO_CONTROL_1 + i]
= pdata->gpio_cfg[i] & 0xffff;
}
/* Zero is the default value for these anyway */
for (i = 0; i < WM8904_MIC_REGS; i++)
wm8904->reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i]
reg_cache[WM8904_MIC_BIAS_CONTROL_0 + i]
= pdata->mic_cfg[i];
}
/* Set Class W by default - this will be managed by the Class
* G widget at runtime where bypass paths are available.
*/
wm8904->reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR;
reg_cache[WM8904_CLASS_W_0] |= WM8904_CP_DYN_PWR;
/* Use normal bias source */
wm8904->reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL;
reg_cache[WM8904_BIAS_CONTROL_0] &= ~WM8904_POBCTRL;
wm8904_set_bias_level(codec, SND_SOC_BIAS_STANDBY);

1
sound/soc/codecs/wm8940.c
View File

@ -768,6 +768,7 @@ static __devinit int wm8940_i2c_probe(struct i2c_client *i2c,
i2c_set_clientdata(i2c, wm8940);
wm8940->control_data = i2c;
wm8940->control_type = SND_SOC_I2C;
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8940, &wm8940_dai, 1);

31
sound/soc/codecs/wm8955.c
View File

@ -42,8 +42,6 @@ static const char *wm8955_supply_names[WM8955_NUM_SUPPLIES] = {
struct wm8955_priv {
enum snd_soc_control_type control_type;
u16 reg_cache[WM8955_MAX_REGISTER + 1];
unsigned int mclk_rate;
int deemph;
@ -768,6 +766,7 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int ret, i;
switch (level) {
@ -800,14 +799,14 @@ static int wm8955_set_bias_level(struct snd_soc_codec *codec,
/* Sync back cached values if they're
* different from the hardware default.
*/
for (i = 0; i < ARRAY_SIZE(wm8955->reg_cache); i++) {
for (i = 0; i < codec->driver->reg_cache_size; i++) {
if (i == WM8955_RESET)
continue;
if (wm8955->reg_cache[i] == wm8955_reg[i])
if (reg_cache[i] == wm8955_reg[i])
continue;
snd_soc_write(codec, i, wm8955->reg_cache[i]);
snd_soc_write(codec, i, reg_cache[i]);
}
/* Enable VREF and VMID */
@ -902,6 +901,7 @@ static int wm8955_probe(struct snd_soc_codec *codec)
{
struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
struct wm8955_pdata *pdata = dev_get_platdata(codec->dev);
u16 *reg_cache = codec->reg_cache;
int ret, i;
ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8955->control_type);
@ -934,25 +934,25 @@ static int wm8955_probe(struct snd_soc_codec *codec)
}
/* Change some default settings - latch VU and enable ZC */
wm8955->reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU;
wm8955->reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU;
wm8955->reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC;
wm8955->reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC;
wm8955->reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC;
wm8955->reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC;
wm8955->reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC;
reg_cache[WM8955_LEFT_DAC_VOLUME] |= WM8955_LDVU;
reg_cache[WM8955_RIGHT_DAC_VOLUME] |= WM8955_RDVU;
reg_cache[WM8955_LOUT1_VOLUME] |= WM8955_LO1VU | WM8955_LO1ZC;
reg_cache[WM8955_ROUT1_VOLUME] |= WM8955_RO1VU | WM8955_RO1ZC;
reg_cache[WM8955_LOUT2_VOLUME] |= WM8955_LO2VU | WM8955_LO2ZC;
reg_cache[WM8955_ROUT2_VOLUME] |= WM8955_RO2VU | WM8955_RO2ZC;
reg_cache[WM8955_MONOOUT_VOLUME] |= WM8955_MOZC;
/* Also enable adaptive bass boost by default */
wm8955->reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB;
reg_cache[WM8955_BASS_CONTROL] |= WM8955_BB;
/* Set platform data values */
if (pdata) {
if (pdata->out2_speaker)
wm8955->reg_cache[WM8955_ADDITIONAL_CONTROL_2]
reg_cache[WM8955_ADDITIONAL_CONTROL_2]
|= WM8955_ROUT2INV;
if (pdata->monoin_diff)
wm8955->reg_cache[WM8955_MONO_OUT_MIX_1]
reg_cache[WM8955_MONO_OUT_MIX_1]
|= WM8955_DMEN;
}
@ -1003,6 +1003,7 @@ static __devinit int wm8955_i2c_probe(struct i2c_client *i2c,
return -ENOMEM;
i2c_set_clientdata(i2c, wm8955);
wm8955->control_type = SND_SOC_I2C;
ret = snd_soc_register_codec(&i2c->dev,
&soc_codec_dev_wm8955, &wm8955_dai, 1);

1
sound/soc/codecs/wm8960.c
View File

@ -1013,6 +1013,7 @@ static __devinit int wm8960_i2c_probe(struct i2c_client *i2c,
return -ENOMEM;
i2c_set_clientdata(i2c, wm8960);
wm8960->control_type = SND_SOC_I2C;
wm8960->control_data = i2c;
ret = snd_soc_register_codec(&i2c->dev,

45
sound/soc/codecs/wm8962.c
View File

@ -52,8 +52,6 @@ static const char *wm8962_supply_names[WM8962_NUM_SUPPLIES] = {
struct wm8962_priv {
struct snd_soc_codec *codec;
u16 reg_cache[WM8962_MAX_REGISTER + 1];
int sysclk;
int sysclk_rate;
@ -1991,8 +1989,7 @@ static int wm8962_put_hp_sw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = wm8962->reg_cache;
u16 *reg_cache = codec->reg_cache;
int ret;
/* Apply the update (if any) */
@ -2020,8 +2017,7 @@ static int wm8962_put_spk_sw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = wm8962->reg_cache;
u16 *reg_cache = codec->reg_cache;
int ret;
/* Apply the update (if any) */
@ -2329,8 +2325,7 @@ static int out_pga_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_codec *codec = w->codec;
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = wm8962->reg_cache;
u16 *reg_cache = codec->reg_cache;
int reg;
switch (w->shift) {
@ -2719,7 +2714,7 @@ static int wm8962_add_widgets(struct snd_soc_codec *codec)
static void wm8962_sync_cache(struct snd_soc_codec *codec)
{
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int i;
if (!codec->cache_sync)
@ -2732,13 +2727,13 @@ static void wm8962_sync_cache(struct snd_soc_codec *codec)
/* Sync back cached values if they're different from the
* hardware default.
*/
for (i = 1; i < ARRAY_SIZE(wm8962->reg_cache); i++) {
for (i = 1; i < codec->driver->reg_cache_size; i++) {
if (i == WM8962_SOFTWARE_RESET)
continue;
if (wm8962->reg_cache[i] == wm8962_reg[i])
if (reg_cache[i] == wm8962_reg[i])
continue;
snd_soc_write(codec, i, wm8962->reg_cache[i]);
snd_soc_write(codec, i, reg_cache[i]);
}
codec->cache_sync = 0;
@ -3406,12 +3401,11 @@ EXPORT_SYMBOL_GPL(wm8962_mic_detect);
#ifdef CONFIG_PM
static int wm8962_resume(struct snd_soc_codec *codec)
{
struct wm8962_priv *wm8962 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int i;
/* Restore the registers */
for (i = 1; i < ARRAY_SIZE(wm8962->reg_cache); i++) {
for (i = 1; i < codec->driver->reg_cache_size; i++) {
switch (i) {
case WM8962_SOFTWARE_RESET:
continue;
@ -3705,6 +3699,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
struct wm8962_pdata *pdata = dev_get_platdata(codec->dev);
struct i2c_client *i2c = container_of(codec->dev, struct i2c_client,
dev);
u16 *reg_cache = codec->reg_cache;
int i, trigger, irq_pol;
wm8962->codec = codec;
@ -3804,7 +3799,7 @@ static int wm8962_probe(struct snd_soc_codec *codec)
/* Put the speakers into mono mode? */
if (pdata->spk_mono)
wm8962->reg_cache[WM8962_CLASS_D_CONTROL_2]
reg_cache[WM8962_CLASS_D_CONTROL_2]
|= WM8962_SPK_MONO;
/* Micbias setup, detection enable and detection
@ -3819,16 +3814,16 @@ static int wm8962_probe(struct snd_soc_codec *codec)
}
/* Latch volume update bits */
wm8962->reg_cache[WM8962_LEFT_INPUT_VOLUME] |= WM8962_IN_VU;
wm8962->reg_cache[WM8962_RIGHT_INPUT_VOLUME] |= WM8962_IN_VU;
wm8962->reg_cache[WM8962_LEFT_ADC_VOLUME] |= WM8962_ADC_VU;
wm8962->reg_cache[WM8962_RIGHT_ADC_VOLUME] |= WM8962_ADC_VU;
wm8962->reg_cache[WM8962_LEFT_DAC_VOLUME] |= WM8962_DAC_VU;
wm8962->reg_cache[WM8962_RIGHT_DAC_VOLUME] |= WM8962_DAC_VU;
wm8962->reg_cache[WM8962_SPKOUTL_VOLUME] |= WM8962_SPKOUT_VU;
wm8962->reg_cache[WM8962_SPKOUTR_VOLUME] |= WM8962_SPKOUT_VU;
wm8962->reg_cache[WM8962_HPOUTL_VOLUME] |= WM8962_HPOUT_VU;
wm8962->reg_cache[WM8962_HPOUTR_VOLUME] |= WM8962_HPOUT_VU;
reg_cache[WM8962_LEFT_INPUT_VOLUME] |= WM8962_IN_VU;
reg_cache[WM8962_RIGHT_INPUT_VOLUME] |= WM8962_IN_VU;
reg_cache[WM8962_LEFT_ADC_VOLUME] |= WM8962_ADC_VU;
reg_cache[WM8962_RIGHT_ADC_VOLUME] |= WM8962_ADC_VU;
reg_cache[WM8962_LEFT_DAC_VOLUME] |= WM8962_DAC_VU;
reg_cache[WM8962_RIGHT_DAC_VOLUME] |= WM8962_DAC_VU;
reg_cache[WM8962_SPKOUTL_VOLUME] |= WM8962_SPKOUT_VU;
reg_cache[WM8962_SPKOUTR_VOLUME] |= WM8962_SPKOUT_VU;
reg_cache[WM8962_HPOUTL_VOLUME] |= WM8962_HPOUT_VU;
reg_cache[WM8962_HPOUTR_VOLUME] |= WM8962_HPOUT_VU;
wm8962_add_widgets(codec);

1
sound/soc/codecs/wm8971.c
View File

@ -718,6 +718,7 @@ static __devinit int wm8971_i2c_probe(struct i2c_client *i2c,
if (wm8971 == NULL)
return -ENOMEM;
wm8971->control_type = SND_SOC_I2C;
i2c_set_clientdata(i2c, wm8971);
ret = snd_soc_register_codec(&i2c->dev,

1
sound/soc/codecs/wm9081.c
View File

@ -1335,6 +1335,7 @@ static __devinit int wm9081_i2c_probe(struct i2c_client *i2c,
return -ENOMEM;
i2c_set_clientdata(i2c, wm9081);
wm9081->control_type = SND_SOC_I2C;
wm9081->control_data = i2c;
ret = snd_soc_register_codec(&i2c->dev,

18
sound/soc/codecs/wm9090.c
View File

@ -141,7 +141,6 @@ static const u16 wm9090_reg_defaults[] = {
/* This struct is used to save the context */
struct wm9090_priv {
struct mutex mutex;
u16 reg_cache[WM9090_MAX_REGISTER + 1];
struct wm9090_platform_data pdata;
void *control_data;
};
@ -552,6 +551,7 @@ static int wm9090_set_bias_level(struct snd_soc_codec *codec,
static int wm9090_probe(struct snd_soc_codec *codec)
{
struct wm9090_priv *wm9090 = snd_soc_codec_get_drvdata(codec);
u16 *reg_cache = codec->reg_cache;
int ret;
codec->control_data = wm9090->control_data;
@ -576,22 +576,22 @@ static int wm9090_probe(struct snd_soc_codec *codec)
/* Configure some defaults; they will be written out when we
* bring the bias up.
*/
wm9090->reg_cache[WM9090_IN1_LINE_INPUT_A_VOLUME] |= WM9090_IN1_VU
reg_cache[WM9090_IN1_LINE_INPUT_A_VOLUME] |= WM9090_IN1_VU
| WM9090_IN1A_ZC;
wm9090->reg_cache[WM9090_IN1_LINE_INPUT_B_VOLUME] |= WM9090_IN1_VU
reg_cache[WM9090_IN1_LINE_INPUT_B_VOLUME] |= WM9090_IN1_VU
| WM9090_IN1B_ZC;
wm9090->reg_cache[WM9090_IN2_LINE_INPUT_A_VOLUME] |= WM9090_IN2_VU
reg_cache[WM9090_IN2_LINE_INPUT_A_VOLUME] |= WM9090_IN2_VU
| WM9090_IN2A_ZC;
wm9090->reg_cache[WM9090_IN2_LINE_INPUT_B_VOLUME] |= WM9090_IN2_VU
reg_cache[WM9090_IN2_LINE_INPUT_B_VOLUME] |= WM9090_IN2_VU
| WM9090_IN2B_ZC;
wm9090->reg_cache[WM9090_SPEAKER_VOLUME_LEFT] |=
reg_cache[WM9090_SPEAKER_VOLUME_LEFT] |=
WM9090_SPKOUT_VU | WM9090_SPKOUTL_ZC;
wm9090->reg_cache[WM9090_LEFT_OUTPUT_VOLUME] |=
reg_cache[WM9090_LEFT_OUTPUT_VOLUME] |=
WM9090_HPOUT1_VU | WM9090_HPOUT1L_ZC;
wm9090->reg_cache[WM9090_RIGHT_OUTPUT_VOLUME] |=
reg_cache[WM9090_RIGHT_OUTPUT_VOLUME] |=
WM9090_HPOUT1_VU | WM9090_HPOUT1R_ZC;
wm9090->reg_cache[WM9090_CLOCKING_1] |= WM9090_TOCLK_ENA;
reg_cache[WM9090_CLOCKING_1] |= WM9090_TOCLK_ENA;
wm9090_set_bias_level(codec, SND_SOC_BIAS_STANDBY);