mips/kvm: Make kvm_locore.S 64-bit buildable/safe.
We need to use more of the Macros in asm.h to allow kvm_locore.S to build in a 64-bit kernel. For 32-bit there is no change in the generated object code. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gleb Natapov <gleb@redhat.com>
This commit is contained in:
David Daney
Gleb Natapov
parent
bb48c2fc64
commit
ea69f28ddf
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@ -60,7 +60,7 @@
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FEXPORT(__kvm_mips_vcpu_run)
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/* k0/k1 not being used in host kernel context */
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addiu k1, sp, -PT_SIZE
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INT_ADDIU k1, sp, -PT_SIZE
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LONG_S $0, PT_R0(k1)
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LONG_S $1, PT_R1(k1)
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LONG_S $2, PT_R2(k1)
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@ -121,7 +121,7 @@ FEXPORT(__kvm_mips_vcpu_run)
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mtc0 a1, CP0_DDATA_LO
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/* Offset into vcpu->arch */
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addiu k1, a1, VCPU_HOST_ARCH
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INT_ADDIU k1, a1, VCPU_HOST_ARCH
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/*
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* Save the host stack to VCPU, used for exception processing
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@ -159,16 +159,16 @@ FEXPORT(__kvm_mips_vcpu_run)
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FEXPORT(__kvm_mips_load_asid)
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/* Set the ASID for the Guest Kernel */
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sll t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
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INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
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/* addresses shift to 0x80000000 */
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bltz t0, 1f /* If kernel */
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addiu t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
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addiu t1, k1, VCPU_GUEST_USER_ASID /* else user */
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INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
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INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */
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1:
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/* t1: contains the base of the ASID array, need to get the cpu id */
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LONG_L t2, TI_CPU($28) /* smp_processor_id */
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sll t2, t2, 2 /* x4 */
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addu t3, t1, t2
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INT_SLL t2, t2, 2 /* x4 */
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REG_ADDU t3, t1, t2
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LONG_L k0, (t3)
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andi k0, k0, 0xff
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mtc0 k0, CP0_ENTRYHI
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@ -236,10 +236,10 @@ VECTOR(MIPSX(exception), unknown)
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ehb #02:
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mfc0 k0, CP0_EBASE #02: Get EBASE
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srl k0, k0, 10 #03: Get rid of CPUNum
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sll k0, k0, 10 #04
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INT_SRL k0, k0, 10 #03: Get rid of CPUNum
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INT_SLL k0, k0, 10 #04
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LONG_S k1, 0x3000(k0) #05: Save k1 @ offset 0x3000
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addiu k0, k0, 0x2000 #06: Exception handler is installed @ offset 0x2000
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INT_ADDIU k0, k0, 0x2000 #06: Exception handler is installed @ offset 0x2000
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j k0 #07: jump to the function
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nop #08: branch delay slot
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VECTOR_END(MIPSX(exceptionEnd))
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@ -253,7 +253,7 @@ VECTOR_END(MIPSX(exceptionEnd))
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NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
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/* Get the VCPU pointer from DDTATA_LO */
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mfc0 k1, CP0_DDATA_LO
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addiu k1, k1, VCPU_HOST_ARCH
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INT_ADDIU k1, k1, VCPU_HOST_ARCH
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/* Start saving Guest context to VCPU */
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LONG_S $0, VCPU_R0(k1)
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@ -304,7 +304,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
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LONG_S t0, VCPU_R26(k1)
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/* Get GUEST k1 and save it in VCPU */
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la t1, ~0x2ff
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PTR_LI t1, ~0x2ff
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mfc0 t0, CP0_EBASE
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and t0, t0, t1
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LONG_L t0, 0x3000(t0)
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@ -367,7 +367,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
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LONG_L sp, VCPU_HOST_STACK(k1)
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/* Saved host state */
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addiu sp, sp, -PT_SIZE
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INT_ADDIU sp, sp, -PT_SIZE
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/* XXXKYMA do we need to load the host ASID, maybe not because the
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* kernel entries are marked GLOBAL, need to verify
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@ -378,7 +378,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
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mtc0 k0, CP0_DDATA_LO
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/* Restore RDHWR access */
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la k0, 0x2000000F
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PTR_LI k0, 0x2000000F
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mtc0 k0, CP0_HWRENA
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/* Jump to handler */
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@ -386,9 +386,9 @@ FEXPORT(__kvm_mips_jump_to_handler)
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/* XXXKYMA: not sure if this is safe, how large is the stack??
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* Now jump to the kvm_mips_handle_exit() to see if we can deal
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* with this in the kernel */
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la t9, kvm_mips_handle_exit
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PTR_LA t9, kvm_mips_handle_exit
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jalr.hb t9
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addiu sp, sp, -CALLFRAME_SIZ /* BD Slot */
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INT_ADDIU sp, sp, -CALLFRAME_SIZ /* BD Slot */
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/* Return from handler Make sure interrupts are disabled */
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di
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@ -400,7 +400,7 @@ FEXPORT(__kvm_mips_jump_to_handler)
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*/
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move k1, s1
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addiu k1, k1, VCPU_HOST_ARCH
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INT_ADDIU k1, k1, VCPU_HOST_ARCH
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/* Check return value, should tell us if we are returning to the
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* host (handle I/O etc)or resuming the guest
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@ -438,16 +438,16 @@ __kvm_mips_return_to_guest:
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mtc0 t0, CP0_EPC
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/* Set the ASID for the Guest Kernel */
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sll t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
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INT_SLL t0, t0, 1 /* with kseg0 @ 0x40000000, kernel */
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/* addresses shift to 0x80000000 */
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bltz t0, 1f /* If kernel */
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addiu t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
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addiu t1, k1, VCPU_GUEST_USER_ASID /* else user */
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INT_ADDIU t1, k1, VCPU_GUEST_KERNEL_ASID /* (BD) */
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INT_ADDIU t1, k1, VCPU_GUEST_USER_ASID /* else user */
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1:
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/* t1: contains the base of the ASID array, need to get the cpu id */
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LONG_L t2, TI_CPU($28) /* smp_processor_id */
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sll t2, t2, 2 /* x4 */
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addu t3, t1, t2
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INT_SLL t2, t2, 2 /* x4 */
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REG_ADDU t3, t1, t2
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LONG_L k0, (t3)
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andi k0, k0, 0xff
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mtc0 k0,CP0_ENTRYHI
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@ -505,7 +505,7 @@ FEXPORT(__kvm_mips_skip_guest_restore)
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__kvm_mips_return_to_host:
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/* EBASE is already pointing to Linux */
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LONG_L k1, VCPU_HOST_STACK(k1)
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addiu k1,k1, -PT_SIZE
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INT_ADDIU k1,k1, -PT_SIZE
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/* Restore host DDATA_LO */
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LONG_L k0, PT_HOST_USERLOCAL(k1)
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@ -523,7 +523,7 @@ __kvm_mips_return_to_host:
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/* r2/v0 is the return code, shift it down by 2 (arithmetic)
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* to recover the err code */
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sra k0, v0, 2
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INT_SRA k0, v0, 2
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move $2, k0
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LONG_L $3, PT_R3(k1)
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@ -563,7 +563,7 @@ __kvm_mips_return_to_host:
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mtlo k0
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/* Restore RDHWR access */
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la k0, 0x2000000F
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PTR_LI k0, 0x2000000F
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mtc0 k0, CP0_HWRENA
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@ -627,13 +627,13 @@ LEAF(MIPSX(SyncICache))
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.set mips32r2
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beq a1, zero, 20f
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nop
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addu a1, a0, a1
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REG_ADDU a1, a0, a1
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rdhwr v0, HW_SYNCI_Step
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beq v0, zero, 20f
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nop
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10:
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synci 0(a0)
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addu a0, a0, v0
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REG_ADDU a0, a0, v0
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sltu v1, a0, a1
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bne v1, zero, 10b
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nop
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