Merge branch 'linus' into sched/urgent, to pick up fixes and updates
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
commit
ea2a6af517
5
CREDITS
5
CREDITS
|
|
@ -1564,6 +1564,11 @@ W: http://www.carumba.com/
|
|||
D: bug toaster (A1 sauce makes all the difference)
|
||||
D: Random linux hacker
|
||||
|
||||
N: James Hogan
|
||||
E: jhogan@kernel.org
|
||||
D: Metag architecture maintainer
|
||||
D: TZ1090 SoC maintainer
|
||||
|
||||
N: Tim Hockin
|
||||
E: thockin@hockin.org
|
||||
W: http://www.hockin.org/~thockin
|
||||
|
|
|
|||
|
|
@ -66,8 +66,6 @@ backlight/
|
|||
- directory with info on controlling backlights in flat panel displays
|
||||
bcache.txt
|
||||
- Block-layer cache on fast SSDs to improve slow (raid) I/O performance.
|
||||
blackfin/
|
||||
- directory with documentation for the Blackfin arch.
|
||||
block/
|
||||
- info on the Block I/O (BIO) layer.
|
||||
blockdev/
|
||||
|
|
@ -114,8 +112,6 @@ cputopology.txt
|
|||
- documentation on how CPU topology info is exported via sysfs.
|
||||
crc32.txt
|
||||
- brief tutorial on CRC computation
|
||||
cris/
|
||||
- directory with info about Linux on CRIS architecture.
|
||||
crypto/
|
||||
- directory with info on the Crypto API.
|
||||
dcdbas.txt
|
||||
|
|
@ -172,8 +168,6 @@ fmc/
|
|||
- information about the FMC bus abstraction
|
||||
fpga/
|
||||
- FPGA Manager Core.
|
||||
frv/
|
||||
- Fujitsu FR-V Linux documentation.
|
||||
futex-requeue-pi.txt
|
||||
- info on requeueing of tasks from a non-PI futex to a PI futex
|
||||
gcc-plugins.txt
|
||||
|
|
@ -276,8 +270,6 @@ memory-hotplug.txt
|
|||
- Hotpluggable memory support, how to use and current status.
|
||||
men-chameleon-bus.txt
|
||||
- info on MEN chameleon bus.
|
||||
metag/
|
||||
- directory with info about Linux on Meta architecture.
|
||||
mic/
|
||||
- Intel Many Integrated Core (MIC) architecture device driver.
|
||||
mips/
|
||||
|
|
@ -286,8 +278,6 @@ misc-devices/
|
|||
- directory with info about devices using the misc dev subsystem
|
||||
mmc/
|
||||
- directory with info about the MMC subsystem
|
||||
mn10300/
|
||||
- directory with info about the mn10300 architecture port
|
||||
mtd/
|
||||
- directory with info about memory technology devices (flash)
|
||||
namespaces/
|
||||
|
|
|
|||
|
|
@ -26,8 +26,8 @@ On what hardware does it run?
|
|||
Although originally developed first for 32-bit x86-based PCs (386 or higher),
|
||||
today Linux also runs on (at least) the Compaq Alpha AXP, Sun SPARC and
|
||||
UltraSPARC, Motorola 68000, PowerPC, PowerPC64, ARM, Hitachi SuperH, Cell,
|
||||
IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64, AXIS CRIS,
|
||||
Xtensa, Tilera TILE, ARC and Renesas M32R architectures.
|
||||
IBM S/390, MIPS, HP PA-RISC, Intel IA-64, DEC VAX, AMD x86-64 Xtensa, and
|
||||
ARC architectures.
|
||||
|
||||
Linux is easily portable to most general-purpose 32- or 64-bit architectures
|
||||
as long as they have a paged memory management unit (PMMU) and a port of the
|
||||
|
|
|
|||
|
|
@ -89,7 +89,6 @@ parameter is applicable::
|
|||
APM Advanced Power Management support is enabled.
|
||||
ARM ARM architecture is enabled.
|
||||
AX25 Appropriate AX.25 support is enabled.
|
||||
BLACKFIN Blackfin architecture is enabled.
|
||||
CLK Common clock infrastructure is enabled.
|
||||
CMA Contiguous Memory Area support is enabled.
|
||||
DRM Direct Rendering Management support is enabled.
|
||||
|
|
|
|||
|
|
@ -1025,7 +1025,7 @@
|
|||
address. The serial port must already be setup
|
||||
and configured. Options are not yet supported.
|
||||
|
||||
earlyprintk= [X86,SH,BLACKFIN,ARM,M68k,S390]
|
||||
earlyprintk= [X86,SH,ARM,M68k,S390]
|
||||
earlyprintk=vga
|
||||
earlyprintk=efi
|
||||
earlyprintk=sclp
|
||||
|
|
@ -1347,10 +1347,6 @@
|
|||
If specified, z/VM IUCV HVC accepts connections
|
||||
from listed z/VM user IDs only.
|
||||
|
||||
hwthread_map= [METAG] Comma-separated list of Linux cpu id to
|
||||
hardware thread id mappings.
|
||||
Format: <cpu>:<hwthread>
|
||||
|
||||
keep_bootcon [KNL]
|
||||
Do not unregister boot console at start. This is only
|
||||
useful for debugging when something happens in the window
|
||||
|
|
@ -1766,6 +1762,17 @@
|
|||
|
||||
nohz
|
||||
Disable the tick when a single task runs.
|
||||
|
||||
A residual 1Hz tick is offloaded to workqueues, which you
|
||||
need to affine to housekeeping through the global
|
||||
workqueue's affinity configured via the
|
||||
/sys/devices/virtual/workqueue/cpumask sysfs file, or
|
||||
by using the 'domain' flag described below.
|
||||
|
||||
NOTE: by default the global workqueue runs on all CPUs,
|
||||
so to protect individual CPUs the 'cpumask' file has to
|
||||
be configured manually after bootup.
|
||||
|
||||
domain
|
||||
Isolate from the general SMP balancing and scheduling
|
||||
algorithms. Note that performing domain isolation this way
|
||||
|
|
@ -2237,6 +2244,15 @@
|
|||
The memory region may be marked as e820 type 12 (0xc)
|
||||
and is NVDIMM or ADR memory.
|
||||
|
||||
memmap=<size>%<offset>-<oldtype>+<newtype>
|
||||
[KNL,ACPI] Convert memory within the specified region
|
||||
from <oldtype> to <newtype>. If "-<oldtype>" is left
|
||||
out, the whole region will be marked as <newtype>,
|
||||
even if previously unavailable. If "+<newtype>" is left
|
||||
out, matching memory will be removed. Types are
|
||||
specified as e820 types, e.g., 1 = RAM, 2 = reserved,
|
||||
3 = ACPI, 12 = PRAM.
|
||||
|
||||
memory_corruption_check=0/1 [X86]
|
||||
Some BIOSes seem to corrupt the first 64k of
|
||||
memory when doing things like suspend/resume.
|
||||
|
|
|
|||
|
|
@ -1,6 +0,0 @@
|
|||
00-INDEX
|
||||
- This file
|
||||
bfin-gpio-notes.txt
|
||||
- Notes in developing/using bfin-gpio driver.
|
||||
bfin-spi-notes.txt
|
||||
- Notes for using bfin spi bus driver.
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
/*
|
||||
* File: Documentation/blackfin/bfin-gpio-notes.txt
|
||||
* Based on:
|
||||
* Author:
|
||||
*
|
||||
* Created: $Id: bfin-gpio-note.txt 2008-11-24 16:42 grafyang $
|
||||
* Description: This file contains the notes in developing/using bfin-gpio.
|
||||
*
|
||||
*
|
||||
* Rev:
|
||||
*
|
||||
* Modified:
|
||||
* Copyright 2004-2008 Analog Devices Inc.
|
||||
*
|
||||
* Bugs: Enter bugs at http://blackfin.uclinux.org/
|
||||
*
|
||||
*/
|
||||
|
||||
|
||||
1. Blackfin GPIO introduction
|
||||
|
||||
There are many GPIO pins on Blackfin. Most of these pins are muxed to
|
||||
multi-functions. They can be configured as peripheral, or just as GPIO,
|
||||
configured to input with interrupt enabled, or output.
|
||||
|
||||
For detailed information, please see "arch/blackfin/kernel/bfin_gpio.c",
|
||||
or the relevant HRM.
|
||||
|
||||
|
||||
2. Avoiding resource conflict
|
||||
|
||||
Followed function groups are used to avoiding resource conflict,
|
||||
- Use the pin as peripheral,
|
||||
int peripheral_request(unsigned short per, const char *label);
|
||||
int peripheral_request_list(const unsigned short per[], const char *label);
|
||||
void peripheral_free(unsigned short per);
|
||||
void peripheral_free_list(const unsigned short per[]);
|
||||
- Use the pin as GPIO,
|
||||
int bfin_gpio_request(unsigned gpio, const char *label);
|
||||
void bfin_gpio_free(unsigned gpio);
|
||||
- Use the pin as GPIO interrupt,
|
||||
int bfin_gpio_irq_request(unsigned gpio, const char *label);
|
||||
void bfin_gpio_irq_free(unsigned gpio);
|
||||
|
||||
The request functions will record the function state for a certain pin,
|
||||
the free functions will clear its function state.
|
||||
Once a pin is requested, it can't be requested again before it is freed by
|
||||
previous caller, otherwise kernel will dump stacks, and the request
|
||||
function fail.
|
||||
These functions are wrapped by other functions, most of the users need not
|
||||
care.
|
||||
|
||||
|
||||
3. But there are some exceptions
|
||||
- Kernel permit the identical GPIO be requested both as GPIO and GPIO
|
||||
interrupt.
|
||||
Some drivers, like gpio-keys, need this behavior. Kernel only print out
|
||||
warning messages like,
|
||||
bfin-gpio: GPIO 24 is already reserved by gpio-keys: BTN0, and you are
|
||||
configuring it as IRQ!
|
||||
|
||||
Note: Consider the case that, if there are two drivers need the
|
||||
identical GPIO, one of them use it as GPIO, the other use it as
|
||||
GPIO interrupt. This will really cause resource conflict. So if
|
||||
there is any abnormal driver behavior, please check the bfin-gpio
|
||||
warning messages.
|
||||
|
||||
- Kernel permit the identical GPIO be requested from the same driver twice.
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,16 +0,0 @@
|
|||
SPI Chip Select behavior:
|
||||
|
||||
With the Blackfin on-chip SPI peripheral, there is some logic tied to the CPHA
|
||||
bit whether the Slave Select Line is controlled by hardware (CPHA=0) or
|
||||
controlled by software (CPHA=1). However, the Linux SPI bus driver assumes that
|
||||
the Slave Select is always under software control and being asserted during
|
||||
the entire SPI transfer. - And not just bits_per_word duration.
|
||||
|
||||
In most cases you can utilize SPI MODE_3 instead of MODE_0 to work-around this
|
||||
behavior. If your SPI slave device in question requires SPI MODE_0 or MODE_2
|
||||
timing, you can utilize the GPIO controlled SPI Slave Select option instead.
|
||||
In this case, you should use GPIO based CS for all of your slaves and not just
|
||||
the ones using mode 0 or 2 in order to guarantee correct CS toggling behavior.
|
||||
|
||||
You can even use the same pin whose peripheral role is a SSEL,
|
||||
but use it as a GPIO instead.
|
||||
|
|
@ -1,195 +0,0 @@
|
|||
Linux on the CRIS architecture
|
||||
==============================
|
||||
|
||||
This is a port of Linux to Axis Communications ETRAX 100LX,
|
||||
ETRAX FS and ARTPEC-3 embedded network CPUs.
|
||||
|
||||
For more information about CRIS and ETRAX please see further below.
|
||||
|
||||
In order to compile this you need a version of gcc with support for the
|
||||
ETRAX chip family. Please see this link for more information on how to
|
||||
download the compiler and other tools useful when building and booting
|
||||
software for the ETRAX platform:
|
||||
|
||||
http://developer.axis.com/wiki/doku.php?id=axis:install-howto-2_20
|
||||
|
||||
What is CRIS ?
|
||||
--------------
|
||||
|
||||
CRIS is an acronym for 'Code Reduced Instruction Set'. It is the CPU
|
||||
architecture in Axis Communication AB's range of embedded network CPU's,
|
||||
called ETRAX.
|
||||
|
||||
The ETRAX 100LX chip
|
||||
--------------------
|
||||
|
||||
For reference, please see the following link:
|
||||
|
||||
http://www.axis.com/products/dev_etrax_100lx/index.htm
|
||||
|
||||
The ETRAX 100LX is a 100 MIPS processor with 8kB cache, MMU, and a very broad
|
||||
range of built-in interfaces, all with modern scatter/gather DMA.
|
||||
|
||||
Memory interfaces:
|
||||
|
||||
* SRAM
|
||||
* NOR-flash/ROM
|
||||
* EDO or page-mode DRAM
|
||||
* SDRAM
|
||||
|
||||
I/O interfaces:
|
||||
|
||||
* one 10/100 Mbit/s ethernet controller
|
||||
* four serial-ports (up to 6 Mbit/s)
|
||||
* two synchronous serial-ports for multimedia codec's etc.
|
||||
* USB host controller and USB slave
|
||||
* ATA
|
||||
* SCSI
|
||||
* two parallel-ports
|
||||
* two generic 8-bit ports
|
||||
|
||||
(not all interfaces are available at the same time due to chip pin
|
||||
multiplexing)
|
||||
|
||||
ETRAX 100LX is CRISv10 architecture.
|
||||
|
||||
|
||||
The ETRAX FS and ARTPEC-3 chips
|
||||
-------------------------------
|
||||
|
||||
The ETRAX FS is a 200MHz 32-bit RISC processor with on-chip 16kB
|
||||
I-cache and 16kB D-cache and with a wide range of device interfaces
|
||||
including multiple high speed serial ports and an integrated USB 1.1 PHY.
|
||||
|
||||
The ARTPEC-3 is a variant of the ETRAX FS with additional IO-units
|
||||
used by the Axis Communications network cameras.
|
||||
|
||||
See below link for more information:
|
||||
|
||||
http://www.axis.com/products/dev_etrax_fs/index.htm
|
||||
|
||||
ETRAX FS and ARTPEC-3 are both CRISv32 architectures.
|
||||
|
||||
Bootlog
|
||||
-------
|
||||
|
||||
Just as an example, this is the debug-output from a boot of Linux 2.4 on
|
||||
a board with ETRAX 100LX. The displayed BogoMIPS value is 5 times too small :)
|
||||
At the end you see some user-mode programs booting like telnet and ftp daemons.
|
||||
|
||||
Linux version 2.4.1 (bjornw@godzilla.axis.se) (gcc version 2.96 20000427 (experimental)) #207 Wed Feb 21 15:48:15 CET 2001
|
||||
ROM fs in RAM, size 1376256 bytes
|
||||
Setting up paging and the MMU.
|
||||
On node 0 totalpages: 2048
|
||||
zone(0): 2048 pages.
|
||||
zone(1): 0 pages.
|
||||
zone(2): 0 pages.
|
||||
Linux/CRIS port on ETRAX 100LX (c) 2001 Axis Communications AB
|
||||
Kernel command line:
|
||||
Calibrating delay loop... 19.91 BogoMIPS
|
||||
Memory: 13872k/16384k available (587k kernel code, 2512k reserved, 44k data, 24k init)
|
||||
kmem_create: Forcing size word alignment - vm_area_struct
|
||||
kmem_create: Forcing size word alignment - filp
|
||||
Dentry-cache hash table entries: 2048 (order: 1, 16384 bytes)
|
||||
Buffer-cache hash table entries: 2048 (order: 0, 8192 bytes)
|
||||
Page-cache hash table entries: 2048 (order: 0, 8192 bytes)
|
||||
kmem_create: Forcing size word alignment - kiobuf
|
||||
kmem_create: Forcing size word alignment - bdev_cache
|
||||
Inode-cache hash table entries: 1024 (order: 0, 8192 bytes)
|
||||
kmem_create: Forcing size word alignment - inode_cache
|
||||
POSIX conformance testing by UNIFIX
|
||||
Linux NET4.0 for Linux 2.4
|
||||
Based upon Swansea University Computer Society NET3.039
|
||||
Starting kswapd v1.8
|
||||
kmem_create: Forcing size word alignment - file lock cache
|
||||
kmem_create: Forcing size word alignment - blkdev_requests
|
||||
block: queued sectors max/low 9109kB/3036kB, 64 slots per queue
|
||||
ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000 Axis Communications AB
|
||||
eth0 initialized
|
||||
eth0: changed MAC to 00:40:8C:CD:00:00
|
||||
ETRAX 100LX serial-driver $Revision: 1.7 $, (c) 2000 Axis Communications AB
|
||||
ttyS0 at 0xb0000060 is a builtin UART with DMA
|
||||
ttyS1 at 0xb0000068 is a builtin UART with DMA
|
||||
ttyS2 at 0xb0000070 is a builtin UART with DMA
|
||||
ttyS3 at 0xb0000078 is a builtin UART with DMA
|
||||
Axis flash mapping: 200000 at 50000000
|
||||
Axis flash: Found 1 x16 CFI device at 0x0 in 16 bit mode
|
||||
Amd/Fujitsu Extended Query Table v1.0 at 0x0040
|
||||
Axis flash: JEDEC Device ID is 0xC4. Assuming broken CFI table.
|
||||
Axis flash: Swapping erase regions for broken CFI table.
|
||||
number of CFI chips: 1
|
||||
Using default partition table
|
||||
I2C driver v2.2, (c) 1999-2001 Axis Communications AB
|
||||
ETRAX 100LX GPIO driver v2.1, (c) 2001 Axis Communications AB
|
||||
NET4: Linux TCP/IP 1.0 for NET4.0
|
||||
IP Protocols: ICMP, UDP, TCP
|
||||
kmem_create: Forcing size word alignment - ip_dst_cache
|
||||
IP: routing cache hash table of 1024 buckets, 8Kbytes
|
||||
TCP: Hash tables configured (established 2048 bind 2048)
|
||||
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
|
||||
VFS: Mounted root (cramfs filesystem) readonly.
|
||||
Init starts up...
|
||||
Mounted none on /proc ok.
|
||||
Setting up eth0 with ip 10.13.9.116 and mac 00:40:8c:18:04:60
|
||||
eth0: changed MAC to 00:40:8C:18:04:60
|
||||
Setting up lo with ip 127.0.0.1
|
||||
Default gateway is 10.13.9.1
|
||||
Hostname is bbox1
|
||||
Telnetd starting, using port 23.
|
||||
using /bin/sash as shell.
|
||||
sftpd[15]: sftpd $Revision: 1.7 $ starting up
|
||||
|
||||
|
||||
|
||||
And here is how some /proc entries look:
|
||||
|
||||
17# cd /proc
|
||||
17# cat cpuinfo
|
||||
cpu : CRIS
|
||||
cpu revision : 10
|
||||
cpu model : ETRAX 100LX
|
||||
cache size : 8 kB
|
||||
fpu : no
|
||||
mmu : yes
|
||||
ethernet : 10/100 Mbps
|
||||
token ring : no
|
||||
scsi : yes
|
||||
ata : yes
|
||||
usb : yes
|
||||
bogomips : 99.84
|
||||
|
||||
17# cat meminfo
|
||||
total: used: free: shared: buffers: cached:
|
||||
Mem: 7028736 925696 6103040 114688 0 229376
|
||||
Swap: 0 0 0
|
||||
MemTotal: 6864 kB
|
||||
MemFree: 5960 kB
|
||||
MemShared: 112 kB
|
||||
Buffers: 0 kB
|
||||
Cached: 224 kB
|
||||
Active: 224 kB
|
||||
Inact_dirty: 0 kB
|
||||
Inact_clean: 0 kB
|
||||
Inact_target: 0 kB
|
||||
HighTotal: 0 kB
|
||||
HighFree: 0 kB
|
||||
LowTotal: 6864 kB
|
||||
LowFree: 5960 kB
|
||||
SwapTotal: 0 kB
|
||||
SwapFree: 0 kB
|
||||
17# ls -l /bin
|
||||
-rwxr-xr-x 1 342 100 10356 Jan 01 00:00 ifconfig
|
||||
-rwxr-xr-x 1 342 100 17548 Jan 01 00:00 init
|
||||
-rwxr-xr-x 1 342 100 9488 Jan 01 00:00 route
|
||||
-rwxr-xr-x 1 342 100 46036 Jan 01 00:00 sftpd
|
||||
-rwxr-xr-x 1 342 100 48104 Jan 01 00:00 sh
|
||||
-rwxr-xr-x 1 342 100 16252 Jan 01 00:00 telnetd
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
|
@ -8,7 +8,7 @@ with the difference that the orphan objects are not freed but only
|
|||
reported via /sys/kernel/debug/kmemleak. A similar method is used by the
|
||||
Valgrind tool (``memcheck --leak-check``) to detect the memory leaks in
|
||||
user-space applications.
|
||||
Kmemleak is supported on x86, arm, powerpc, sparc, sh, microblaze, ppc, mips, s390, metag and tile.
|
||||
Kmemleak is supported on x86, arm, powerpc, sparc, sh, microblaze, ppc, mips, s390 and tile.
|
||||
|
||||
Usage
|
||||
-----
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
Axis Communications AB
|
||||
ARTPEC series SoC Device Tree Bindings
|
||||
|
||||
|
||||
CRISv32 based SoCs are ETRAX FS and ARTPEC-3:
|
||||
|
||||
- compatible = "axis,crisv32";
|
||||
|
||||
|
||||
|
|
@ -1,8 +0,0 @@
|
|||
Boards based on the CRIS SoCs:
|
||||
|
||||
Required root node properties:
|
||||
- compatible = should be one or more of the following:
|
||||
- "axis,dev88" - for Axis devboard 88 with ETRAX FS
|
||||
|
||||
Optional:
|
||||
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
Renesas R-Car LVDS Encoder
|
||||
==========================
|
||||
|
||||
These DT bindings describe the LVDS encoder embedded in the Renesas R-Car
|
||||
Gen2, R-Car Gen3 and RZ/G SoCs.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : Shall contain one of
|
||||
- "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
|
||||
- "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
|
||||
- "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
|
||||
- "renesas,r8a7793-lvds" for R8A7793 (R-Car M2-N) compatible LVDS encoders
|
||||
- "renesas,r8a7795-lvds" for R8A7795 (R-Car H3) compatible LVDS encoders
|
||||
- "renesas,r8a7796-lvds" for R8A7796 (R-Car M3-W) compatible LVDS encoders
|
||||
- "renesas,r8a77970-lvds" for R8A77970 (R-Car V3M) compatible LVDS encoders
|
||||
- "renesas,r8a77995-lvds" for R8A77995 (R-Car D3) compatible LVDS encoders
|
||||
|
||||
- reg: Base address and length for the memory-mapped registers
|
||||
- clocks: A phandle + clock-specifier pair for the functional clock
|
||||
- resets: A phandle + reset specifier for the module reset
|
||||
|
||||
Required nodes:
|
||||
|
||||
The LVDS encoder has two video ports. Their connections are modelled using the
|
||||
OF graph bindings specified in Documentation/devicetree/bindings/graph.txt.
|
||||
|
||||
- Video port 0 corresponds to the parallel RGB input
|
||||
- Video port 1 corresponds to the LVDS output
|
||||
|
||||
Each port shall have a single endpoint.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
lvds0: lvds@feb90000 {
|
||||
compatible = "renesas,r8a7790-lvds";
|
||||
reg = <0 0xfeb90000 0 0x1c>;
|
||||
clocks = <&cpg CPG_MOD 726>;
|
||||
resets = <&cpg 726>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&du_out_lvds0>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
lvds0_out: endpoint {
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,11 +1,16 @@
|
|||
THS8135 Video DAC
|
||||
-----------------
|
||||
THS8134 and THS8135 Video DAC
|
||||
-----------------------------
|
||||
|
||||
This is the binding for Texas Instruments THS8135 Video DAC bridge.
|
||||
This is the binding for Texas Instruments THS8134, THS8134A, THS8134B and
|
||||
THS8135 Video DAC bridges.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be "ti,ths8135"
|
||||
- compatible: Must be one of
|
||||
"ti,ths8134"
|
||||
"ti,ths8134a," "ti,ths8134"
|
||||
"ti,ths8134b", "ti,ths8134"
|
||||
"ti,ths8135"
|
||||
|
||||
Required nodes:
|
||||
|
||||
|
|
@ -10,6 +10,7 @@ Optional properties:
|
|||
- analog: the connector has DVI analog pins
|
||||
- digital: the connector has DVI digital pins
|
||||
- dual-link: the connector has pins for DVI dual-link
|
||||
- hpd-gpios: HPD GPIO number
|
||||
|
||||
Required nodes:
|
||||
- Video port for DVI input
|
||||
|
|
|
|||
|
|
@ -1,23 +1,3 @@
|
|||
Etnaviv DRM master device
|
||||
=========================
|
||||
|
||||
The Etnaviv DRM master device is a virtual device needed to list all
|
||||
Vivante GPU cores that comprise the GPU subsystem.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of
|
||||
"fsl,imx-gpu-subsystem"
|
||||
"marvell,dove-gpu-subsystem"
|
||||
- cores: Should contain a list of phandles pointing to Vivante GPU devices
|
||||
|
||||
example:
|
||||
|
||||
gpu-subsystem {
|
||||
compatible = "fsl,imx-gpu-subsystem";
|
||||
cores = <&gpu_2d>, <&gpu_3d>;
|
||||
};
|
||||
|
||||
|
||||
Vivante GPU core devices
|
||||
========================
|
||||
|
||||
|
|
@ -32,7 +12,9 @@ Required properties:
|
|||
- clocks: should contain one clock for entry in clock-names
|
||||
see Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
- clock-names:
|
||||
- "bus": AXI/register clock
|
||||
- "bus": AXI/master interface clock
|
||||
- "reg": AHB/slave interface clock
|
||||
(only required if GPU can gate slave interface independently)
|
||||
- "core": GPU core clock
|
||||
- "shader": Shader clock (only required if GPU has feature PIPE_3D)
|
||||
|
||||
|
|
|
|||
|
|
@ -7,8 +7,6 @@ Required properties:
|
|||
- reg: Physical base address and length of the registers of controller
|
||||
- reg-names: The names of register regions. The following regions are required:
|
||||
* "dsi_ctrl"
|
||||
- qcom,dsi-host-index: The ID of DSI controller hardware instance. This should
|
||||
be 0 or 1, since we have 2 DSI controllers at most for now.
|
||||
- interrupts: The interrupt signal from the DSI block.
|
||||
- power-domains: Should be <&mmcc MDSS_GDSC>.
|
||||
- clocks: Phandles to device clocks.
|
||||
|
|
@ -22,6 +20,8 @@ Required properties:
|
|||
* "core"
|
||||
For DSIv2, we need an additional clock:
|
||||
* "src"
|
||||
For DSI6G v2.0 onwards, we need also need the clock:
|
||||
* "byte_intf"
|
||||
- assigned-clocks: Parents of "byte" and "pixel" for the given platform.
|
||||
- assigned-clock-parents: The Byte clock and Pixel clock PLL outputs provided
|
||||
by a DSI PHY block. See [1] for details on clock bindings.
|
||||
|
|
@ -88,21 +88,35 @@ Required properties:
|
|||
* "qcom,dsi-phy-28nm-lp"
|
||||
* "qcom,dsi-phy-20nm"
|
||||
* "qcom,dsi-phy-28nm-8960"
|
||||
- reg: Physical base address and length of the registers of PLL, PHY and PHY
|
||||
regulator
|
||||
* "qcom,dsi-phy-14nm"
|
||||
* "qcom,dsi-phy-10nm"
|
||||
- reg: Physical base address and length of the registers of PLL, PHY. Some
|
||||
revisions require the PHY regulator base address, whereas others require the
|
||||
PHY lane base address. See below for each PHY revision.
|
||||
- reg-names: The names of register regions. The following regions are required:
|
||||
For DSI 28nm HPM/LP/8960 PHYs and 20nm PHY:
|
||||
* "dsi_pll"
|
||||
* "dsi_phy"
|
||||
* "dsi_phy_regulator"
|
||||
For DSI 14nm and 10nm PHYs:
|
||||
* "dsi_pll"
|
||||
* "dsi_phy"
|
||||
* "dsi_phy_lane"
|
||||
- clock-cells: Must be 1. The DSI PHY block acts as a clock provider, creating
|
||||
2 clocks: A byte clock (index 0), and a pixel clock (index 1).
|
||||
- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
|
||||
be 0 or 1, since we have 2 DSI PHYs at most for now.
|
||||
- power-domains: Should be <&mmcc MDSS_GDSC>.
|
||||
- clocks: Phandles to device clocks. See [1] for details on clock bindings.
|
||||
- clock-names: the following clocks are required:
|
||||
* "iface"
|
||||
For 28nm HPM/LP, 28nm 8960 PHYs:
|
||||
- vddio-supply: phandle to vdd-io regulator device node
|
||||
For 20nm PHY:
|
||||
- vddio-supply: phandle to vdd-io regulator device node
|
||||
- vcca-supply: phandle to vcca regulator device node
|
||||
For 14nm PHY:
|
||||
- vcca-supply: phandle to vcca regulator device node
|
||||
For 10nm PHY:
|
||||
- vdds-supply: phandle to vdds regulator device node
|
||||
|
||||
Optional properties:
|
||||
- qcom,dsi-phy-regulator-ldo-mode: Boolean value indicating if the LDO mode PHY
|
||||
|
|
|
|||
|
|
@ -0,0 +1,31 @@
|
|||
ARM Versatile TFT Panels
|
||||
|
||||
These panels are connected to the daughterboards found on the
|
||||
ARM Versatile reference designs.
|
||||
|
||||
This device node must appear as a child to a "syscon"-compatible
|
||||
node.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "arm,versatile-tft-panel"
|
||||
|
||||
Required subnodes:
|
||||
- port: see display/panel/panel-common.txt, graph.txt
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
sysreg@0 {
|
||||
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
|
||||
reg = <0x00000 0x1000>;
|
||||
|
||||
panel: display@0 {
|
||||
compatible = "arm,versatile-tft-panel";
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&foo>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
AU Optronics Corporation 10.4" (800x600) color TFT LCD panel
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "auo,g104sn02"
|
||||
- power-supply: as specified in the base binding
|
||||
|
||||
Optional properties:
|
||||
- backlight: as specified in the base binding
|
||||
- enable-gpios: as specified in the base binding
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
|
@ -80,6 +80,11 @@ The parameters are defined as:
|
|||
| | v | | |
|
||||
+----------+-------------------------------------+----------+-------+
|
||||
|
||||
Note: In addition to being used as subnode(s) of display-timings, the timing
|
||||
subnode may also be used on its own. This is appropriate if only one mode
|
||||
need be conveyed. In this case, the node should be named 'panel-timing'.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
display-timings {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,25 @@
|
|||
Kaohsiung Opto-Electronics. TX31D200VM0BAA 12.3" HSXGA LVDS panel
|
||||
|
||||
This binding is compatible with the simple-panel binding, which is specified
|
||||
in simple-panel.txt in this directory.
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "koe,tx31d200vm0baa"
|
||||
|
||||
Optional properties:
|
||||
- backlight: phandle of the backlight device attached to the panel
|
||||
|
||||
Optional nodes:
|
||||
- Video port for LVDS panel input.
|
||||
|
||||
Example:
|
||||
panel {
|
||||
compatible = "koe,tx31d200vm0baa";
|
||||
backlight = <&backlight_lvds>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -9,6 +9,7 @@ Required properties:
|
|||
|
||||
Optional properties:
|
||||
- reset-gpios: a GPIO spec for the reset pin (active low).
|
||||
- power-supply: phandle of the regulator that provides the supply voltage.
|
||||
|
||||
Example:
|
||||
&dsi {
|
||||
|
|
@ -17,5 +18,6 @@ Example:
|
|||
compatible = "orisetech,otm8009a";
|
||||
reg = <0>;
|
||||
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
|
||||
power-supply = <&v1v8>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,25 @@
|
|||
Raydium Semiconductor Corporation RM68200 5.5" 720p MIPI-DSI TFT LCD panel
|
||||
|
||||
The Raydium Semiconductor Corporation RM68200 is a 5.5" 720x1280 TFT LCD
|
||||
panel connected using a MIPI-DSI video interface.
|
||||
|
||||
Required properties:
|
||||
- compatible: "raydium,rm68200"
|
||||
- reg: the virtual channel number of a DSI peripheral
|
||||
|
||||
Optional properties:
|
||||
- reset-gpios: a GPIO spec for the reset pin (active low).
|
||||
- power-supply: phandle of the regulator that provides the supply voltage.
|
||||
- backlight: phandle of the backlight device attached to the panel.
|
||||
|
||||
Example:
|
||||
&dsi {
|
||||
...
|
||||
panel@0 {
|
||||
compatible = "raydium,rm68200";
|
||||
reg = <0>;
|
||||
reset-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>;
|
||||
power-supply = <&v1v8>;
|
||||
backlight = <&pwm_backlight>;
|
||||
};
|
||||
};
|
||||
|
|
@ -1,4 +1,8 @@
|
|||
Simple display panel
|
||||
====================
|
||||
|
||||
panel node
|
||||
----------
|
||||
|
||||
Required properties:
|
||||
- power-supply: See panel-common.txt
|
||||
|
|
|
|||
|
|
@ -13,13 +13,10 @@ Required Properties:
|
|||
- "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU
|
||||
- "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU
|
||||
- "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU
|
||||
- "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU
|
||||
- "renesas,du-r8a77995" for R8A77995 (R-Car D3) compatible DU
|
||||
|
||||
- reg: A list of base address and length of each memory resource, one for
|
||||
each entry in the reg-names property.
|
||||
- reg-names: Name of the memory resources. The DU requires one memory
|
||||
resource for the DU core (named "du") and one memory resource for each
|
||||
LVDS encoder (named "lvds.x" with "x" being the LVDS controller numerical
|
||||
index).
|
||||
- reg: the memory-mapped I/O registers base address and length
|
||||
|
||||
- interrupt-parent: phandle of the parent interrupt controller.
|
||||
- interrupts: Interrupt specifiers for the DU interrupts.
|
||||
|
|
@ -29,14 +26,13 @@ Required Properties:
|
|||
- clock-names: Name of the clocks. This property is model-dependent.
|
||||
- R8A7779 uses a single functional clock. The clock doesn't need to be
|
||||
named.
|
||||
- All other DU instances use one functional clock per channel and one
|
||||
clock per LVDS encoder (if available). The functional clocks must be
|
||||
named "du.x" with "x" being the channel numerical index. The LVDS clocks
|
||||
must be named "lvds.x" with "x" being the LVDS encoder numerical index.
|
||||
- In addition to the functional and encoder clocks, all DU versions also
|
||||
support externally supplied pixel clocks. Those clocks are optional.
|
||||
When supplied they must be named "dclkin.x" with "x" being the input
|
||||
clock numerical index.
|
||||
- All other DU instances use one functional clock per channel The
|
||||
functional clocks must be named "du.x" with "x" being the channel
|
||||
numerical index.
|
||||
- In addition to the functional clocks, all DU versions also support
|
||||
externally supplied pixel clocks. Those clocks are optional. When
|
||||
supplied they must be named "dclkin.x" with "x" being the input clock
|
||||
numerical index.
|
||||
|
||||
- vsps: A list of phandle and channel index tuples to the VSPs that handle
|
||||
the memory interfaces for the DU channels. The phandle identifies the VSP
|
||||
|
|
@ -63,15 +59,15 @@ corresponding to each DU output.
|
|||
R8A7794 (R-Car E2) DPAD 0 DPAD 1 - -
|
||||
R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0
|
||||
R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 -
|
||||
R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - -
|
||||
R8A77995 (R-Car D3) DPAD 0 LVDS 0 LVDS 1 -
|
||||
|
||||
|
||||
Example: R8A7795 (R-Car H3) ES2.0 DU
|
||||
|
||||
du: display@feb00000 {
|
||||
compatible = "renesas,du-r8a7795";
|
||||
reg = <0 0xfeb00000 0 0x80000>,
|
||||
<0 0xfeb90000 0 0x14>;
|
||||
reg-names = "du", "lvds.0";
|
||||
reg = <0 0xfeb00000 0 0x80000>;
|
||||
interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
|
||||
|
|
@ -79,9 +75,8 @@ Example: R8A7795 (R-Car H3) ES2.0 DU
|
|||
clocks = <&cpg CPG_MOD 724>,
|
||||
<&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>,
|
||||
<&cpg CPG_MOD 721>,
|
||||
<&cpg CPG_MOD 727>;
|
||||
clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
|
||||
<&cpg CPG_MOD 721>;
|
||||
clock-names = "du.0", "du.1", "du.2", "du.3";
|
||||
vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
|
||||
|
||||
ports {
|
||||
|
|
|
|||
|
|
@ -0,0 +1,74 @@
|
|||
Rockchip RK3399 specific extensions to the cdn Display Port
|
||||
================================
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "rockchip,rk3399-cdn-dp"
|
||||
|
||||
- reg: physical base address of the controller and length
|
||||
|
||||
- clocks: from common clock binding: handle to dp clock.
|
||||
|
||||
- clock-names: from common clock binding:
|
||||
Required elements: "core-clk" "pclk" "spdif" "grf"
|
||||
|
||||
- resets : a list of phandle + reset specifier pairs
|
||||
- reset-names : string of reset names
|
||||
Required elements: "apb", "core", "dptx", "spdif"
|
||||
- power-domains : power-domain property defined with a phandle
|
||||
to respective power domain.
|
||||
- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
|
||||
- assigned-clock-rates : the DP core clk frequency, shall be: 100000000
|
||||
|
||||
- rockchip,grf: this soc should set GRF regs, so need get grf here.
|
||||
|
||||
- ports: contain a port nodes with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
contained 2 endpoints, connecting to the output of vop.
|
||||
|
||||
- phys: from general PHY binding: the phandle for the PHY device.
|
||||
|
||||
- extcon: extcon specifier for the Power Delivery
|
||||
|
||||
- #sound-dai-cells = it must be 1 if your system is using 2 DAIs: I2S, SPDIF
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
Example:
|
||||
cdn_dp: dp@fec00000 {
|
||||
compatible = "rockchip,rk3399-cdn-dp";
|
||||
reg = <0x0 0xfec00000 0x0 0x100000>;
|
||||
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
|
||||
<&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
|
||||
clock-names = "core-clk", "pclk", "spdif", "grf";
|
||||
assigned-clocks = <&cru SCLK_DP_CORE>;
|
||||
assigned-clock-rates = <100000000>;
|
||||
power-domains = <&power RK3399_PD_HDCP>;
|
||||
phys = <&tcphy0_dp>, <&tcphy1_dp>;
|
||||
resets = <&cru SRST_DPTX_SPDIF_REC>;
|
||||
reset-names = "spdif";
|
||||
extcon = <&fusb0>, <&fusb1>;
|
||||
rockchip,grf = <&grf>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
#sound-dai-cells = <1>;
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
dp_in: port {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dp_in_vopb: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&vopb_out_dp>;
|
||||
};
|
||||
|
||||
dp_in_vopl: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&vopl_out_dp>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -98,7 +98,7 @@ Example 2: DSI panel
|
|||
compatible = "st,stm32-dsi";
|
||||
reg = <0x40016c00 0x800>;
|
||||
clocks = <&rcc 1 CLK_F469_DSI>, <&clk_hse>;
|
||||
clock-names = "ref", "pclk";
|
||||
clock-names = "pclk", "ref";
|
||||
resets = <&rcc STM32F4_APB2_RESET(DSI)>;
|
||||
reset-names = "apb";
|
||||
|
||||
|
|
|
|||
|
|
@ -64,6 +64,56 @@ Required properties:
|
|||
first port should be the input endpoint. The second should be the
|
||||
output, usually to an HDMI connector.
|
||||
|
||||
DWC HDMI TX Encoder
|
||||
-------------------
|
||||
|
||||
The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
|
||||
with Allwinner's own PHY IP. It supports audio and video outputs and CEC.
|
||||
|
||||
These DT bindings follow the Synopsys DWC HDMI TX bindings defined in
|
||||
Documentation/devicetree/bindings/display/bridge/dw_hdmi.txt with the
|
||||
following device-specific properties.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: value must be one of:
|
||||
* "allwinner,sun8i-a83t-dw-hdmi"
|
||||
- reg: base address and size of memory-mapped region
|
||||
- reg-io-width: See dw_hdmi.txt. Shall be 1.
|
||||
- interrupts: HDMI interrupt number
|
||||
- clocks: phandles to the clocks feeding the HDMI encoder
|
||||
* iahb: the HDMI bus clock
|
||||
* isfr: the HDMI register clock
|
||||
* tmds: TMDS clock
|
||||
- clock-names: the clock names mentioned above
|
||||
- resets: phandle to the reset controller
|
||||
- reset-names: must be "ctrl"
|
||||
- phys: phandle to the DWC HDMI PHY
|
||||
- phy-names: must be "phy"
|
||||
|
||||
- ports: A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoint. The second should be the
|
||||
output, usually to an HDMI connector.
|
||||
|
||||
DWC HDMI PHY
|
||||
------------
|
||||
|
||||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun8i-a83t-hdmi-phy
|
||||
* allwinner,sun8i-h3-hdmi-phy
|
||||
- reg: base address and size of memory-mapped region
|
||||
- clocks: phandles to the clocks feeding the HDMI PHY
|
||||
* bus: the HDMI PHY interface clock
|
||||
* mod: the HDMI PHY module clock
|
||||
- clock-names: the clock names mentioned above
|
||||
- resets: phandle to the reset controller driving the PHY
|
||||
- reset-names: must be "phy"
|
||||
|
||||
H3 HDMI PHY requires additional clock:
|
||||
- pll-0: parent of phy clock
|
||||
|
||||
TV Encoder
|
||||
----------
|
||||
|
||||
|
|
@ -94,24 +144,29 @@ Required properties:
|
|||
* allwinner,sun7i-a20-tcon
|
||||
* allwinner,sun8i-a33-tcon
|
||||
* allwinner,sun8i-a83t-tcon-lcd
|
||||
* allwinner,sun8i-a83t-tcon-tv
|
||||
* allwinner,sun8i-v3s-tcon
|
||||
* allwinner,sun9i-a80-tcon-lcd
|
||||
* allwinner,sun9i-a80-tcon-tv
|
||||
- reg: base address and size of memory-mapped region
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the TCON. Three are needed:
|
||||
- clocks: phandles to the clocks feeding the TCON.
|
||||
- 'ahb': the interface clocks
|
||||
- 'tcon-ch0': The clock driving the TCON channel 0
|
||||
- 'tcon-ch0': The clock driving the TCON channel 0, if supported
|
||||
- resets: phandles to the reset controllers driving the encoder
|
||||
- "lcd": the reset line for the TCON channel 0
|
||||
- "lcd": the reset line for the TCON
|
||||
- "edp": the reset line for the eDP block (A80 only)
|
||||
|
||||
- clock-names: the clock names mentioned above
|
||||
- reset-names: the reset names mentioned above
|
||||
- clock-output-names: Name of the pixel clock created
|
||||
- clock-output-names: Name of the pixel clock created, if TCON supports
|
||||
channel 0.
|
||||
|
||||
- ports: A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoint, the second one the output
|
||||
|
||||
The output may have multiple endpoints. The TCON has two channels,
|
||||
The output may have multiple endpoints. TCON can have 1 or 2 channels,
|
||||
usually with the first channel being used for the panels interfaces
|
||||
(RGB, LVDS, etc.), and the second being used for the outputs that
|
||||
require another controller (TV Encoder, HDMI, etc.). The endpoints
|
||||
|
|
@ -119,11 +174,13 @@ Required properties:
|
|||
channel the endpoint is associated to. If that property is not
|
||||
present, the endpoint number will be used as the channel number.
|
||||
|
||||
On SoCs other than the A33 and V3s, there is one more clock required:
|
||||
For TCONs with channel 0, there is one more clock required:
|
||||
- 'tcon-ch0': The clock driving the TCON channel 0
|
||||
For TCONs with channel 1, there is one more clock required:
|
||||
- 'tcon-ch1': The clock driving the TCON channel 1
|
||||
|
||||
On SoCs that support LVDS (all SoCs but the A13, H3, H5 and V3s), you
|
||||
need one more reset line:
|
||||
When TCON support LVDS (all TCONs except TV TCON on A83T and those found
|
||||
in A13, H3, H5 and V3s SoCs), you need one more reset line:
|
||||
- 'lvds': The reset line driving the LVDS logic
|
||||
|
||||
And on the A23, A31, A31s and A33, you need one more clock line:
|
||||
|
|
@ -134,7 +191,7 @@ DRC
|
|||
---
|
||||
|
||||
The DRC (Dynamic Range Controller), found in the latest Allwinner SoCs
|
||||
(A31, A23, A33), allows to dynamically adjust pixel
|
||||
(A31, A23, A33, A80), allows to dynamically adjust pixel
|
||||
brightness/contrast based on histogram measurements for LCD content
|
||||
adaptive backlight control.
|
||||
|
||||
|
|
@ -144,6 +201,7 @@ Required properties:
|
|||
* allwinner,sun6i-a31-drc
|
||||
* allwinner,sun6i-a31s-drc
|
||||
* allwinner,sun8i-a33-drc
|
||||
* allwinner,sun9i-a80-drc
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the DRC
|
||||
|
|
@ -170,6 +228,7 @@ Required properties:
|
|||
* allwinner,sun6i-a31-display-backend
|
||||
* allwinner,sun7i-a20-display-backend
|
||||
* allwinner,sun8i-a33-display-backend
|
||||
* allwinner,sun9i-a80-display-backend
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the frontend and backend
|
||||
|
|
@ -191,6 +250,28 @@ On the A33, some additional properties are required:
|
|||
- resets and reset-names need to have a phandle to the SAT bus
|
||||
resets, whose name will be "sat"
|
||||
|
||||
DEU
|
||||
---
|
||||
|
||||
The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,
|
||||
can sharpen the display content in both luma and chroma channels.
|
||||
|
||||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun9i-a80-deu
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the DEU
|
||||
* ahb: the DEU interface clock
|
||||
* mod: the DEU module clock
|
||||
* ram: the DEU DRAM clock
|
||||
- clock-names: the clock names mentioned above
|
||||
- resets: phandles to the reset line driving the DEU
|
||||
|
||||
- ports: A ports node with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt. The
|
||||
first port should be the input endpoints, the second one the outputs
|
||||
|
||||
Display Engine Frontend
|
||||
-----------------------
|
||||
|
||||
|
|
@ -204,6 +285,7 @@ Required properties:
|
|||
* allwinner,sun6i-a31-display-frontend
|
||||
* allwinner,sun7i-a20-display-frontend
|
||||
* allwinner,sun8i-a33-display-frontend
|
||||
* allwinner,sun9i-a80-display-frontend
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- interrupts: interrupt associated to this IP
|
||||
- clocks: phandles to the clocks feeding the frontend and backend
|
||||
|
|
@ -226,6 +308,8 @@ supported.
|
|||
Required properties:
|
||||
- compatible: value must be one of:
|
||||
* allwinner,sun8i-a83t-de2-mixer-0
|
||||
* allwinner,sun8i-a83t-de2-mixer-1
|
||||
* allwinner,sun8i-h3-de2-mixer-0
|
||||
* allwinner,sun8i-v3s-de2-mixer
|
||||
- reg: base address and size of the memory-mapped region.
|
||||
- clocks: phandles to the clocks feeding the mixer
|
||||
|
|
@ -256,7 +340,9 @@ Required properties:
|
|||
* allwinner,sun7i-a20-display-engine
|
||||
* allwinner,sun8i-a33-display-engine
|
||||
* allwinner,sun8i-a83t-display-engine
|
||||
* allwinner,sun8i-h3-display-engine
|
||||
* allwinner,sun8i-v3s-display-engine
|
||||
* allwinner,sun9i-a80-display-engine
|
||||
|
||||
- allwinner,pipelines: list of phandle to the display engine
|
||||
frontends (DE 1.0) or mixers (DE 2.0) available.
|
||||
|
|
|
|||
|
|
@ -1,22 +0,0 @@
|
|||
Axis ETRAX FS General I/O controller bindings
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: one of:
|
||||
- "axis,etraxfs-gio"
|
||||
- "axis,artpec3-gio"
|
||||
- reg: Physical base address and length of the controller's registers.
|
||||
- #gpio-cells: Should be 3
|
||||
- The first cell is the gpio offset number.
|
||||
- The second cell is reserved and is currently unused.
|
||||
- The third cell is the port number (hex).
|
||||
- gpio-controller: Marks the device node as a GPIO controller.
|
||||
|
||||
Example:
|
||||
|
||||
gio: gpio@b001a000 {
|
||||
compatible = "axis,etraxfs-gio";
|
||||
reg = <0xb001a000 0x1000>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <3>;
|
||||
};
|
||||
|
|
@ -0,0 +1,19 @@
|
|||
* Andestech Internal Vector Interrupt Controller
|
||||
|
||||
The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller
|
||||
suitable for a simpler SoC platform not requiring a more sophisticated and
|
||||
bigger External Vector Interrupt Controller.
|
||||
|
||||
|
||||
Main node required properties:
|
||||
|
||||
- compatible : should at least contain "andestech,ativic32".
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts
|
||||
|
||||
Examples:
|
||||
intc: interrupt-controller {
|
||||
compatible = "andestech,ativic32";
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-controller;
|
||||
};
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
* CRISv32 Interrupt Controller
|
||||
|
||||
Interrupt controller for the CRISv32 SoCs.
|
||||
|
||||
Main node required properties:
|
||||
|
||||
- compatible : should be:
|
||||
"axis,crisv32-intc"
|
||||
- interrupt-controller : Identifies the node as an interrupt controller
|
||||
- #interrupt-cells : Specifies the number of cells needed to encode an
|
||||
interrupt source. The type shall be a <u32> and the value shall be 1.
|
||||
- reg: physical base address and size of the intc registers map.
|
||||
|
||||
Example:
|
||||
|
||||
intc: interrupt-controller {
|
||||
compatible = "axis,crisv32-intc";
|
||||
reg = <0xb001c000 0x1000>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
Jailhouse non-root cell device tree bindings
|
||||
--------------------------------------------
|
||||
|
||||
When running in a non-root Jailhouse cell (partition), the device tree of this
|
||||
platform shall have a top-level "hypervisor" node with the following
|
||||
properties:
|
||||
|
||||
- compatible = "jailhouse,cell"
|
||||
|
|
@ -1,30 +0,0 @@
|
|||
* Meta Processor Binding
|
||||
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of a Meta Processor Core, which is the root node in the tree.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Specifies the compatibility list for the Meta processor.
|
||||
The type shall be <string> and the value shall include "img,meta".
|
||||
|
||||
Optional properties:
|
||||
|
||||
- clocks: Clock consumer specifiers as described in
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
- clock-names: Clock consumer names as described in
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt.
|
||||
|
||||
Clocks are identified by name. Valid clocks are:
|
||||
|
||||
- "core": The Meta core clock from which the Meta timers are derived.
|
||||
|
||||
* Examples
|
||||
|
||||
/ {
|
||||
compatible = "toumaz,tz1090", "img,meta";
|
||||
|
||||
clocks = <&meta_core_clk>;
|
||||
clock-names = "core";
|
||||
};
|
||||
|
|
@ -0,0 +1,40 @@
|
|||
Andestech(nds32) AE3XX Platform
|
||||
-----------------------------------------------------------------------------
|
||||
The AE3XX prototype demonstrates the AE3XX example platform on the FPGA. It
|
||||
is composed of one Andestech(nds32) processor and AE3XX.
|
||||
|
||||
Required properties (in root node):
|
||||
- compatible = "andestech,ae3xx";
|
||||
|
||||
Example:
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "andestech,ae3xx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
||||
Andestech(nds32) AG101P Platform
|
||||
-----------------------------------------------------------------------------
|
||||
AG101P is a generic SoC Platform IP that works with any of Andestech(nds32)
|
||||
processors to provide a cost-effective and high performance solution for
|
||||
majority of embedded systems in variety of application domains. Users may
|
||||
simply attach their IP on one of the system buses together with certain glue
|
||||
logics to complete a SoC solution for a specific application. With
|
||||
comprehensive simulation and design environments, users may evaluate the
|
||||
system performance of their applications and track bugs of their designs
|
||||
efficiently. The optional hardware development platform further provides real
|
||||
system environment for early prototyping and software/hardware co-development.
|
||||
|
||||
Required properties (in root node):
|
||||
compatible = "andestech,ag101p";
|
||||
|
||||
Example:
|
||||
/dts-v1/;
|
||||
/ {
|
||||
compatible = "andestech,ag101p";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&intc>;
|
||||
};
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
* Andestech L2 cache Controller
|
||||
|
||||
The level-2 cache controller plays an important role in reducing memory latency
|
||||
for high performance systems, such as thoese designs with AndesCore processors.
|
||||
Level-2 cache controller in general enhances overall system performance
|
||||
signigicantly and the system power consumption might be reduced as well by
|
||||
reducing DRAM accesses.
|
||||
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of an Andestech L2 cache controller.
|
||||
|
||||
Required properties:
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: "andestech,atl2c"
|
||||
- reg : Physical base address and size of cache controller's memory mapped
|
||||
- cache-unified : Specifies the cache is a unified cache.
|
||||
- cache-level : Should be set to 2 for a level 2 cache.
|
||||
|
||||
* Example
|
||||
|
||||
cache-controller@e0500000 {
|
||||
compatible = "andestech,atl2c";
|
||||
reg = <0xe0500000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
|
@ -0,0 +1,38 @@
|
|||
* Andestech Processor Binding
|
||||
|
||||
This binding specifies what properties must be available in the device tree
|
||||
representation of a Andestech Processor Core, which is the root node in the
|
||||
tree.
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible:
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Should be "andestech,<core_name>", "andestech,nds32v3" as fallback.
|
||||
Must contain "andestech,nds32v3" as the most generic value, in addition to
|
||||
one of the following identifiers for a particular CPU core:
|
||||
"andestech,n13"
|
||||
"andestech,n15"
|
||||
"andestech,d15"
|
||||
"andestech,n10"
|
||||
"andestech,d10"
|
||||
- device_type
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: must be "cpu"
|
||||
- reg: Contains CPU index.
|
||||
- clock-frequency: Contains the clock frequency for CPU, in Hz.
|
||||
|
||||
* Examples
|
||||
|
||||
/ {
|
||||
cpus {
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "andestech,n13", "andestech,nds32v3";
|
||||
reg = <0x0>;
|
||||
clock-frequency = <60000000>
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,22 +0,0 @@
|
|||
ETRAX FS UART
|
||||
|
||||
Required properties:
|
||||
- compatible : "axis,etraxfs-uart"
|
||||
- reg: offset and length of the register set for the device.
|
||||
- interrupts: device interrupt
|
||||
|
||||
Optional properties:
|
||||
- {dtr,dsr,rng,dcd}-gpios: specify a GPIO for DTR/DSR/RI/DCD
|
||||
line respectively.
|
||||
|
||||
Example:
|
||||
|
||||
serial@b00260000 {
|
||||
compatible = "axis,etraxfs-uart";
|
||||
reg = <0xb0026000 0x1000>;
|
||||
interrupts = <68>;
|
||||
dtr-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
|
||||
dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
|
||||
rng-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
|
||||
dcd-gpios = <&sysgpio 3 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
Andestech ATCPIT100 timer
|
||||
------------------------------------------------------------------
|
||||
ATCPIT100 is a generic IP block from Andes Technology, embedded in
|
||||
Andestech AE3XX platforms and other designs.
|
||||
|
||||
This timer is a set of compact multi-function timers, which can be
|
||||
used as pulse width modulators (PWM) as well as simple timers.
|
||||
|
||||
It supports up to 4 PIT channels. Each PIT channel is a
|
||||
multi-function timer and provide the following usage scenarios:
|
||||
One 32-bit timer
|
||||
Two 16-bit timers
|
||||
Four 8-bit timers
|
||||
One 16-bit PWM
|
||||
One 16-bit timer and one 8-bit PWM
|
||||
Two 8-bit timer and one 8-bit PWM
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "andestech,atcpit100"
|
||||
- reg : Address and length of the register set
|
||||
- interrupts : Reference to the timer interrupt
|
||||
- clocks : a clock to provide the tick rate for "andestech,atcpit100"
|
||||
- clock-names : should be "PCLK" for the peripheral clock source.
|
||||
|
||||
Examples:
|
||||
|
||||
timer0: timer@f0400000 {
|
||||
compatible = "andestech,atcpit100";
|
||||
reg = <0xf0400000 0x1000>;
|
||||
interrupts = <2>;
|
||||
clocks = <&apb>;
|
||||
clock-names = "PCLK";
|
||||
};
|
||||
|
|
@ -104,6 +104,7 @@ eeti eGalax_eMPIA Technology Inc
|
|||
elan Elan Microelectronic Corp.
|
||||
embest Shenzhen Embest Technology Co., Ltd.
|
||||
emmicro EM Microelectronic
|
||||
emtrion emtrion GmbH
|
||||
energymicro Silicon Laboratories (formerly Energy Micro AS)
|
||||
engicam Engicam S.r.l.
|
||||
epcos EPCOS AG
|
||||
|
|
|
|||
|
|
@ -7,17 +7,36 @@ Many of the "generic" devices like HPET or IO APIC have the ce4100
|
|||
name in their compatible property because they first appeared in this
|
||||
SoC.
|
||||
|
||||
The CPU node
|
||||
------------
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "intel,ce4100";
|
||||
reg = <0>;
|
||||
lapic = <&lapic0>;
|
||||
The CPU nodes
|
||||
-------------
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "intel,ce4100";
|
||||
reg = <0x00>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "intel,ce4100";
|
||||
reg = <0x02>;
|
||||
};
|
||||
};
|
||||
|
||||
The reg property describes the CPU number. The lapic property points to
|
||||
the local APIC timer.
|
||||
A "cpu" node describes one logical processor (hardware thread).
|
||||
|
||||
Required properties:
|
||||
|
||||
- device_type
|
||||
Device type, must be "cpu".
|
||||
|
||||
- reg
|
||||
Local APIC ID, the unique number assigned to each processor by
|
||||
system hardware.
|
||||
|
||||
The SoC node
|
||||
------------
|
||||
|
|
|
|||
|
|
@ -87,8 +87,8 @@ Overlay in-kernel API
|
|||
|
||||
The API is quite easy to use.
|
||||
|
||||
1. Call of_overlay_apply() to create and apply an overlay changeset. The return
|
||||
value is an error or a cookie identifying this overlay.
|
||||
1. Call of_overlay_fdt_apply() to create and apply an overlay changeset. The
|
||||
return value is an error or a cookie identifying this overlay.
|
||||
|
||||
2. Call of_overlay_remove() to remove and cleanup the overlay changeset
|
||||
previously created via the call to of_overlay_apply(). Removal of an overlay
|
||||
|
|
|
|||
|
|
@ -718,6 +718,3 @@ http://www.maximintegrated.com/app-notes/index.mvp/id/1822
|
|||
|
||||
Texas Instruments USB Configuration Wiki Page:
|
||||
http://processors.wiki.ti.com/index.php/Usbgeneralpage
|
||||
|
||||
Analog Devices Blackfin MUSB Configuration:
|
||||
http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:drivers:musb
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | ok |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | ok |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | ok |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | ok |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | ok |
|
||||
| c6x: | ok |
|
||||
| cris: | TODO |
|
||||
| frv: | ok |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | ok |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | ok |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | ok |
|
||||
| nios2: | ok |
|
||||
| openrisc: | ok |
|
||||
| parisc: | ok |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok | 64-bit only
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | ok |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | ok |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | ok |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | ok |
|
||||
| nios2: | ok |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | ok |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | TODO |
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ for F in */*/arch-support.txt; do
|
|||
N=$(grep -h "^# Feature name:" $F | cut -c25-)
|
||||
C=$(grep -h "^# Kconfig:" $F | cut -c25-)
|
||||
D=$(grep -h "^# description:" $F | cut -c25-)
|
||||
S=$(grep -hw $ARCH $F | cut -d\| -f3)
|
||||
S=$(grep -hv "^#" $F | grep -w $ARCH | cut -d\| -f3)
|
||||
|
||||
printf "%10s/%-22s:%s| %35s # %s\n" "$SUBSYS" "$N" "$S" "$C" "$D"
|
||||
done
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | ok |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | ok |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | ok |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | ok |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | ok |
|
||||
| unicore32: | ok |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | ok |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | TODO |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -33,28 +33,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | .. |
|
||||
| arm: | .. |
|
||||
| arm64: | .. |
|
||||
| blackfin: | .. |
|
||||
| c6x: | .. |
|
||||
| cris: | .. |
|
||||
| frv: | .. |
|
||||
| h8300: | .. |
|
||||
| hexagon: | .. |
|
||||
| ia64: | TODO |
|
||||
| m32r: | .. |
|
||||
| m68k: | .. |
|
||||
| metag: | .. |
|
||||
| microblaze: | .. |
|
||||
| mips: | TODO |
|
||||
| mn10300: | .. |
|
||||
| nios2: | .. |
|
||||
| openrisc: | .. |
|
||||
| parisc: | .. |
|
||||
| powerpc: | ok |
|
||||
| s390: | .. |
|
||||
| score: | .. |
|
||||
| sh: | .. |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | .. |
|
||||
| unicore32: | .. |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | ok |
|
||||
| um: | ok |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | TODO |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | ok |
|
||||
| c6x: | ok |
|
||||
| cris: | ok |
|
||||
| frv: | TODO |
|
||||
| h8300: | ok |
|
||||
| hexagon: | ok |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | ok |
|
||||
| metag: | ok |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | ok |
|
||||
| nios2: | ok |
|
||||
| openrisc: | ok |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | ok |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | ok |
|
||||
| unicore32: | ok |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | .. |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | .. |
|
||||
| powerpc: | .. |
|
||||
| s390: | .. |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | .. |
|
||||
| tile: | .. |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | TODO |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | ok |
|
||||
| cris: | TODO |
|
||||
| frv: | ok |
|
||||
| h8300: | ok |
|
||||
| hexagon: | ok |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | ok |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | ok |
|
||||
| nios2: | ok |
|
||||
| openrisc: | ok |
|
||||
| parisc: | ok |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | ok |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | ok |
|
||||
| unicore32: | ok |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | ok |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | ok |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | .. |
|
||||
| c6x: | .. |
|
||||
| cris: | .. |
|
||||
| frv: | .. |
|
||||
| h8300: | .. |
|
||||
| hexagon: | .. |
|
||||
| ia64: | TODO |
|
||||
| m32r: | .. |
|
||||
| m68k: | .. |
|
||||
| metag: | TODO |
|
||||
| microblaze: | .. |
|
||||
| mips: | ok |
|
||||
| mn10300: | .. |
|
||||
| nios2: | .. |
|
||||
| openrisc: | .. |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | .. |
|
||||
| sh: | .. |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | .. |
|
||||
| unicore32: | .. |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | .. |
|
||||
| cris: | .. |
|
||||
| frv: | .. |
|
||||
| h8300: | .. |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | .. |
|
||||
| metag: | TODO |
|
||||
| microblaze: | .. |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | .. |
|
||||
| openrisc: | .. |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | .. |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | .. |
|
||||
| unicore32: | .. |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | TODO |
|
||||
| arm: | TODO |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | TODO |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | TODO |
|
||||
| sparc: | TODO |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | TODO |
|
||||
| arm64: | TODO |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | TODO |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | TODO |
|
||||
| tile: | ok |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | .. |
|
||||
| arm: | .. |
|
||||
| arm64: | .. |
|
||||
| blackfin: | .. |
|
||||
| c6x: | .. |
|
||||
| cris: | .. |
|
||||
| frv: | .. |
|
||||
| h8300: | .. |
|
||||
| hexagon: | .. |
|
||||
| ia64: | ok |
|
||||
| m32r: | TODO |
|
||||
| m68k: | .. |
|
||||
| metag: | ok |
|
||||
| microblaze: | ok |
|
||||
| mips: | ok |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | .. |
|
||||
| openrisc: | .. |
|
||||
| parisc: | .. |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | ok |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | .. |
|
||||
| unicore32: | .. |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -10,28 +10,20 @@
|
|||
| arc: | ok |
|
||||
| arm: | ok |
|
||||
| arm64: | ok |
|
||||
| blackfin: | TODO |
|
||||
| c6x: | TODO |
|
||||
| cris: | TODO |
|
||||
| frv: | TODO |
|
||||
| h8300: | TODO |
|
||||
| hexagon: | TODO |
|
||||
| ia64: | TODO |
|
||||
| m32r: | TODO |
|
||||
| m68k: | TODO |
|
||||
| metag: | TODO |
|
||||
| microblaze: | TODO |
|
||||
| mips: | TODO |
|
||||
| mn10300: | TODO |
|
||||
| nios2: | TODO |
|
||||
| openrisc: | TODO |
|
||||
| parisc: | TODO |
|
||||
| powerpc: | ok |
|
||||
| s390: | ok |
|
||||
| score: | TODO |
|
||||
| sh: | ok |
|
||||
| sparc: | ok |
|
||||
| tile: | TODO |
|
||||
| um: | TODO |
|
||||
| unicore32: | TODO |
|
||||
| x86: | ok |
|
||||
|
|
|
|||
|
|
@ -1,51 +0,0 @@
|
|||
================================
|
||||
Fujitsu FR-V LINUX DOCUMENTATION
|
||||
================================
|
||||
|
||||
This directory contains documentation for the Fujitsu FR-V CPU architecture
|
||||
port of Linux.
|
||||
|
||||
The following documents are available:
|
||||
|
||||
(*) features.txt
|
||||
|
||||
A description of the basic features inherent in this architecture port.
|
||||
|
||||
|
||||
(*) configuring.txt
|
||||
|
||||
A summary of the configuration options particular to this architecture.
|
||||
|
||||
|
||||
(*) booting.txt
|
||||
|
||||
A description of how to boot the kernel image and a summary of the kernel
|
||||
command line options.
|
||||
|
||||
|
||||
(*) gdbstub.txt
|
||||
|
||||
A description of how to debug the kernel using GDB attached by serial
|
||||
port, and a summary of the services available.
|
||||
|
||||
|
||||
(*) mmu-layout.txt
|
||||
|
||||
A description of the virtual and physical memory layout used in the
|
||||
MMU linux kernel, and the registers used to support it.
|
||||
|
||||
|
||||
(*) gdbinit
|
||||
|
||||
An example .gdbinit file for use with GDB. It includes macros for viewing
|
||||
MMU state on the FR451. See mmu-layout.txt for more information.
|
||||
|
||||
|
||||
(*) clock.txt
|
||||
|
||||
A description of the CPU clock scaling interface.
|
||||
|
||||
|
||||
(*) atomic-ops.txt
|
||||
|
||||
A description of how the FR-V kernel's atomic operations work.
|
||||
|
|
@ -1,134 +0,0 @@
|
|||
=====================================
|
||||
FUJITSU FR-V KERNEL ATOMIC OPERATIONS
|
||||
=====================================
|
||||
|
||||
On the FR-V CPUs, there is only one atomic Read-Modify-Write operation: the SWAP/SWAPI
|
||||
instruction. Unfortunately, this alone can't be used to implement the following operations:
|
||||
|
||||
(*) Atomic add to memory
|
||||
|
||||
(*) Atomic subtract from memory
|
||||
|
||||
(*) Atomic bit modification (set, clear or invert)
|
||||
|
||||
(*) Atomic compare and exchange
|
||||
|
||||
On such CPUs, the standard way of emulating such operations in uniprocessor mode is to disable
|
||||
interrupts, but on the FR-V CPUs, modifying the PSR takes a lot of clock cycles, and it has to be
|
||||
done twice. This means the CPU runs for a relatively long time with interrupts disabled,
|
||||
potentially having a great effect on interrupt latency.
|
||||
|
||||
|
||||
=============
|
||||
NEW ALGORITHM
|
||||
=============
|
||||
|
||||
To get around this, the following algorithm has been implemented. It operates in a way similar to
|
||||
the LL/SC instruction pairs supported on a number of platforms.
|
||||
|
||||
(*) The CCCR.CC3 register is reserved within the kernel to act as an atomic modify abort flag.
|
||||
|
||||
(*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set to 0 (Undefined
|
||||
state).
|
||||
|
||||
(*) All atomic operations can then be broken down into the following algorithm:
|
||||
|
||||
(1) Set ICC3.Z to true and set CC3 to True (ORCC/CKEQ/ORCR).
|
||||
|
||||
(2) Load the value currently in the memory to be modified into a register.
|
||||
|
||||
(3) Make changes to the value.
|
||||
|
||||
(4) If CC3 is still True, simultaneously and atomically (by VLIW packing):
|
||||
|
||||
(a) Store the modified value back to memory.
|
||||
|
||||
(b) Set ICC3.Z to false (CORCC on GR29 is sufficient for this - GR29 holds the current
|
||||
task pointer in the kernel, and so is guaranteed to be non-zero).
|
||||
|
||||
(5) If ICC3.Z is still true, go back to step (1).
|
||||
|
||||
This works in a non-SMP environment because any interrupt or other exception that happens between
|
||||
steps (1) and (4) will set CC3 to the Undefined, thus aborting the store in (4a), and causing the
|
||||
condition in ICC3 to remain with the Z flag set, thus causing step (5) to loop back to step (1).
|
||||
|
||||
|
||||
This algorithm suffers from two problems:
|
||||
|
||||
(1) The condition CCCR.CC3 is cleared unconditionally by an exception, irrespective of whether or
|
||||
not any changes were made to the target memory location during that exception.
|
||||
|
||||
(2) The branch from step (5) back to step (1) may have to happen more than once until the store
|
||||
manages to take place. In theory, this loop could cycle forever because there are too many
|
||||
interrupts coming in, but it's unlikely.
|
||||
|
||||
|
||||
=======
|
||||
EXAMPLE
|
||||
=======
|
||||
|
||||
Taking an example from include/asm-frv/atomic.h:
|
||||
|
||||
static inline int atomic_add_return(int i, atomic_t *v)
|
||||
{
|
||||
unsigned long val;
|
||||
|
||||
asm("0: \n"
|
||||
|
||||
It starts by setting ICC3.Z to true for later use, and also transforming that into CC3 being in the
|
||||
True state.
|
||||
|
||||
" orcc gr0,gr0,gr0,icc3 \n" <-- (1)
|
||||
" ckeq icc3,cc7 \n" <-- (1)
|
||||
|
||||
Then it does the load. Note that the final phase of step (1) is done at the same time as the
|
||||
load. The VLIW packing ensures they are done simultaneously. The ".p" on the load must not be
|
||||
removed without swapping the order of these two instructions.
|
||||
|
||||
" ld.p %M0,%1 \n" <-- (2)
|
||||
" orcr cc7,cc7,cc3 \n" <-- (1)
|
||||
|
||||
Then the proposed modification is generated. Note that the old value can be retained if required
|
||||
(such as in test_and_set_bit()).
|
||||
|
||||
" add%I2 %1,%2,%1 \n" <-- (3)
|
||||
|
||||
Then it attempts to store the value back, contingent on no exception having cleared CC3 since it
|
||||
was set to True.
|
||||
|
||||
" cst.p %1,%M0 ,cc3,#1 \n" <-- (4a)
|
||||
|
||||
It simultaneously records the success or failure of the store in ICC3.Z.
|
||||
|
||||
" corcc gr29,gr29,gr0 ,cc3,#1 \n" <-- (4b)
|
||||
|
||||
Such that the branch can then be taken if the operation was aborted.
|
||||
|
||||
" beq icc3,#0,0b \n" <-- (5)
|
||||
: "+U"(v->counter), "=&r"(val)
|
||||
: "NPr"(i)
|
||||
: "memory", "cc7", "cc3", "icc3"
|
||||
);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
=============
|
||||
CONFIGURATION
|
||||
=============
|
||||
|
||||
The atomic ops implementation can be made inline or out-of-line by changing the
|
||||
CONFIG_FRV_OUTOFLINE_ATOMIC_OPS configuration variable. Making it out-of-line has a number of
|
||||
advantages:
|
||||
|
||||
- The resulting kernel image may be smaller
|
||||
- Debugging is easier as atomic ops can just be stepped over and they can be breakpointed
|
||||
|
||||
Keeping it inline also has a number of advantages:
|
||||
|
||||
- The resulting kernel may be Faster
|
||||
- no out-of-line function calls need to be made
|
||||
- the compiler doesn't have half its registers clobbered by making a call
|
||||
|
||||
The out-of-line implementations live in arch/frv/lib/atomic-ops.S.
|
||||
|
|
@ -1,182 +0,0 @@
|
|||
=========================
|
||||
BOOTING FR-V LINUX KERNEL
|
||||
=========================
|
||||
|
||||
======================
|
||||
PROVIDING A FILESYSTEM
|
||||
======================
|
||||
|
||||
First of all, a root filesystem must be made available. This can be done in
|
||||
one of two ways:
|
||||
|
||||
(1) NFS Export
|
||||
|
||||
A filesystem should be constructed in a directory on an NFS server that
|
||||
the target board can reach. This directory should then be NFS exported
|
||||
such that the target board can read and write into it as root.
|
||||
|
||||
(2) Flash Filesystem (JFFS2 Recommended)
|
||||
|
||||
In this case, the image must be stored or built up on flash before it
|
||||
can be used. A complete image can be built using the mkfs.jffs2 or
|
||||
similar program and then downloaded and stored into flash by RedBoot.
|
||||
|
||||
|
||||
========================
|
||||
LOADING THE KERNEL IMAGE
|
||||
========================
|
||||
|
||||
The kernel will need to be loaded into RAM by RedBoot (or by some alternative
|
||||
boot loader) before it can be run. The kernel image (arch/frv/boot/Image) may
|
||||
be loaded in one of three ways:
|
||||
|
||||
(1) Load from Flash
|
||||
|
||||
This is the simplest. RedBoot can store an image in the flash (see the
|
||||
RedBoot documentation) and then load it back into RAM. RedBoot keeps
|
||||
track of the load address, entry point and size, so the command to do
|
||||
this is simply:
|
||||
|
||||
fis load linux
|
||||
|
||||
The image is then ready to be executed.
|
||||
|
||||
(2) Load by TFTP
|
||||
|
||||
The following command will download a raw binary kernel image from the
|
||||
default server (as negotiated by BOOTP) and store it into RAM:
|
||||
|
||||
load -b 0x00100000 -r /tftpboot/image.bin
|
||||
|
||||
The image is then ready to be executed.
|
||||
|
||||
(3) Load by Y-Modem
|
||||
|
||||
The following command will download a raw binary kernel image across the
|
||||
serial port that RedBoot is currently using:
|
||||
|
||||
load -m ymodem -b 0x00100000 -r zImage
|
||||
|
||||
The serial client (such as minicom) must then be told to transmit the
|
||||
program by Y-Modem.
|
||||
|
||||
When finished, the image will then be ready to be executed.
|
||||
|
||||
|
||||
==================
|
||||
BOOTING THE KERNEL
|
||||
==================
|
||||
|
||||
Boot the image with the following RedBoot command:
|
||||
|
||||
exec -c "<CMDLINE>" 0x00100000
|
||||
|
||||
For example:
|
||||
|
||||
exec -c "console=ttySM0,115200 ip=:::::dhcp root=/dev/mtdblock2 rw"
|
||||
|
||||
This will start the kernel running. Note that if the GDB-stub is compiled in,
|
||||
then the kernel will immediately wait for GDB to connect over serial before
|
||||
doing anything else. See the section on kernel debugging with GDB.
|
||||
|
||||
The kernel command line <CMDLINE> tells the kernel where its console is and
|
||||
how to find its root filesystem. This is made up of the following components,
|
||||
separated by spaces:
|
||||
|
||||
(*) console=ttyS<x>[,<baud>[<parity>[<bits>[<flow>]]]]
|
||||
|
||||
This specifies that the system console should output through on-chip
|
||||
serial port <x> (which can be "0" or "1").
|
||||
|
||||
<baud> is a standard baud rate between 1200 and 115200 (default 9600).
|
||||
|
||||
<parity> is a parity setting of "N", "O", "E", "M" or "S" for None, Odd,
|
||||
Even, Mark or Space. "None" is the default.
|
||||
|
||||
<stop> is "7" or "8" for the number of bits per character. "8" is the
|
||||
default.
|
||||
|
||||
<flow> is "r" to use flow control (XCTS on serial port 2 only). The
|
||||
default is to not use flow control.
|
||||
|
||||
For example:
|
||||
|
||||
console=ttyS0,115200
|
||||
|
||||
To use the first on-chip serial port at baud rate 115200, no parity, 8
|
||||
bits, and no flow control.
|
||||
|
||||
(*) root=<xxxx>
|
||||
|
||||
This specifies the device upon which the root filesystem resides. It
|
||||
may be specified by major and minor number, device path, or even
|
||||
partition uuid, if supported. For example:
|
||||
|
||||
/dev/nfs NFS root filesystem
|
||||
/dev/mtdblock3 Fourth RedBoot partition on the System Flash
|
||||
PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF/PARTNROFF=1
|
||||
first partition after the partition with the given UUID
|
||||
253:0 Device with major 253 and minor 0
|
||||
|
||||
Authoritative information can be found in
|
||||
"Documentation/admin-guide/kernel-parameters.rst".
|
||||
|
||||
(*) rw
|
||||
|
||||
Start with the root filesystem mounted Read/Write.
|
||||
|
||||
The remaining components are all optional:
|
||||
|
||||
(*) ip=<ip>::::<host>:<iface>:<cfg>
|
||||
|
||||
Configure the network interface. If <cfg> is "off" then <ip> should
|
||||
specify the IP address for the network device <iface>. <host> provide
|
||||
the hostname for the device.
|
||||
|
||||
If <cfg> is "bootp" or "dhcp", then all of these parameters will be
|
||||
discovered by consulting a BOOTP or DHCP server.
|
||||
|
||||
For example, the following might be used:
|
||||
|
||||
ip=192.168.73.12::::frv:eth0:off
|
||||
|
||||
This sets the IP address on the VDK motherboard RTL8029 ethernet chipset
|
||||
(eth0) to be 192.168.73.12, and sets the board's hostname to be "frv".
|
||||
|
||||
(*) nfsroot=<server>:<dir>[,v<vers>]
|
||||
|
||||
This is mandatory if "root=/dev/nfs" is given as an option. It tells the
|
||||
kernel the IP address of the NFS server providing its root filesystem,
|
||||
and the pathname on that server of the filesystem.
|
||||
|
||||
The NFS version to use can also be specified. v2 and v3 are supported by
|
||||
Linux.
|
||||
|
||||
For example:
|
||||
|
||||
nfsroot=192.168.73.1:/nfsroot-frv
|
||||
|
||||
(*) profile=1
|
||||
|
||||
Turns on the kernel profiler (accessible through /proc/profile).
|
||||
|
||||
(*) console=gdb0
|
||||
|
||||
This can be used as an alternative to the "console=ttyS..." listed
|
||||
above. I tells the kernel to pass the console output to GDB if the
|
||||
gdbstub is compiled in to the kernel.
|
||||
|
||||
If this is used, then the gdbstub passes the text to GDB, which then
|
||||
simply dumps it to its standard output.
|
||||
|
||||
(*) mem=<xxx>M
|
||||
|
||||
Normally the kernel will work out how much SDRAM it has by reading the
|
||||
SDRAM controller registers. That can be overridden with this
|
||||
option. This allows the kernel to be told that it has <xxx> megabytes of
|
||||
memory available.
|
||||
|
||||
(*) init=<prog> [<arg> [<arg> [<arg> ...]]]
|
||||
|
||||
This tells the kernel what program to run initially. By default this is
|
||||
/sbin/init, but /sbin/sash or /bin/sh are common alternatives.
|
||||
|
|
@ -1,65 +0,0 @@
|
|||
Clock scaling
|
||||
-------------
|
||||
|
||||
The kernel supports scaling of CLCK.CMODE, CLCK.CM and CLKC.P0 clock
|
||||
registers. If built with CONFIG_PM and CONFIG_SYSCTL options enabled, four
|
||||
extra files will appear in the directory /proc/sys/pm/. Reading these files
|
||||
will show:
|
||||
|
||||
p0 -- current value of the P0 bit in CLKC register.
|
||||
cm -- current value of the CM bits in CLKC register.
|
||||
cmode -- current value of the CMODE bits in CLKC register.
|
||||
|
||||
On all boards, the 'p0' file should also be writable, and either '1' or '0'
|
||||
can be rewritten, to set or clear the CLKC_P0 bit respectively, hence
|
||||
controlling whether the resource bus rate clock is halved.
|
||||
|
||||
The 'cm' file should also be available on all boards. '0' can be written to it
|
||||
to shift the board into High-Speed mode (normal), and '1' can be written to
|
||||
shift the board into Medium-Speed mode. Selecting Low-Speed mode is not
|
||||
supported by this interface, even though some CPUs do support it.
|
||||
|
||||
On the boards with FR405 CPU (i.e. CB60 and CB70), the 'cmode' file is also
|
||||
writable, allowing the CPU core speed (and other clock speeds) to be
|
||||
controlled from userspace.
|
||||
|
||||
|
||||
Determining current and possible settings
|
||||
-----------------------------------------
|
||||
|
||||
The current state and the available masks can be found in /proc/cpuinfo. For
|
||||
example, on the CB70:
|
||||
|
||||
# cat /proc/cpuinfo
|
||||
CPU-Series: fr400
|
||||
CPU-Core: fr405, gr0-31, BE, CCCR
|
||||
CPU: mb93405
|
||||
MMU: Prot
|
||||
FP-Media: fr0-31, Media
|
||||
System: mb93091-cb70, mb93090-mb00
|
||||
PM-Controls: cmode=0xd31f, cm=0x3, p0=0x3, suspend=0x9
|
||||
PM-Status: cmode=3, cm=0, p0=0
|
||||
Clock-In: 50.00 MHz
|
||||
Clock-Core: 300.00 MHz
|
||||
Clock-SDRAM: 100.00 MHz
|
||||
Clock-CBus: 100.00 MHz
|
||||
Clock-Res: 50.00 MHz
|
||||
Clock-Ext: 50.00 MHz
|
||||
Clock-DSU: 25.00 MHz
|
||||
BogoMips: 300.00
|
||||
|
||||
And on the PDK, the PM lines look like the following:
|
||||
|
||||
PM-Controls: cm=0x3, p0=0x3, suspend=0x9
|
||||
PM-Status: cmode=9, cm=0, p0=0
|
||||
|
||||
The PM-Controls line, if present, will indicate which /proc/sys/pm files can
|
||||
be set to what values. The specification values are bitmasks; so, for example,
|
||||
"suspend=0x9" indicates that 0 and 3 can be written validly to
|
||||
/proc/sys/pm/suspend.
|
||||
|
||||
The PM-Controls line will only be present if CONFIG_PM is configured to Y.
|
||||
|
||||
The PM-Status line indicates which clock controls are set to which value. If
|
||||
the file can be read, then the suspend value must be 0, and so that's not
|
||||
included.
|
||||
|
|
@ -1,125 +0,0 @@
|
|||
=======================================
|
||||
FUJITSU FR-V LINUX KERNEL CONFIGURATION
|
||||
=======================================
|
||||
|
||||
=====================
|
||||
CONFIGURATION OPTIONS
|
||||
=====================
|
||||
|
||||
The most important setting is in the "MMU support options" tab (the first
|
||||
presented in the configuration tools available):
|
||||
|
||||
(*) "Kernel Type"
|
||||
|
||||
This options allows selection of normal, MMU-requiring linux, and uClinux
|
||||
(which doesn't require an MMU and doesn't have inter-process protection).
|
||||
|
||||
There are a number of settings in the "Processor type and features" section of
|
||||
the kernel configuration that need to be considered.
|
||||
|
||||
(*) "CPU"
|
||||
|
||||
The register and instruction sets at the core of the processor. This can
|
||||
only be set to "FR40x/45x/55x" at the moment - but this permits usage of
|
||||
the kernel with MB93091 CB10, CB11, CB30, CB41, CB60, CB70 and CB451
|
||||
CPU boards, and with the MB93093 PDK board.
|
||||
|
||||
(*) "System"
|
||||
|
||||
This option allows a choice of basic system. This governs the peripherals
|
||||
that are expected to be available.
|
||||
|
||||
(*) "Motherboard"
|
||||
|
||||
This specifies the type of motherboard being used, and the peripherals
|
||||
upon it. Currently only "MB93090-MB00" can be set here.
|
||||
|
||||
(*) "Default cache-write mode"
|
||||
|
||||
This controls the initial data cache write management mode. By default
|
||||
Write-Through is selected, but Write-Back (Copy-Back) can also be
|
||||
selected. This can be changed dynamically once the kernel is running (see
|
||||
features.txt).
|
||||
|
||||
There are some architecture specific configuration options in the "General
|
||||
Setup" section of the kernel configuration too:
|
||||
|
||||
(*) "Reserve memory uncached for (PCI) DMA"
|
||||
|
||||
This requests that a uClinux kernel set aside some memory in an uncached
|
||||
window for the use as consistent DMA memory (mainly for PCI). At least a
|
||||
megabyte will be allocated in this way, possibly more. Any memory so
|
||||
reserved will not be available for normal allocations.
|
||||
|
||||
(*) "Kernel support for ELF-FDPIC binaries"
|
||||
|
||||
This enables the binary-format driver for the new FDPIC ELF binaries that
|
||||
this platform normally uses. These binaries are totally relocatable -
|
||||
their separate sections can relocated independently, allowing them to be
|
||||
shared on uClinux where possible. This should normally be enabled.
|
||||
|
||||
(*) "Kernel image protection"
|
||||
|
||||
This makes the protection register governing access to the core kernel
|
||||
image prohibit access by userspace programs. This option is available on
|
||||
uClinux only.
|
||||
|
||||
There are also a number of settings in the "Kernel Hacking" section of the
|
||||
kernel configuration especially for debugging a kernel on this
|
||||
architecture. See the "gdbstub.txt" file for information about those.
|
||||
|
||||
|
||||
======================
|
||||
DEFAULT CONFIGURATIONS
|
||||
======================
|
||||
|
||||
The kernel sources include a number of example default configurations:
|
||||
|
||||
(*) defconfig-mb93091
|
||||
|
||||
Default configuration for the MB93091-VDK with both CPU board and
|
||||
MB93090-MB00 motherboard running uClinux.
|
||||
|
||||
|
||||
(*) defconfig-mb93091-fb
|
||||
|
||||
Default configuration for the MB93091-VDK with CPU board,
|
||||
MB93090-MB00 motherboard, and DAV board running uClinux.
|
||||
Includes framebuffer driver.
|
||||
|
||||
|
||||
(*) defconfig-mb93093
|
||||
|
||||
Default configuration for the MB93093-PDK board running uClinux.
|
||||
|
||||
|
||||
(*) defconfig-cb70-standalone
|
||||
|
||||
Default configuration for the MB93091-VDK with only CB70 CPU board
|
||||
running uClinux. This will use the CB70's DM9000 for network access.
|
||||
|
||||
|
||||
(*) defconfig-mmu
|
||||
|
||||
Default configuration for the MB93091-VDK with both CB451 CPU board and
|
||||
MB93090-MB00 motherboard running MMU linux.
|
||||
|
||||
(*) defconfig-mmu-audio
|
||||
|
||||
Default configuration for the MB93091-VDK with CB451 CPU board, DAV
|
||||
board, and MB93090-MB00 motherboard running MMU linux. Includes
|
||||
audio driver.
|
||||
|
||||
(*) defconfig-mmu-fb
|
||||
|
||||
Default configuration for the MB93091-VDK with CB451 CPU board, DAV
|
||||
board, and MB93090-MB00 motherboard running MMU linux. Includes
|
||||
framebuffer driver.
|
||||
|
||||
(*) defconfig-mmu-standalone
|
||||
|
||||
Default configuration for the MB93091-VDK with only CB451 CPU board
|
||||
running MMU linux.
|
||||
|
||||
|
||||
|
||||
|
|
@ -1,310 +0,0 @@
|
|||
===========================
|
||||
FUJITSU FR-V LINUX FEATURES
|
||||
===========================
|
||||
|
||||
This kernel port has a number of features of which the user should be aware:
|
||||
|
||||
(*) Linux and uClinux
|
||||
|
||||
The FR-V architecture port supports both normal MMU linux and uClinux out
|
||||
of the same sources.
|
||||
|
||||
|
||||
(*) CPU support
|
||||
|
||||
Support for the FR401, FR403, FR405, FR451 and FR555 CPUs should work with
|
||||
the same uClinux kernel configuration.
|
||||
|
||||
In normal (MMU) Linux mode, only the FR451 CPU will work as that is the
|
||||
only one with a suitably featured CPU.
|
||||
|
||||
The kernel is written and compiled with the assumption that only the
|
||||
bottom 32 GR registers and no FR registers will be used by the kernel
|
||||
itself, however all extra userspace registers will be saved on context
|
||||
switch. Note that since most CPUs can't support lazy switching, no attempt
|
||||
is made to do lazy register saving where that would be possible (FR555
|
||||
only currently).
|
||||
|
||||
|
||||
(*) Board support
|
||||
|
||||
The board on which the kernel will run can be configured on the "Processor
|
||||
type and features" configuration tab.
|
||||
|
||||
Set the System to "MB93093-PDK" to boot from the MB93093 (FR403) PDK.
|
||||
|
||||
Set the System to "MB93091-VDK" to boot from the CB11, CB30, CB41, CB60,
|
||||
CB70 or CB451 VDK boards. Set the Motherboard setting to "MB93090-MB00" to
|
||||
boot with the standard ATA90590B VDK motherboard, and set it to "None" to
|
||||
boot without any motherboard.
|
||||
|
||||
|
||||
(*) Binary Formats
|
||||
|
||||
The only userspace binary format supported is FDPIC ELF. Normal ELF, FLAT
|
||||
and AOUT binaries are not supported for this architecture.
|
||||
|
||||
FDPIC ELF supports shared library and program interpreter facilities.
|
||||
|
||||
|
||||
(*) Scheduler Speed
|
||||
|
||||
The kernel scheduler runs at 100Hz irrespective of the clock speed on this
|
||||
architecture. This value is set in asm/param.h (see the HZ macro defined
|
||||
there).
|
||||
|
||||
|
||||
(*) Normal (MMU) Linux Memory Layout.
|
||||
|
||||
See mmu-layout.txt in this directory for a description of the normal linux
|
||||
memory layout
|
||||
|
||||
See include/asm-frv/mem-layout.h for constants pertaining to the memory
|
||||
layout.
|
||||
|
||||
See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
|
||||
controller configuration.
|
||||
|
||||
|
||||
(*) uClinux Memory Layout
|
||||
|
||||
The memory layout used by the uClinux kernel is as follows:
|
||||
|
||||
0x00000000 - 0x00000FFF Null pointer catch page
|
||||
0x20000000 - 0x200FFFFF CS2# [PDK] FPGA
|
||||
0xC0000000 - 0xCFFFFFFF SDRAM
|
||||
0xC0000000 Base of Linux kernel image
|
||||
0xE0000000 - 0xEFFFFFFF CS2# [VDK] SLBUS/PCI window
|
||||
0xF0000000 - 0xF0FFFFFF CS5# MB93493 CSC area (DAV daughter board)
|
||||
0xF1000000 - 0xF1FFFFFF CS7# [CB70/CB451] CPU-card PCMCIA port space
|
||||
0xFC000000 - 0xFC0FFFFF CS1# [VDK] MB86943 config space
|
||||
0xFC100000 - 0xFC1FFFFF CS6# [CB70/CB451] CPU-card DM9000 NIC space
|
||||
0xFC100000 - 0xFC1FFFFF CS6# [PDK] AX88796 NIC space
|
||||
0xFC200000 - 0xFC2FFFFF CS3# MB93493 CSR area (DAV daughter board)
|
||||
0xFD000000 - 0xFDFFFFFF CS4# [CB70/CB451] CPU-card extra flash space
|
||||
0xFE000000 - 0xFEFFFFFF Internal CPU peripherals
|
||||
0xFF000000 - 0xFF1FFFFF CS0# Flash 1
|
||||
0xFF200000 - 0xFF3FFFFF CS0# Flash 2
|
||||
0xFFC00000 - 0xFFC0001F CS0# [VDK] FPGA
|
||||
|
||||
The kernel reads the size of the SDRAM from the memory bus controller
|
||||
registers by default.
|
||||
|
||||
The kernel initialisation code (1) adjusts the SDRAM base addresses to
|
||||
move the SDRAM to desired address, (2) moves the kernel image down to the
|
||||
bottom of SDRAM, (3) adjusts the bus controller registers to move I/O
|
||||
windows, and (4) rearranges the protection registers to protect all of
|
||||
this.
|
||||
|
||||
The reasons for doing this are: (1) the page at address 0 should be
|
||||
inaccessible so that NULL pointer errors can be caught; and (2) the bottom
|
||||
three quarters are left unoccupied so that an FR-V CPU with an MMU can use
|
||||
it for virtual userspace mappings.
|
||||
|
||||
See include/asm-frv/mem-layout.h for constants pertaining to the memory
|
||||
layout.
|
||||
|
||||
See include/asm-frv/mb-regs.h for the constants pertaining to the I/O bus
|
||||
controller configuration.
|
||||
|
||||
|
||||
(*) uClinux Memory Protection
|
||||
|
||||
A DAMPR register is used to cover the entire region used for I/O
|
||||
(0xE0000000 - 0xFFFFFFFF). This permits the kernel to make uncached
|
||||
accesses to this region. Userspace is not permitted to access it.
|
||||
|
||||
The DAMPR/IAMPR protection registers not in use for any other purpose are
|
||||
tiled over the top of the SDRAM such that:
|
||||
|
||||
(1) The core kernel image is covered by as small a tile as possible
|
||||
granting only the kernel access to the underlying data, whilst
|
||||
making sure no SDRAM is actually made unavailable by this approach.
|
||||
|
||||
(2) All other tiles are arranged to permit userspace access to the rest
|
||||
of the SDRAM.
|
||||
|
||||
Barring point (1), there is nothing to protect kernel data against
|
||||
userspace damage - but this is uClinux.
|
||||
|
||||
|
||||
(*) Exceptions and Fixups
|
||||
|
||||
Since the FR40x and FR55x CPUs that do not have full MMUs generate
|
||||
imprecise data error exceptions, there are currently no automatic fixup
|
||||
services available in uClinux. This includes misaligned memory access
|
||||
fixups.
|
||||
|
||||
Userspace EFAULT errors can be trapped by issuing a MEMBAR instruction and
|
||||
forcing the fault to happen there.
|
||||
|
||||
On the FR451, however, data exceptions are mostly precise, and so
|
||||
exception fixup handling is implemented as normal.
|
||||
|
||||
|
||||
(*) Userspace Breakpoints
|
||||
|
||||
The ptrace() system call supports the following userspace debugging
|
||||
features:
|
||||
|
||||
(1) Hardware assisted single step.
|
||||
|
||||
(2) Breakpoint via the FR-V "BREAK" instruction.
|
||||
|
||||
(3) Breakpoint via the FR-V "TIRA GR0, #1" instruction.
|
||||
|
||||
(4) Syscall entry/exit trap.
|
||||
|
||||
Each of the above generates a SIGTRAP.
|
||||
|
||||
|
||||
(*) On-Chip Serial Ports
|
||||
|
||||
The FR-V on-chip serial ports are made available as ttyS0 and ttyS1. Note
|
||||
that if the GDB stub is compiled in, ttyS1 will not actually be available
|
||||
as it will be being used for the GDB stub.
|
||||
|
||||
These ports can be made by:
|
||||
|
||||
mknod /dev/ttyS0 c 4 64
|
||||
mknod /dev/ttyS1 c 4 65
|
||||
|
||||
|
||||
(*) Maskable Interrupts
|
||||
|
||||
Level 15 (Non-maskable) interrupts are dealt with by the GDB stub if
|
||||
present, and cause a panic if not. If the GDB stub is present, ttyS1's
|
||||
interrupts are rated at level 15.
|
||||
|
||||
All other interrupts are distributed over the set of available priorities
|
||||
so that no IRQs are shared where possible. The arch interrupt handling
|
||||
routines attempt to disentangle the various sources available through the
|
||||
CPU's own multiplexor, and those on off-CPU peripherals.
|
||||
|
||||
|
||||
(*) Accessing PCI Devices
|
||||
|
||||
Where PCI is available, care must be taken when dealing with drivers that
|
||||
access PCI devices. PCI devices present their data in little-endian form,
|
||||
but the CPU sees it in big-endian form. The macros in asm/io.h try to get
|
||||
this right, but may not under all circumstances...
|
||||
|
||||
|
||||
(*) Ax88796 Ethernet Driver
|
||||
|
||||
The MB93093 PDK board has an Ax88796 ethernet chipset (an NE2000 clone). A
|
||||
driver has been written to deal specifically with this. The driver
|
||||
provides MII services for the card.
|
||||
|
||||
The driver can be configured by running make xconfig, and going to:
|
||||
|
||||
(*) Network device support
|
||||
- turn on "Network device support"
|
||||
(*) Ethernet (10 or 100Mbit)
|
||||
- turn on "Ethernet (10 or 100Mbit)"
|
||||
- turn on "AX88796 NE2000 compatible chipset"
|
||||
|
||||
The driver can be found in:
|
||||
|
||||
drivers/net/ax88796.c
|
||||
include/asm/ax88796.h
|
||||
|
||||
|
||||
(*) WorkRAM Driver
|
||||
|
||||
This driver provides a character device that permits access to the WorkRAM
|
||||
that can be found on the FR451 CPU. Each page is accessible through a
|
||||
separate minor number, thereby permitting each page to have its own
|
||||
filesystem permissions set on the device file.
|
||||
|
||||
The device files should be:
|
||||
|
||||
mknod /dev/frv/workram0 c 240 0
|
||||
mknod /dev/frv/workram1 c 240 1
|
||||
mknod /dev/frv/workram2 c 240 2
|
||||
...
|
||||
|
||||
The driver will not permit the opening of any device file that does not
|
||||
correspond to at least a partial page of WorkRAM. So the first device file
|
||||
is the only one available on the FR451. If any other CPU is detected, none
|
||||
of the devices will be openable.
|
||||
|
||||
The devices can be accessed with read, write and llseek, and can also be
|
||||
mmapped. If they're mmapped, they will only map at the appropriate
|
||||
0x7e8nnnnn address on linux and at the 0xfe8nnnnn address on uClinux. If
|
||||
MAP_FIXED is not specified, the appropriate address will be chosen anyway.
|
||||
|
||||
The mappings must be MAP_SHARED not MAP_PRIVATE, and must not be
|
||||
PROT_EXEC. They must also start at file offset 0, and must not be longer
|
||||
than one page in size.
|
||||
|
||||
This driver can be configured by running make xconfig, and going to:
|
||||
|
||||
(*) Character devices
|
||||
- turn on "Fujitsu FR-V CPU WorkRAM support"
|
||||
|
||||
|
||||
(*) Dynamic data cache write mode changing
|
||||
|
||||
It is possible to view and to change the data cache's write mode through
|
||||
the /proc/sys/frv/cache-mode file while the kernel is running. There are
|
||||
two modes available:
|
||||
|
||||
NAME MEANING
|
||||
===== ==========================================
|
||||
wthru Data cache is in Write-Through mode
|
||||
wback Data cache is in Write-Back/Copy-Back mode
|
||||
|
||||
To read the cache mode:
|
||||
|
||||
# cat /proc/sys/frv/cache-mode
|
||||
wthru
|
||||
|
||||
To change the cache mode:
|
||||
|
||||
# echo wback >/proc/sys/frv/cache-mode
|
||||
# cat /proc/sys/frv/cache-mode
|
||||
wback
|
||||
|
||||
|
||||
(*) MMU Context IDs and Pinning
|
||||
|
||||
On MMU Linux the CPU supports the concept of a context ID in its MMU to
|
||||
make it more efficient (TLB entries are labelled with a context ID to link
|
||||
them to specific tasks).
|
||||
|
||||
Normally once a context ID is allocated, it will remain affixed to a task
|
||||
or CLONE_VM'd group of tasks for as long as it exists. However, since the
|
||||
kernel is capable of supporting more tasks than there are possible ID
|
||||
numbers, the kernel will pass context IDs from one task to another if
|
||||
there are insufficient available.
|
||||
|
||||
The context ID currently in use by a task can be viewed in /proc:
|
||||
|
||||
# grep CXNR /proc/1/status
|
||||
CXNR: 1
|
||||
|
||||
Note that kernel threads do not have a userspace context, and so will not
|
||||
show a CXNR entry in that file.
|
||||
|
||||
Under some circumstances, however, it is desirable to pin a context ID on
|
||||
a process such that the kernel won't pass it on. This can be done by
|
||||
writing the process ID of the target process to a special file:
|
||||
|
||||
# echo 17 >/proc/sys/frv/pin-cxnr
|
||||
|
||||
Reading from the file will then show the context ID pinned.
|
||||
|
||||
# cat /proc/sys/frv/pin-cxnr
|
||||
4
|
||||
|
||||
The context ID will remain pinned as long as any process is using that
|
||||
context, i.e.: when the all the subscribing processes have exited or
|
||||
exec'd; or when an unpinning request happens:
|
||||
|
||||
# echo 0 >/proc/sys/frv/pin-cxnr
|
||||
|
||||
When there isn't a pinned context, the file shows -1:
|
||||
|
||||
# cat /proc/sys/frv/pin-cxnr
|
||||
-1
|
||||
|
|
@ -1,102 +0,0 @@
|
|||
set remotebreak 1
|
||||
|
||||
define _amr
|
||||
|
||||
printf "AMRx DAMR IAMR \n"
|
||||
printf "==== ===================== =====================\n"
|
||||
printf "amr0 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x0].L,__debug_mmu.damr[0x0].P,__debug_mmu.iamr[0x0].L,__debug_mmu.iamr[0x0].P
|
||||
printf "amr1 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x1].L,__debug_mmu.damr[0x1].P,__debug_mmu.iamr[0x1].L,__debug_mmu.iamr[0x1].P
|
||||
printf "amr2 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x2].L,__debug_mmu.damr[0x2].P,__debug_mmu.iamr[0x2].L,__debug_mmu.iamr[0x2].P
|
||||
printf "amr3 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x3].L,__debug_mmu.damr[0x3].P,__debug_mmu.iamr[0x3].L,__debug_mmu.iamr[0x3].P
|
||||
printf "amr4 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x4].L,__debug_mmu.damr[0x4].P,__debug_mmu.iamr[0x4].L,__debug_mmu.iamr[0x4].P
|
||||
printf "amr5 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x5].L,__debug_mmu.damr[0x5].P,__debug_mmu.iamr[0x5].L,__debug_mmu.iamr[0x5].P
|
||||
printf "amr6 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x6].L,__debug_mmu.damr[0x6].P,__debug_mmu.iamr[0x6].L,__debug_mmu.iamr[0x6].P
|
||||
printf "amr7 : L:%08lx P:%08lx : L:%08lx P:%08lx\n",__debug_mmu.damr[0x7].L,__debug_mmu.damr[0x7].P,__debug_mmu.iamr[0x7].L,__debug_mmu.iamr[0x7].P
|
||||
|
||||
printf "amr8 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x8].L,__debug_mmu.damr[0x8].P
|
||||
printf "amr9 : L:%08lx P:%08lx\n",__debug_mmu.damr[0x9].L,__debug_mmu.damr[0x9].P
|
||||
printf "amr10: L:%08lx P:%08lx\n",__debug_mmu.damr[0xa].L,__debug_mmu.damr[0xa].P
|
||||
printf "amr11: L:%08lx P:%08lx\n",__debug_mmu.damr[0xb].L,__debug_mmu.damr[0xb].P
|
||||
|
||||
end
|
||||
|
||||
|
||||
define _tlb
|
||||
printf "tlb[0x00]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x0].L,__debug_mmu.tlb[0x0].P,__debug_mmu.tlb[0x40+0x0].L,__debug_mmu.tlb[0x40+0x0].P
|
||||
printf "tlb[0x01]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1].L,__debug_mmu.tlb[0x1].P,__debug_mmu.tlb[0x40+0x1].L,__debug_mmu.tlb[0x40+0x1].P
|
||||
printf "tlb[0x02]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2].L,__debug_mmu.tlb[0x2].P,__debug_mmu.tlb[0x40+0x2].L,__debug_mmu.tlb[0x40+0x2].P
|
||||
printf "tlb[0x03]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3].L,__debug_mmu.tlb[0x3].P,__debug_mmu.tlb[0x40+0x3].L,__debug_mmu.tlb[0x40+0x3].P
|
||||
printf "tlb[0x04]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x4].L,__debug_mmu.tlb[0x4].P,__debug_mmu.tlb[0x40+0x4].L,__debug_mmu.tlb[0x40+0x4].P
|
||||
printf "tlb[0x05]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x5].L,__debug_mmu.tlb[0x5].P,__debug_mmu.tlb[0x40+0x5].L,__debug_mmu.tlb[0x40+0x5].P
|
||||
printf "tlb[0x06]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x6].L,__debug_mmu.tlb[0x6].P,__debug_mmu.tlb[0x40+0x6].L,__debug_mmu.tlb[0x40+0x6].P
|
||||
printf "tlb[0x07]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x7].L,__debug_mmu.tlb[0x7].P,__debug_mmu.tlb[0x40+0x7].L,__debug_mmu.tlb[0x40+0x7].P
|
||||
printf "tlb[0x08]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x8].L,__debug_mmu.tlb[0x8].P,__debug_mmu.tlb[0x40+0x8].L,__debug_mmu.tlb[0x40+0x8].P
|
||||
printf "tlb[0x09]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x9].L,__debug_mmu.tlb[0x9].P,__debug_mmu.tlb[0x40+0x9].L,__debug_mmu.tlb[0x40+0x9].P
|
||||
printf "tlb[0x0a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xa].L,__debug_mmu.tlb[0xa].P,__debug_mmu.tlb[0x40+0xa].L,__debug_mmu.tlb[0x40+0xa].P
|
||||
printf "tlb[0x0b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xb].L,__debug_mmu.tlb[0xb].P,__debug_mmu.tlb[0x40+0xb].L,__debug_mmu.tlb[0x40+0xb].P
|
||||
printf "tlb[0x0c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xc].L,__debug_mmu.tlb[0xc].P,__debug_mmu.tlb[0x40+0xc].L,__debug_mmu.tlb[0x40+0xc].P
|
||||
printf "tlb[0x0d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xd].L,__debug_mmu.tlb[0xd].P,__debug_mmu.tlb[0x40+0xd].L,__debug_mmu.tlb[0x40+0xd].P
|
||||
printf "tlb[0x0e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xe].L,__debug_mmu.tlb[0xe].P,__debug_mmu.tlb[0x40+0xe].L,__debug_mmu.tlb[0x40+0xe].P
|
||||
printf "tlb[0x0f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0xf].L,__debug_mmu.tlb[0xf].P,__debug_mmu.tlb[0x40+0xf].L,__debug_mmu.tlb[0x40+0xf].P
|
||||
printf "tlb[0x10]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x10].L,__debug_mmu.tlb[0x10].P,__debug_mmu.tlb[0x40+0x10].L,__debug_mmu.tlb[0x40+0x10].P
|
||||
printf "tlb[0x11]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x11].L,__debug_mmu.tlb[0x11].P,__debug_mmu.tlb[0x40+0x11].L,__debug_mmu.tlb[0x40+0x11].P
|
||||
printf "tlb[0x12]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x12].L,__debug_mmu.tlb[0x12].P,__debug_mmu.tlb[0x40+0x12].L,__debug_mmu.tlb[0x40+0x12].P
|
||||
printf "tlb[0x13]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x13].L,__debug_mmu.tlb[0x13].P,__debug_mmu.tlb[0x40+0x13].L,__debug_mmu.tlb[0x40+0x13].P
|
||||
printf "tlb[0x14]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x14].L,__debug_mmu.tlb[0x14].P,__debug_mmu.tlb[0x40+0x14].L,__debug_mmu.tlb[0x40+0x14].P
|
||||
printf "tlb[0x15]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x15].L,__debug_mmu.tlb[0x15].P,__debug_mmu.tlb[0x40+0x15].L,__debug_mmu.tlb[0x40+0x15].P
|
||||
printf "tlb[0x16]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x16].L,__debug_mmu.tlb[0x16].P,__debug_mmu.tlb[0x40+0x16].L,__debug_mmu.tlb[0x40+0x16].P
|
||||
printf "tlb[0x17]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x17].L,__debug_mmu.tlb[0x17].P,__debug_mmu.tlb[0x40+0x17].L,__debug_mmu.tlb[0x40+0x17].P
|
||||
printf "tlb[0x18]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x18].L,__debug_mmu.tlb[0x18].P,__debug_mmu.tlb[0x40+0x18].L,__debug_mmu.tlb[0x40+0x18].P
|
||||
printf "tlb[0x19]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x19].L,__debug_mmu.tlb[0x19].P,__debug_mmu.tlb[0x40+0x19].L,__debug_mmu.tlb[0x40+0x19].P
|
||||
printf "tlb[0x1a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1a].L,__debug_mmu.tlb[0x1a].P,__debug_mmu.tlb[0x40+0x1a].L,__debug_mmu.tlb[0x40+0x1a].P
|
||||
printf "tlb[0x1b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1b].L,__debug_mmu.tlb[0x1b].P,__debug_mmu.tlb[0x40+0x1b].L,__debug_mmu.tlb[0x40+0x1b].P
|
||||
printf "tlb[0x1c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1c].L,__debug_mmu.tlb[0x1c].P,__debug_mmu.tlb[0x40+0x1c].L,__debug_mmu.tlb[0x40+0x1c].P
|
||||
printf "tlb[0x1d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1d].L,__debug_mmu.tlb[0x1d].P,__debug_mmu.tlb[0x40+0x1d].L,__debug_mmu.tlb[0x40+0x1d].P
|
||||
printf "tlb[0x1e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1e].L,__debug_mmu.tlb[0x1e].P,__debug_mmu.tlb[0x40+0x1e].L,__debug_mmu.tlb[0x40+0x1e].P
|
||||
printf "tlb[0x1f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x1f].L,__debug_mmu.tlb[0x1f].P,__debug_mmu.tlb[0x40+0x1f].L,__debug_mmu.tlb[0x40+0x1f].P
|
||||
printf "tlb[0x20]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x20].L,__debug_mmu.tlb[0x20].P,__debug_mmu.tlb[0x40+0x20].L,__debug_mmu.tlb[0x40+0x20].P
|
||||
printf "tlb[0x21]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x21].L,__debug_mmu.tlb[0x21].P,__debug_mmu.tlb[0x40+0x21].L,__debug_mmu.tlb[0x40+0x21].P
|
||||
printf "tlb[0x22]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x22].L,__debug_mmu.tlb[0x22].P,__debug_mmu.tlb[0x40+0x22].L,__debug_mmu.tlb[0x40+0x22].P
|
||||
printf "tlb[0x23]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x23].L,__debug_mmu.tlb[0x23].P,__debug_mmu.tlb[0x40+0x23].L,__debug_mmu.tlb[0x40+0x23].P
|
||||
printf "tlb[0x24]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x24].L,__debug_mmu.tlb[0x24].P,__debug_mmu.tlb[0x40+0x24].L,__debug_mmu.tlb[0x40+0x24].P
|
||||
printf "tlb[0x25]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x25].L,__debug_mmu.tlb[0x25].P,__debug_mmu.tlb[0x40+0x25].L,__debug_mmu.tlb[0x40+0x25].P
|
||||
printf "tlb[0x26]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x26].L,__debug_mmu.tlb[0x26].P,__debug_mmu.tlb[0x40+0x26].L,__debug_mmu.tlb[0x40+0x26].P
|
||||
printf "tlb[0x27]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x27].L,__debug_mmu.tlb[0x27].P,__debug_mmu.tlb[0x40+0x27].L,__debug_mmu.tlb[0x40+0x27].P
|
||||
printf "tlb[0x28]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x28].L,__debug_mmu.tlb[0x28].P,__debug_mmu.tlb[0x40+0x28].L,__debug_mmu.tlb[0x40+0x28].P
|
||||
printf "tlb[0x29]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x29].L,__debug_mmu.tlb[0x29].P,__debug_mmu.tlb[0x40+0x29].L,__debug_mmu.tlb[0x40+0x29].P
|
||||
printf "tlb[0x2a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2a].L,__debug_mmu.tlb[0x2a].P,__debug_mmu.tlb[0x40+0x2a].L,__debug_mmu.tlb[0x40+0x2a].P
|
||||
printf "tlb[0x2b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2b].L,__debug_mmu.tlb[0x2b].P,__debug_mmu.tlb[0x40+0x2b].L,__debug_mmu.tlb[0x40+0x2b].P
|
||||
printf "tlb[0x2c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2c].L,__debug_mmu.tlb[0x2c].P,__debug_mmu.tlb[0x40+0x2c].L,__debug_mmu.tlb[0x40+0x2c].P
|
||||
printf "tlb[0x2d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2d].L,__debug_mmu.tlb[0x2d].P,__debug_mmu.tlb[0x40+0x2d].L,__debug_mmu.tlb[0x40+0x2d].P
|
||||
printf "tlb[0x2e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2e].L,__debug_mmu.tlb[0x2e].P,__debug_mmu.tlb[0x40+0x2e].L,__debug_mmu.tlb[0x40+0x2e].P
|
||||
printf "tlb[0x2f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x2f].L,__debug_mmu.tlb[0x2f].P,__debug_mmu.tlb[0x40+0x2f].L,__debug_mmu.tlb[0x40+0x2f].P
|
||||
printf "tlb[0x30]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x30].L,__debug_mmu.tlb[0x30].P,__debug_mmu.tlb[0x40+0x30].L,__debug_mmu.tlb[0x40+0x30].P
|
||||
printf "tlb[0x31]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x31].L,__debug_mmu.tlb[0x31].P,__debug_mmu.tlb[0x40+0x31].L,__debug_mmu.tlb[0x40+0x31].P
|
||||
printf "tlb[0x32]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x32].L,__debug_mmu.tlb[0x32].P,__debug_mmu.tlb[0x40+0x32].L,__debug_mmu.tlb[0x40+0x32].P
|
||||
printf "tlb[0x33]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x33].L,__debug_mmu.tlb[0x33].P,__debug_mmu.tlb[0x40+0x33].L,__debug_mmu.tlb[0x40+0x33].P
|
||||
printf "tlb[0x34]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x34].L,__debug_mmu.tlb[0x34].P,__debug_mmu.tlb[0x40+0x34].L,__debug_mmu.tlb[0x40+0x34].P
|
||||
printf "tlb[0x35]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x35].L,__debug_mmu.tlb[0x35].P,__debug_mmu.tlb[0x40+0x35].L,__debug_mmu.tlb[0x40+0x35].P
|
||||
printf "tlb[0x36]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x36].L,__debug_mmu.tlb[0x36].P,__debug_mmu.tlb[0x40+0x36].L,__debug_mmu.tlb[0x40+0x36].P
|
||||
printf "tlb[0x37]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x37].L,__debug_mmu.tlb[0x37].P,__debug_mmu.tlb[0x40+0x37].L,__debug_mmu.tlb[0x40+0x37].P
|
||||
printf "tlb[0x38]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x38].L,__debug_mmu.tlb[0x38].P,__debug_mmu.tlb[0x40+0x38].L,__debug_mmu.tlb[0x40+0x38].P
|
||||
printf "tlb[0x39]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x39].L,__debug_mmu.tlb[0x39].P,__debug_mmu.tlb[0x40+0x39].L,__debug_mmu.tlb[0x40+0x39].P
|
||||
printf "tlb[0x3a]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3a].L,__debug_mmu.tlb[0x3a].P,__debug_mmu.tlb[0x40+0x3a].L,__debug_mmu.tlb[0x40+0x3a].P
|
||||
printf "tlb[0x3b]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3b].L,__debug_mmu.tlb[0x3b].P,__debug_mmu.tlb[0x40+0x3b].L,__debug_mmu.tlb[0x40+0x3b].P
|
||||
printf "tlb[0x3c]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3c].L,__debug_mmu.tlb[0x3c].P,__debug_mmu.tlb[0x40+0x3c].L,__debug_mmu.tlb[0x40+0x3c].P
|
||||
printf "tlb[0x3d]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3d].L,__debug_mmu.tlb[0x3d].P,__debug_mmu.tlb[0x40+0x3d].L,__debug_mmu.tlb[0x40+0x3d].P
|
||||
printf "tlb[0x3e]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3e].L,__debug_mmu.tlb[0x3e].P,__debug_mmu.tlb[0x40+0x3e].L,__debug_mmu.tlb[0x40+0x3e].P
|
||||
printf "tlb[0x3f]: %08lx %08lx %08lx %08lx\n",__debug_mmu.tlb[0x3f].L,__debug_mmu.tlb[0x3f].P,__debug_mmu.tlb[0x40+0x3f].L,__debug_mmu.tlb[0x40+0x3f].P
|
||||
end
|
||||
|
||||
|
||||
define _pgd
|
||||
p (pgd_t[0x40])*(pgd_t*)(__debug_mmu.damr[0x3].L)
|
||||
end
|
||||
|
||||
define _ptd_i
|
||||
p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x4].L)
|
||||
end
|
||||
|
||||
define _ptd_d
|
||||
p (pte_t[0x1000])*(pte_t*)(__debug_mmu.damr[0x5].L)
|
||||
end
|
||||
|
|
@ -1,130 +0,0 @@
|
|||
====================
|
||||
DEBUGGING FR-V LINUX
|
||||
====================
|
||||
|
||||
|
||||
The kernel contains a GDB stub that talks GDB remote protocol across a serial
|
||||
port. This permits GDB to single step through the kernel, set breakpoints and
|
||||
trap exceptions that happen in kernel space and interrupt execution. It also
|
||||
permits the NMI interrupt button or serial port events to jump the kernel into
|
||||
the debugger.
|
||||
|
||||
On the CPUs that have on-chip UARTs (FR400, FR403, FR405, FR555), the
|
||||
GDB stub hijacks a serial port for its own purposes, and makes it
|
||||
generate level 15 interrupts (NMI). The kernel proper cannot see the serial
|
||||
port in question under these conditions.
|
||||
|
||||
On the MB93091-VDK CPU boards, the GDB stub uses UART1, which would otherwise
|
||||
be /dev/ttyS1. On the MB93093-PDK, the GDB stub uses UART0. Therefore, on the
|
||||
PDK there is no externally accessible serial port and the serial port to
|
||||
which the touch screen is attached becomes /dev/ttyS0.
|
||||
|
||||
Note that the GDB stub runs entirely within CPU debug mode, and so should not
|
||||
incur any exceptions or interrupts whilst it is active. In particular, note
|
||||
that the clock will lose time since it is implemented in software.
|
||||
|
||||
|
||||
==================
|
||||
KERNEL PREPARATION
|
||||
==================
|
||||
|
||||
Firstly, a debuggable kernel must be built. To do this, unpack the kernel tree
|
||||
and copy the configuration that you wish to use to .config. Then reconfigure
|
||||
the following things on the "Kernel Hacking" tab:
|
||||
|
||||
(*) "Include debugging information"
|
||||
|
||||
Set this to "Y". This causes all C and Assembly files to be compiled
|
||||
to include debugging information.
|
||||
|
||||
(*) "In-kernel GDB stub"
|
||||
|
||||
Set this to "Y". This causes the GDB stub to be compiled into the
|
||||
kernel.
|
||||
|
||||
(*) "Immediate activation"
|
||||
|
||||
Set this to "Y" if you want the GDB stub to activate as soon as possible
|
||||
and wait for GDB to connect. This allows you to start tracing right from
|
||||
the beginning of start_kernel() in init/main.c.
|
||||
|
||||
(*) "Console through GDB stub"
|
||||
|
||||
Set this to "Y" if you wish to be able to use "console=gdb0" on the
|
||||
command line. That tells the kernel to pass system console messages to
|
||||
GDB (which then prints them on its standard output). This is useful when
|
||||
debugging the serial drivers that'd otherwise be used to pass console
|
||||
messages to the outside world.
|
||||
|
||||
Then build as usual, download to the board and execute. Note that if
|
||||
"Immediate activation" was selected, then the kernel will wait for GDB to
|
||||
attach. If not, then the kernel will boot immediately and GDB will have to
|
||||
interrupt it or wait for an exception to occur before doing anything with
|
||||
the kernel.
|
||||
|
||||
|
||||
=========================
|
||||
KERNEL DEBUGGING WITH GDB
|
||||
=========================
|
||||
|
||||
Set the serial port on the computer that's going to run GDB to the appropriate
|
||||
baud rate. Assuming the board's debug port is connected to ttyS0/COM1 on the
|
||||
computer doing the debugging:
|
||||
|
||||
stty -F /dev/ttyS0 115200
|
||||
|
||||
Then start GDB in the base of the kernel tree:
|
||||
|
||||
frv-uclinux-gdb linux [uClinux]
|
||||
|
||||
Or:
|
||||
|
||||
frv-uclinux-gdb vmlinux [MMU linux]
|
||||
|
||||
When the prompt appears:
|
||||
|
||||
GNU gdb frv-031024
|
||||
Copyright 2003 Free Software Foundation, Inc.
|
||||
GDB is free software, covered by the GNU General Public License, and you are
|
||||
welcome to change it and/or distribute copies of it under certain conditions.
|
||||
Type "show copying" to see the conditions.
|
||||
There is absolutely no warranty for GDB. Type "show warranty" for details.
|
||||
This GDB was configured as "--host=i686-pc-linux-gnu --target=frv-uclinux"...
|
||||
(gdb)
|
||||
|
||||
Attach to the board like this:
|
||||
|
||||
(gdb) target remote /dev/ttyS0
|
||||
Remote debugging using /dev/ttyS0
|
||||
start_kernel () at init/main.c:395
|
||||
(gdb)
|
||||
|
||||
This should show the appropriate lines from the source too. The kernel can
|
||||
then be debugged almost as if it's any other program.
|
||||
|
||||
|
||||
===============================
|
||||
INTERRUPTING THE RUNNING KERNEL
|
||||
===============================
|
||||
|
||||
The kernel can be interrupted whilst it is running, causing a jump back to the
|
||||
GDB stub and the debugger:
|
||||
|
||||
(*) Pressing Ctrl-C in GDB. This will cause GDB to try and interrupt the
|
||||
kernel by sending an RS232 BREAK over the serial line to the GDB
|
||||
stub. This will (mostly) immediately interrupt the kernel and return it
|
||||
to the debugger.
|
||||
|
||||
(*) Pressing the NMI button on the board will also cause a jump into the
|
||||
debugger.
|
||||
|
||||
(*) Setting a software breakpoint. This sets a break instruction at the
|
||||
desired location which the GDB stub then traps the exception for.
|
||||
|
||||
(*) Setting a hardware breakpoint. The GDB stub is capable of using the IBAR
|
||||
and DBAR registers to assist debugging.
|
||||
|
||||
Furthermore, the GDB stub will intercept a number of exceptions automatically
|
||||
if they are caused by kernel execution. It will also intercept BUG() macro
|
||||
invocation.
|
||||
|
||||
|
|
@ -1,262 +0,0 @@
|
|||
=================================
|
||||
INTERNAL KERNEL ABI FOR FR-V ARCH
|
||||
=================================
|
||||
|
||||
The internal FRV kernel ABI is not quite the same as the userspace ABI. A
|
||||
number of the registers are used for special purposed, and the ABI is not
|
||||
consistent between modules vs core, and MMU vs no-MMU.
|
||||
|
||||
This partly stems from the fact that FRV CPUs do not have a separate
|
||||
supervisor stack pointer, and most of them do not have any scratch
|
||||
registers, thus requiring at least one general purpose register to be
|
||||
clobbered in such an event. Also, within the kernel core, it is possible to
|
||||
simply jump or call directly between functions using a relative offset.
|
||||
This cannot be extended to modules for the displacement is likely to be too
|
||||
far. Thus in modules the address of a function to call must be calculated
|
||||
in a register and then used, requiring two extra instructions.
|
||||
|
||||
This document has the following sections:
|
||||
|
||||
(*) System call register ABI
|
||||
(*) CPU operating modes
|
||||
(*) Internal kernel-mode register ABI
|
||||
(*) Internal debug-mode register ABI
|
||||
(*) Virtual interrupt handling
|
||||
|
||||
|
||||
========================
|
||||
SYSTEM CALL REGISTER ABI
|
||||
========================
|
||||
|
||||
When a system call is made, the following registers are effective:
|
||||
|
||||
REGISTERS CALL RETURN
|
||||
=============== ======================= =======================
|
||||
GR7 System call number Preserved
|
||||
GR8 Syscall arg #1 Return value
|
||||
GR9-GR13 Syscall arg #2-6 Preserved
|
||||
|
||||
|
||||
===================
|
||||
CPU OPERATING MODES
|
||||
===================
|
||||
|
||||
The FR-V CPU has three basic operating modes. In order of increasing
|
||||
capability:
|
||||
|
||||
(1) User mode.
|
||||
|
||||
Basic userspace running mode.
|
||||
|
||||
(2) Kernel mode.
|
||||
|
||||
Normal kernel mode. There are many additional control registers
|
||||
available that may be accessed in this mode, in addition to all the
|
||||
stuff available to user mode. This has two submodes:
|
||||
|
||||
(a) Exceptions enabled (PSR.T == 1).
|
||||
|
||||
Exceptions will invoke the appropriate normal kernel mode
|
||||
handler. On entry to the handler, the PSR.T bit will be cleared.
|
||||
|
||||
(b) Exceptions disabled (PSR.T == 0).
|
||||
|
||||
No exceptions or interrupts may happen. Any mandatory exceptions
|
||||
will cause the CPU to halt unless the CPU is told to jump into
|
||||
debug mode instead.
|
||||
|
||||
(3) Debug mode.
|
||||
|
||||
No exceptions may happen in this mode. Memory protection and
|
||||
management exceptions will be flagged for later consideration, but
|
||||
the exception handler won't be invoked. Debugging traps such as
|
||||
hardware breakpoints and watchpoints will be ignored. This mode is
|
||||
entered only by debugging events obtained from the other two modes.
|
||||
|
||||
All kernel mode registers may be accessed, plus a few extra debugging
|
||||
specific registers.
|
||||
|
||||
|
||||
=================================
|
||||
INTERNAL KERNEL-MODE REGISTER ABI
|
||||
=================================
|
||||
|
||||
There are a number of permanent register assignments that are set up by
|
||||
entry.S in the exception prologue. Note that there is a complete set of
|
||||
exception prologues for each of user->kernel transition and kernel->kernel
|
||||
transition. There are also user->debug and kernel->debug mode transition
|
||||
prologues.
|
||||
|
||||
|
||||
REGISTER FLAVOUR USE
|
||||
=============== ======= ==============================================
|
||||
GR1 Supervisor stack pointer
|
||||
GR15 Current thread info pointer
|
||||
GR16 GP-Rel base register for small data
|
||||
GR28 Current exception frame pointer (__frame)
|
||||
GR29 Current task pointer (current)
|
||||
GR30 Destroyed by kernel mode entry
|
||||
GR31 NOMMU Destroyed by debug mode entry
|
||||
GR31 MMU Destroyed by TLB miss kernel mode entry
|
||||
CCR.ICC2 Virtual interrupt disablement tracking
|
||||
CCCR.CC3 Cleared by exception prologue
|
||||
(atomic op emulation)
|
||||
SCR0 MMU See mmu-layout.txt.
|
||||
SCR1 MMU See mmu-layout.txt.
|
||||
SCR2 MMU Save for EAR0 (destroyed by icache insns
|
||||
in debug mode)
|
||||
SCR3 MMU Save for GR31 during debug exceptions
|
||||
DAMR/IAMR NOMMU Fixed memory protection layout.
|
||||
DAMR/IAMR MMU See mmu-layout.txt.
|
||||
|
||||
|
||||
Certain registers are also used or modified across function calls:
|
||||
|
||||
REGISTER CALL RETURN
|
||||
=============== =============================== ======================
|
||||
GR0 Fixed Zero -
|
||||
GR2 Function call frame pointer
|
||||
GR3 Special Preserved
|
||||
GR3-GR7 - Clobbered
|
||||
GR8 Function call arg #1 Return value
|
||||
(or clobbered)
|
||||
GR9 Function call arg #2 Return value MSW
|
||||
(or clobbered)
|
||||
GR10-GR13 Function call arg #3-#6 Clobbered
|
||||
GR14 - Clobbered
|
||||
GR15-GR16 Special Preserved
|
||||
GR17-GR27 - Preserved
|
||||
GR28-GR31 Special Only accessed
|
||||
explicitly
|
||||
LR Return address after CALL Clobbered
|
||||
CCR/CCCR - Mostly Clobbered
|
||||
|
||||
|
||||
================================
|
||||
INTERNAL DEBUG-MODE REGISTER ABI
|
||||
================================
|
||||
|
||||
This is the same as the kernel-mode register ABI for functions calls. The
|
||||
difference is that in debug-mode there's a different stack and a different
|
||||
exception frame. Almost all the global registers from kernel-mode
|
||||
(including the stack pointer) may be changed.
|
||||
|
||||
REGISTER FLAVOUR USE
|
||||
=============== ======= ==============================================
|
||||
GR1 Debug stack pointer
|
||||
GR16 GP-Rel base register for small data
|
||||
GR31 Current debug exception frame pointer
|
||||
(__debug_frame)
|
||||
SCR3 MMU Saved value of GR31
|
||||
|
||||
|
||||
Note that debug mode is able to interfere with the kernel's emulated atomic
|
||||
ops, so it must be exceedingly careful not to do any that would interact
|
||||
with the main kernel in this regard. Hence the debug mode code (gdbstub) is
|
||||
almost completely self-contained. The only external code used is the
|
||||
sprintf family of functions.
|
||||
|
||||
Furthermore, break.S is so complicated because single-step mode does not
|
||||
switch off on entry to an exception. That means unless manually disabled,
|
||||
single-stepping will blithely go on stepping into things like interrupts.
|
||||
See gdbstub.txt for more information.
|
||||
|
||||
|
||||
==========================
|
||||
VIRTUAL INTERRUPT HANDLING
|
||||
==========================
|
||||
|
||||
Because accesses to the PSR is so slow, and to disable interrupts we have
|
||||
to access it twice (once to read and once to write), we don't actually
|
||||
disable interrupts at all if we don't have to. What we do instead is use
|
||||
the ICC2 condition code flags to note virtual disablement, such that if we
|
||||
then do take an interrupt, we note the flag, really disable interrupts, set
|
||||
another flag and resume execution at the point the interrupt happened.
|
||||
Setting condition flags as a side effect of an arithmetic or logical
|
||||
instruction is really fast. This use of the ICC2 only occurs within the
|
||||
kernel - it does not affect userspace.
|
||||
|
||||
The flags we use are:
|
||||
|
||||
(*) CCR.ICC2.Z [Zero flag]
|
||||
|
||||
Set to virtually disable interrupts, clear when interrupts are
|
||||
virtually enabled. Can be modified by logical instructions without
|
||||
affecting the Carry flag.
|
||||
|
||||
(*) CCR.ICC2.C [Carry flag]
|
||||
|
||||
Clear to indicate hardware interrupts are really disabled, set otherwise.
|
||||
|
||||
|
||||
What happens is this:
|
||||
|
||||
(1) Normal kernel-mode operation.
|
||||
|
||||
ICC2.Z is 0, ICC2.C is 1.
|
||||
|
||||
(2) An interrupt occurs. The exception prologue examines ICC2.Z and
|
||||
determines that nothing needs doing. This is done simply with an
|
||||
unlikely BEQ instruction.
|
||||
|
||||
(3) The interrupts are disabled (local_irq_disable)
|
||||
|
||||
ICC2.Z is set to 1.
|
||||
|
||||
(4) If interrupts were then re-enabled (local_irq_enable):
|
||||
|
||||
ICC2.Z would be set to 0.
|
||||
|
||||
A TIHI #2 instruction (trap #2 if condition HI - Z==0 && C==0) would
|
||||
be used to trap if interrupts were now virtually enabled, but
|
||||
physically disabled - which they're not, so the trap isn't taken. The
|
||||
kernel would then be back to state (1).
|
||||
|
||||
(5) An interrupt occurs. The exception prologue examines ICC2.Z and
|
||||
determines that the interrupt shouldn't actually have happened. It
|
||||
jumps aside, and there disabled interrupts by setting PSR.PIL to 14
|
||||
and then it clears ICC2.C.
|
||||
|
||||
(6) If interrupts were then saved and disabled again (local_irq_save):
|
||||
|
||||
ICC2.Z would be shifted into the save variable and masked off
|
||||
(giving a 1).
|
||||
|
||||
ICC2.Z would then be set to 1 (thus unchanged), and ICC2.C would be
|
||||
unaffected (ie: 0).
|
||||
|
||||
(7) If interrupts were then restored from state (6) (local_irq_restore):
|
||||
|
||||
ICC2.Z would be set to indicate the result of XOR'ing the saved
|
||||
value (ie: 1) with 1, which gives a result of 0 - thus leaving
|
||||
ICC2.Z set.
|
||||
|
||||
ICC2.C would remain unaffected (ie: 0).
|
||||
|
||||
A TIHI #2 instruction would be used to again assay the current state,
|
||||
but this would do nothing as Z==1.
|
||||
|
||||
(8) If interrupts were then enabled (local_irq_enable):
|
||||
|
||||
ICC2.Z would be cleared. ICC2.C would be left unaffected. Both
|
||||
flags would now be 0.
|
||||
|
||||
A TIHI #2 instruction again issued to assay the current state would
|
||||
then trap as both Z==0 [interrupts virtually enabled] and C==0
|
||||
[interrupts really disabled] would then be true.
|
||||
|
||||
(9) The trap #2 handler would simply enable hardware interrupts
|
||||
(set PSR.PIL to 0), set ICC2.C to 1 and return.
|
||||
|
||||
(10) Immediately upon returning, the pending interrupt would be taken.
|
||||
|
||||
(11) The interrupt handler would take the path of actually processing the
|
||||
interrupt (ICC2.Z is clear, BEQ fails as per step (2)).
|
||||
|
||||
(12) The interrupt handler would then set ICC2.C to 1 since hardware
|
||||
interrupts are definitely enabled - or else the kernel wouldn't be here.
|
||||
|
||||
(13) On return from the interrupt handler, things would be back to state (1).
|
||||
|
||||
This trap (#2) is only available in kernel mode. In user mode it will
|
||||
result in SIGILL.
|
||||
|
|
@ -1,306 +0,0 @@
|
|||
=================================
|
||||
FR451 MMU LINUX MEMORY MANAGEMENT
|
||||
=================================
|
||||
|
||||
============
|
||||
MMU HARDWARE
|
||||
============
|
||||
|
||||
FR451 MMU Linux puts the MMU into EDAT mode whilst running. This means that it uses both the SAT
|
||||
registers and the DAT TLB to perform address translation.
|
||||
|
||||
There are 8 IAMLR/IAMPR register pairs and 16 DAMLR/DAMPR register pairs for SAT mode.
|
||||
|
||||
In DAT mode, there is also a TLB organised in cache format as 64 lines x 2 ways. Each line spans a
|
||||
16KB range of addresses, but can match a larger region.
|
||||
|
||||
|
||||
===========================
|
||||
MEMORY MANAGEMENT REGISTERS
|
||||
===========================
|
||||
|
||||
Certain control registers are used by the kernel memory management routines:
|
||||
|
||||
REGISTERS USAGE
|
||||
====================== ==================================================
|
||||
IAMR0, DAMR0 Kernel image and data mappings
|
||||
IAMR1, DAMR1 First-chance TLB lookup mapping
|
||||
DAMR2 Page attachment for cache flush by page
|
||||
DAMR3 Current PGD mapping
|
||||
SCR0, DAMR4 Instruction TLB PGE/PTD cache
|
||||
SCR1, DAMR5 Data TLB PGE/PTD cache
|
||||
DAMR6-10 kmap_atomic() mappings
|
||||
DAMR11 I/O mapping
|
||||
CXNR mm_struct context ID
|
||||
TTBR Page directory (PGD) pointer (physical address)
|
||||
|
||||
|
||||
=====================
|
||||
GENERAL MEMORY LAYOUT
|
||||
=====================
|
||||
|
||||
The physical memory layout is as follows:
|
||||
|
||||
PHYSICAL ADDRESS CONTROLLER DEVICE
|
||||
=================== ============== =======================================
|
||||
00000000 - BFFFFFFF SDRAM SDRAM area
|
||||
E0000000 - EFFFFFFF L-BUS CS2# VDK SLBUS/PCI window
|
||||
F0000000 - F0FFFFFF L-BUS CS5# MB93493 CSC area (DAV daughter board)
|
||||
F1000000 - F1FFFFFF L-BUS CS7# (CB70 CPU-card PCMCIA port I/O space)
|
||||
FC000000 - FC0FFFFF L-BUS CS1# VDK MB86943 config space
|
||||
FC100000 - FC1FFFFF L-BUS CS6# DM9000 NIC I/O space
|
||||
FC200000 - FC2FFFFF L-BUS CS3# MB93493 CSR area (DAV daughter board)
|
||||
FD000000 - FDFFFFFF L-BUS CS4# (CB70 CPU-card extra flash space)
|
||||
FE000000 - FEFFFFFF Internal CPU peripherals
|
||||
FF000000 - FF1FFFFF L-BUS CS0# Flash 1
|
||||
FF200000 - FF3FFFFF L-BUS CS0# Flash 2
|
||||
FFC00000 - FFC0001F L-BUS CS0# FPGA
|
||||
|
||||
The virtual memory layout is:
|
||||
|
||||
VIRTUAL ADDRESS PHYSICAL TRANSLATOR FLAGS SIZE OCCUPATION
|
||||
================= ======== ============== ======= ======= ===================================
|
||||
00004000-BFFFFFFF various TLB,xAMR1 D-N-??V 3GB Userspace
|
||||
C0000000-CFFFFFFF 00000000 xAMPR0 -L-S--V 256MB Kernel image and data
|
||||
D0000000-D7FFFFFF various TLB,xAMR1 D-NS??V 128MB vmalloc area
|
||||
D8000000-DBFFFFFF various TLB,xAMR1 D-NS??V 64MB kmap() area
|
||||
DC000000-DCFFFFFF various TLB 1MB Secondary kmap_atomic() frame
|
||||
DD000000-DD27FFFF various DAMR 160KB Primary kmap_atomic() frame
|
||||
DD040000 DAMR2/IAMR2 -L-S--V page Page cache flush attachment point
|
||||
DD080000 DAMR3 -L-SC-V page Page Directory (PGD)
|
||||
DD0C0000 DAMR4 -L-SC-V page Cached insn TLB Page Table lookup
|
||||
DD100000 DAMR5 -L-SC-V page Cached data TLB Page Table lookup
|
||||
DD140000 DAMR6 -L-S--V page kmap_atomic(KM_BOUNCE_READ)
|
||||
DD180000 DAMR7 -L-S--V page kmap_atomic(KM_SKB_SUNRPC_DATA)
|
||||
DD1C0000 DAMR8 -L-S--V page kmap_atomic(KM_SKB_DATA_SOFTIRQ)
|
||||
DD200000 DAMR9 -L-S--V page kmap_atomic(KM_USER0)
|
||||
DD240000 DAMR10 -L-S--V page kmap_atomic(KM_USER1)
|
||||
E0000000-FFFFFFFF E0000000 DAMR11 -L-SC-V 512MB I/O region
|
||||
|
||||
IAMPR1 and DAMPR1 are used as an extension to the TLB.
|
||||
|
||||
|
||||
====================
|
||||
KMAP AND KMAP_ATOMIC
|
||||
====================
|
||||
|
||||
To access pages in the page cache (which may not be directly accessible if highmem is available),
|
||||
the kernel calls kmap(), does the access and then calls kunmap(); or it calls kmap_atomic(), does
|
||||
the access and then calls kunmap_atomic().
|
||||
|
||||
kmap() creates an attachment between an arbitrary inaccessible page and a range of virtual
|
||||
addresses by installing a PTE in a special page table. The kernel can then access this page as it
|
||||
wills. When it's finished, the kernel calls kunmap() to clear the PTE.
|
||||
|
||||
kmap_atomic() does something slightly different. In the interests of speed, it chooses one of two
|
||||
strategies:
|
||||
|
||||
(1) If possible, kmap_atomic() attaches the requested page to one of DAMPR5 through DAMPR10
|
||||
register pairs; and the matching kunmap_atomic() clears the DAMPR. This makes high memory
|
||||
support really fast as there's no need to flush the TLB or modify the page tables. The DAMLR
|
||||
registers being used for this are preset during boot and don't change over the lifetime of the
|
||||
process. There's a direct mapping between the first few kmap_atomic() types, DAMR number and
|
||||
virtual address slot.
|
||||
|
||||
However, there are more kmap_atomic() types defined than there are DAMR registers available,
|
||||
so we fall back to:
|
||||
|
||||
(2) kmap_atomic() uses a slot in the secondary frame (determined by the type parameter), and then
|
||||
locks an entry in the TLB to translate that slot to the specified page. The number of slots is
|
||||
obviously limited, and their positions are controlled such that each slot is matched by a
|
||||
different line in the TLB. kunmap() ejects the entry from the TLB.
|
||||
|
||||
Note that the first three kmap atomic types are really just declared as placeholders. The DAMPR
|
||||
registers involved are actually modified directly.
|
||||
|
||||
Also note that kmap() itself may sleep, kmap_atomic() may never sleep and both always succeed;
|
||||
furthermore, a driver using kmap() may sleep before calling kunmap(), but may not sleep before
|
||||
calling kunmap_atomic() if it had previously called kmap_atomic().
|
||||
|
||||
|
||||
===============================
|
||||
USING MORE THAN 256MB OF MEMORY
|
||||
===============================
|
||||
|
||||
The kernel cannot access more than 256MB of memory directly. The physical layout, however, permits
|
||||
up to 3GB of SDRAM (possibly 3.25GB) to be made available. By using CONFIG_HIGHMEM, the kernel can
|
||||
allow userspace (by way of page tables) and itself (by way of kmap) to deal with the memory
|
||||
allocation.
|
||||
|
||||
External devices can, of course, still DMA to and from all of the SDRAM, even if the kernel can't
|
||||
see it directly. The kernel translates page references into real addresses for communicating to the
|
||||
devices.
|
||||
|
||||
|
||||
===================
|
||||
PAGE TABLE TOPOLOGY
|
||||
===================
|
||||
|
||||
The page tables are arranged in 2-layer format. There is a middle layer (PMD) that would be used in
|
||||
3-layer format tables but that is folded into the top layer (PGD) and so consumes no extra memory
|
||||
or processing power.
|
||||
|
||||
+------+ PGD PMD
|
||||
| TTBR |--->+-------------------+
|
||||
+------+ | | : STE |
|
||||
| PGE0 | PME0 : STE |
|
||||
| | : STE |
|
||||
+-------------------+ Page Table
|
||||
| | : STE -------------->+--------+ +0x0000
|
||||
| PGE1 | PME0 : STE -----------+ | PTE0 |
|
||||
| | : STE -------+ | +--------+
|
||||
+-------------------+ | | | PTE63 |
|
||||
| | : STE | | +-->+--------+ +0x0100
|
||||
| PGE2 | PME0 : STE | | | PTE64 |
|
||||
| | : STE | | +--------+
|
||||
+-------------------+ | | PTE127 |
|
||||
| | : STE | +------>+--------+ +0x0200
|
||||
| PGE3 | PME0 : STE | | PTE128 |
|
||||
| | : STE | +--------+
|
||||
+-------------------+ | PTE191 |
|
||||
+--------+ +0x0300
|
||||
|
||||
Each Page Directory (PGD) is 16KB (page size) in size and is divided into 64 entries (PGEs). Each
|
||||
PGE contains one Page Mid Directory (PMD).
|
||||
|
||||
Each PMD is 256 bytes in size and contains a single entry (PME). Each PME holds 64 FR451 MMU
|
||||
segment table entries of 4 bytes apiece. Each PME "points to" a page table. In practice, each STE
|
||||
points to a subset of the page table, the first to PT+0x0000, the second to PT+0x0100, the third to
|
||||
PT+0x200, and so on.
|
||||
|
||||
Each PGE and PME covers 64MB of the total virtual address space.
|
||||
|
||||
Each Page Table (PTD) is 16KB (page size) in size, and is divided into 4096 entries (PTEs). Each
|
||||
entry can point to one 16KB page. In practice, each Linux page table is subdivided into 64 FR451
|
||||
MMU page tables. But they are all grouped together to make management easier, in particular rmap
|
||||
support is then trivial.
|
||||
|
||||
Grouping page tables in this fashion makes PGE caching in SCR0/SCR1 more efficient because the
|
||||
coverage of the cached item is greater.
|
||||
|
||||
Page tables for the vmalloc area are allocated at boot time and shared between all mm_structs.
|
||||
|
||||
|
||||
=================
|
||||
USER SPACE LAYOUT
|
||||
=================
|
||||
|
||||
For MMU capable Linux, the regions userspace code are allowed to access are kept entirely separate
|
||||
from those dedicated to the kernel:
|
||||
|
||||
VIRTUAL ADDRESS SIZE PURPOSE
|
||||
================= ===== ===================================
|
||||
00000000-00003fff 4KB NULL pointer access trap
|
||||
00004000-01ffffff ~32MB lower mmap space (grows up)
|
||||
02000000-021fffff 2MB Stack space (grows down from top)
|
||||
02200000-nnnnnnnn Executable mapping
|
||||
nnnnnnnn- brk space (grows up)
|
||||
-bfffffff upper mmap space (grows down)
|
||||
|
||||
This is so arranged so as to make best use of the 16KB page tables and the way in which PGEs/PMEs
|
||||
are cached by the TLB handler. The lower mmap space is filled first, and then the upper mmap space
|
||||
is filled.
|
||||
|
||||
|
||||
===============================
|
||||
GDB-STUB MMU DEBUGGING SERVICES
|
||||
===============================
|
||||
|
||||
The gdb-stub included in this kernel provides a number of services to aid in the debugging of MMU
|
||||
related kernel services:
|
||||
|
||||
(*) Every time the kernel stops, certain state information is dumped into __debug_mmu. This
|
||||
variable is defined in arch/frv/kernel/gdb-stub.c. Note that the gdbinit file in this
|
||||
directory has some useful macros for dealing with this.
|
||||
|
||||
(*) __debug_mmu.tlb[]
|
||||
|
||||
This receives the current TLB contents. This can be viewed with the _tlb GDB macro:
|
||||
|
||||
(gdb) _tlb
|
||||
tlb[0x00]: 01000005 00718203 01000002 00718203
|
||||
tlb[0x01]: 01004002 006d4201 01004005 006d4203
|
||||
tlb[0x02]: 01008002 006d0201 01008006 00004200
|
||||
tlb[0x03]: 0100c006 007f4202 0100c002 0064c202
|
||||
tlb[0x04]: 01110005 00774201 01110002 00774201
|
||||
tlb[0x05]: 01114005 00770201 01114002 00770201
|
||||
tlb[0x06]: 01118002 0076c201 01118005 0076c201
|
||||
...
|
||||
tlb[0x3d]: 010f4002 00790200 001f4002 0054ca02
|
||||
tlb[0x3e]: 010f8005 0078c201 010f8002 0078c201
|
||||
tlb[0x3f]: 001fc002 0056ca01 001fc005 00538a01
|
||||
|
||||
(*) __debug_mmu.iamr[]
|
||||
(*) __debug_mmu.damr[]
|
||||
|
||||
These receive the current IAMR and DAMR contents. These can be viewed with the _amr
|
||||
GDB macro:
|
||||
|
||||
(gdb) _amr
|
||||
AMRx DAMR IAMR
|
||||
==== ===================== =====================
|
||||
amr0 : L:c0000000 P:00000cb9 : L:c0000000 P:000004b9
|
||||
amr1 : L:01070005 P:006f9203 : L:0102c005 P:006a1201
|
||||
amr2 : L:d8d00000 P:00000000 : L:d8d00000 P:00000000
|
||||
amr3 : L:d8d04000 P:00534c0d : L:00000000 P:00000000
|
||||
amr4 : L:d8d08000 P:00554c0d : L:00000000 P:00000000
|
||||
amr5 : L:d8d0c000 P:00554c0d : L:00000000 P:00000000
|
||||
amr6 : L:d8d10000 P:00000000 : L:00000000 P:00000000
|
||||
amr7 : L:d8d14000 P:00000000 : L:00000000 P:00000000
|
||||
amr8 : L:d8d18000 P:00000000
|
||||
amr9 : L:d8d1c000 P:00000000
|
||||
amr10: L:d8d20000 P:00000000
|
||||
amr11: L:e0000000 P:e0000ccd
|
||||
|
||||
(*) The current task's page directory is bound to DAMR3.
|
||||
|
||||
This can be viewed with the _pgd GDB macro:
|
||||
|
||||
(gdb) _pgd
|
||||
$3 = {{pge = {{ste = {0x554001, 0x554101, 0x554201, 0x554301, 0x554401,
|
||||
0x554501, 0x554601, 0x554701, 0x554801, 0x554901, 0x554a01,
|
||||
0x554b01, 0x554c01, 0x554d01, 0x554e01, 0x554f01, 0x555001,
|
||||
0x555101, 0x555201, 0x555301, 0x555401, 0x555501, 0x555601,
|
||||
0x555701, 0x555801, 0x555901, 0x555a01, 0x555b01, 0x555c01,
|
||||
0x555d01, 0x555e01, 0x555f01, 0x556001, 0x556101, 0x556201,
|
||||
0x556301, 0x556401, 0x556501, 0x556601, 0x556701, 0x556801,
|
||||
0x556901, 0x556a01, 0x556b01, 0x556c01, 0x556d01, 0x556e01,
|
||||
0x556f01, 0x557001, 0x557101, 0x557201, 0x557301, 0x557401,
|
||||
0x557501, 0x557601, 0x557701, 0x557801, 0x557901, 0x557a01,
|
||||
0x557b01, 0x557c01, 0x557d01, 0x557e01, 0x557f01}}}}, {pge = {{
|
||||
ste = {0x0 <repeats 64 times>}}}} <repeats 51 times>, {pge = {{ste = {
|
||||
0x248001, 0x248101, 0x248201, 0x248301, 0x248401, 0x248501,
|
||||
0x248601, 0x248701, 0x248801, 0x248901, 0x248a01, 0x248b01,
|
||||
0x248c01, 0x248d01, 0x248e01, 0x248f01, 0x249001, 0x249101,
|
||||
0x249201, 0x249301, 0x249401, 0x249501, 0x249601, 0x249701,
|
||||
0x249801, 0x249901, 0x249a01, 0x249b01, 0x249c01, 0x249d01,
|
||||
0x249e01, 0x249f01, 0x24a001, 0x24a101, 0x24a201, 0x24a301,
|
||||
0x24a401, 0x24a501, 0x24a601, 0x24a701, 0x24a801, 0x24a901,
|
||||
0x24aa01, 0x24ab01, 0x24ac01, 0x24ad01, 0x24ae01, 0x24af01,
|
||||
0x24b001, 0x24b101, 0x24b201, 0x24b301, 0x24b401, 0x24b501,
|
||||
0x24b601, 0x24b701, 0x24b801, 0x24b901, 0x24ba01, 0x24bb01,
|
||||
0x24bc01, 0x24bd01, 0x24be01, 0x24bf01}}}}, {pge = {{ste = {
|
||||
0x0 <repeats 64 times>}}}} <repeats 11 times>}
|
||||
|
||||
(*) The PTD last used by the instruction TLB miss handler is attached to DAMR4.
|
||||
(*) The PTD last used by the data TLB miss handler is attached to DAMR5.
|
||||
|
||||
These can be viewed with the _ptd_i and _ptd_d GDB macros:
|
||||
|
||||
(gdb) _ptd_d
|
||||
$5 = {{pte = 0x0} <repeats 127 times>, {pte = 0x539b01}, {
|
||||
pte = 0x0} <repeats 896 times>, {pte = 0x719303}, {pte = 0x6d5303}, {
|
||||
pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
|
||||
pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x6a1303}, {
|
||||
pte = 0x0} <repeats 12 times>, {pte = 0x709303}, {pte = 0x0}, {pte = 0x0},
|
||||
{pte = 0x6fd303}, {pte = 0x6f9303}, {pte = 0x6f5303}, {pte = 0x0}, {
|
||||
pte = 0x6ed303}, {pte = 0x531b01}, {pte = 0x50db01}, {
|
||||
pte = 0x0} <repeats 13 times>, {pte = 0x5303}, {pte = 0x7f5303}, {
|
||||
pte = 0x509b01}, {pte = 0x505b01}, {pte = 0x7c9303}, {pte = 0x7b9303}, {
|
||||
pte = 0x7b5303}, {pte = 0x7b1303}, {pte = 0x7ad303}, {pte = 0x0}, {
|
||||
pte = 0x0}, {pte = 0x7a1303}, {pte = 0x0}, {pte = 0x795303}, {pte = 0x0}, {
|
||||
pte = 0x78d303}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {pte = 0x0}, {
|
||||
pte = 0x0}, {pte = 0x775303}, {pte = 0x771303}, {pte = 0x76d303}, {
|
||||
pte = 0x0}, {pte = 0x765303}, {pte = 0x7c5303}, {pte = 0x501b01}, {
|
||||
pte = 0x4f1b01}, {pte = 0x4edb01}, {pte = 0x0}, {pte = 0x4f9b01}, {
|
||||
pte = 0x4fdb01}, {pte = 0x0} <repeats 2992 times>}
|
||||
|
|
@ -0,0 +1,21 @@
|
|||
========================
|
||||
GPU Driver Documentation
|
||||
========================
|
||||
|
||||
.. toctree::
|
||||
|
||||
i915
|
||||
meson
|
||||
pl111
|
||||
tegra
|
||||
tinydrm
|
||||
tve200
|
||||
vc4
|
||||
bridge/dw-hdmi
|
||||
|
||||
.. only:: subproject and html
|
||||
|
||||
Indices
|
||||
=======
|
||||
|
||||
* :ref:`genindex`
|
||||
|
|
@ -286,6 +286,9 @@ Atomic Mode Setting Function Reference
|
|||
.. kernel-doc:: drivers/gpu/drm/drm_atomic.c
|
||||
:export:
|
||||
|
||||
.. kernel-doc:: drivers/gpu/drm/drm_atomic.c
|
||||
:internal:
|
||||
|
||||
CRTC Abstraction
|
||||
================
|
||||
|
||||
|
|
@ -547,8 +550,9 @@ Explicit Fencing Properties
|
|||
Existing KMS Properties
|
||||
-----------------------
|
||||
|
||||
The following table gives description of drm properties exposed by
|
||||
various modules/drivers.
|
||||
The following table gives description of drm properties exposed by various
|
||||
modules/drivers. Because this table is very unwieldy, do not add any new
|
||||
properties here. Instead document them in a section above.
|
||||
|
||||
.. csv-table::
|
||||
:header-rows: 1
|
||||
|
|
|
|||
|
|
@ -10,16 +10,9 @@ Linux GPU Driver Developer's Guide
|
|||
drm-kms
|
||||
drm-kms-helpers
|
||||
drm-uapi
|
||||
i915
|
||||
meson
|
||||
pl111
|
||||
tegra
|
||||
tinydrm
|
||||
tve200
|
||||
vc4
|
||||
drivers
|
||||
vga-switcheroo
|
||||
vgaarbiter
|
||||
bridge/dw-hdmi
|
||||
todo
|
||||
|
||||
.. only:: subproject and html
|
||||
|
|
|
|||
|
|
@ -1,5 +1,4 @@
|
|||
Owner Module/Drivers,Group,Property Name,Type,Property Values,Object attached,Description/Restrictions
|
||||
,,“scaling mode”,ENUM,"{ ""None"", ""Full"", ""Center"", ""Full aspect"" }",Connector,"Supported by: amdgpu, gma500, i915, nouveau and radeon."
|
||||
,DVI-I,“subconnector”,ENUM,"{ “Unknown”, “DVI-D”, “DVI-A” }",Connector,TBD
|
||||
,,“select subconnector”,ENUM,"{ “Automatic”, “DVI-D”, “DVI-A” }",Connector,TBD
|
||||
,TV,“subconnector”,ENUM,"{ ""Unknown"", ""Composite"", ""SVIDEO"", ""Component"", ""SCART"" }",Connector,TBD
|
||||
|
|
|
|||
|
Some files were not shown because too many files have changed in this diff Show More
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Reference in New Issue