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irqchip: mips-gic: Simplify shared interrupt pending/mask reads 

Simplify the reads of the bitmaps indicating pending & masked interrupts
in gic_handle_shared_int() using the __ioread32_copy() &
__ioread64_copy() helper functions.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17026/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2017-08-12 21:36:16 -07:00 committed by Ralf Baechle
parent d8c825e2a0
commit e98fcb2a8c
2 changed files with 11 additions and 24 deletions
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29
drivers/irqchip/irq-mips-gic.c
View File

@ -225,31 +225,24 @@ int gic_get_usm_range(struct resource *gic_usm_res)
static void gic_handle_shared_int(bool chained)
{
unsigned int i, intr, virq, gic_reg_step = mips_cm_is64 ? 8 : 4;
unsigned int intr, virq;
unsigned long *pcpu_mask;
unsigned long pending_reg, intrmask_reg;
DECLARE_BITMAP(pending, GIC_MAX_INTRS);
DECLARE_BITMAP(intrmask, GIC_MAX_INTRS);
/* Get per-cpu bitmaps */
pcpu_mask = pcpu_masks[smp_processor_id()].pcpu_mask;
pending_reg = GIC_REG(SHARED, GIC_SH_PEND);
intrmask_reg = GIC_REG(SHARED, GIC_SH_MASK);
for (i = 0; i < BITS_TO_LONGS(gic_shared_intrs); i++) {
pending[i] = gic_read(pending_reg);
intrmask[i] = gic_read(intrmask_reg);
pending_reg += gic_reg_step;
intrmask_reg += gic_reg_step;
if (!IS_ENABLED(CONFIG_64BIT) || mips_cm_is64)
continue;
pending[i] |= (u64)gic_read(pending_reg) << 32;
intrmask[i] |= (u64)gic_read(intrmask_reg) << 32;
pending_reg += gic_reg_step;
intrmask_reg += gic_reg_step;
if (mips_cm_is64) {
__ioread64_copy(pending, addr_gic_pend(),
DIV_ROUND_UP(gic_shared_intrs, 64));
__ioread64_copy(intrmask, addr_gic_mask(),
DIV_ROUND_UP(gic_shared_intrs, 64));
} else {
__ioread32_copy(pending, addr_gic_pend(),
DIV_ROUND_UP(gic_shared_intrs, 32));
__ioread32_copy(intrmask, addr_gic_mask(),
DIV_ROUND_UP(gic_shared_intrs, 32));
}
bitmap_and(pending, pending, intrmask, gic_shared_intrs);

6
include/linux/irqchip/mips-gic.h
View File

@ -68,12 +68,6 @@
#define GIC_SH_RMASK_OFS 0x0300
#define GIC_SH_SMASK_OFS 0x0380
/* Global Interrupt Mask Register (RO) - Bit Set == Interrupt enabled */
#define GIC_SH_MASK_OFS 0x0400
/* Pending Global Interrupts (RO) */
#define GIC_SH_PEND_OFS 0x0480
/* Maps Interrupt X to a Pin */
#define GIC_SH_INTR_MAP_TO_PIN_BASE_OFS 0x0500
#define GIC_SH_MAP_TO_PIN(intr) (4 * (intr))