ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug
Dont assume that all OMAP4+ code will be able to use OMAP4 hotplug logic. On OMAP5, DRA7, we do not need this in place yet, also, currently the CPU startup pointer is located in omap4_cpu_pm_info instead of cpu_pm_ops. So, isolate the function to hotplug_restart pointer in cpu_pm_ops where it should have belonged, initalize them as per valid startup pointers for OMAP4430/60 as in current logic, however provide dummy_cpu_resume to be the startup location as well. Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: split this out of original code and isolate it] Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org>
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@ -69,7 +69,6 @@ struct omap4_cpu_pm_info {
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void __iomem *scu_sar_addr;
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void __iomem *wkup_sar_addr;
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void __iomem *l2x0_sar_addr;
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void (*secondary_startup)(void);
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};
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/**
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@ -77,6 +76,7 @@ struct omap4_cpu_pm_info {
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* @finish_suspend: CPU suspend finisher function pointer
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* @resume: CPU resume function pointer
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* @scu_prepare: CPU Snoop Control program function pointer
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* @hotplug_restart: CPU restart function pointer
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*
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* Structure holds functions pointer for CPU low power operations like
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* suspend, resume and scu programming.
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@ -85,6 +85,7 @@ struct cpu_pm_ops {
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int (*finish_suspend)(unsigned long cpu_state);
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void (*resume)(void);
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void (*scu_prepare)(unsigned int cpu_id, unsigned int cpu_state);
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void (*hotplug_restart)(void);
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};
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static DEFINE_PER_CPU(struct omap4_cpu_pm_info, omap4_pm_info);
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@ -108,6 +109,7 @@ struct cpu_pm_ops omap_pm_ops = {
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.finish_suspend = default_finish_suspend,
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.resume = dummy_cpu_resume,
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.scu_prepare = dummy_scu_prepare,
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.hotplug_restart = dummy_cpu_resume,
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};
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/*
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@ -312,7 +314,7 @@ int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
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pwrdm_clear_all_prev_pwrst(pm_info->pwrdm);
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pwrdm_set_next_pwrst(pm_info->pwrdm, power_state);
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set_cpu_wakeup_addr(cpu, virt_to_phys(pm_info->secondary_startup));
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set_cpu_wakeup_addr(cpu, virt_to_phys(omap_pm_ops.hotplug_restart));
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omap_pm_ops.scu_prepare(cpu, power_state);
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/*
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@ -385,10 +387,6 @@ int __init omap4_mpuss_init(void)
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CPU1_WAKEUP_NS_PA_ADDR_OFFSET;
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pm_info->l2x0_sar_addr = sar_base + L2X0_SAVE_OFFSET1;
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}
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if (cpu_is_omap446x())
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pm_info->secondary_startup = omap4460_secondary_startup;
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else
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pm_info->secondary_startup = omap4_secondary_startup;
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pm_info->pwrdm = pwrdm_lookup("cpu1_pwrdm");
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if (!pm_info->pwrdm) {
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@ -422,12 +420,16 @@ int __init omap4_mpuss_init(void)
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omap_pm_ops.finish_suspend = omap4_finish_suspend;
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omap_pm_ops.resume = omap4_cpu_resume;
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omap_pm_ops.scu_prepare = scu_pwrst_prepare;
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omap_pm_ops.hotplug_restart = omap4_secondary_startup;
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cpu_context_offset = OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET;
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} else if (soc_is_omap54xx() || soc_is_dra7xx()) {
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cpu_context_offset = OMAP54XX_RM_CPU0_CPU0_CONTEXT_OFFSET;
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enable_mercury_retention_mode();
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}
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if (cpu_is_omap446x())
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omap_pm_ops.hotplug_restart = omap4460_secondary_startup;
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return 0;
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}
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