watchdog: Add Xilinx watchdog timer driver
Watchdog timer device driver for Xilinx xps_timebase_wdt compatible ip cores. It takes watchdog timer configuration from device tree and it needs that its parent has defined the property "clock-frecuency". It is compatible with watchdog timer kernel API, so user apps like watchdogd may talk with it. Signed-off-by: Alejandro Cabrera <aldaya@gmail.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Alejandro Cabrera
Wim Van Sebroeck
parent
2fc5d52b21
commit
e9659e69b0
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@ -888,6 +888,20 @@ config M54xx_WATCHDOG
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To compile this driver as a module, choose M here: the
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module will be called m54xx_wdt.
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# MicroBlaze Architecture
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config XILINX_WATCHDOG
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tristate "Xilinx Watchdog timer"
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depends on MICROBLAZE
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---help---
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Watchdog driver for the xps_timebase_wdt ip core.
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IMPORTANT: The xps_timebase_wdt parent must have the property
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"clock-frequency" at device tree.
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To compile this driver as a module, choose M here: the
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module will be called of_xilinx_wdt.
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# MIPS Architecture
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config ATH79_WDT
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@ -110,6 +110,9 @@ obj-$(CONFIG_INTEL_SCU_WATCHDOG) += intel_scu_watchdog.o
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# M68K Architecture
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obj-$(CONFIG_M54xx_WATCHDOG) += m54xx_wdt.o
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# MicroBlaze Architecture
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obj-$(CONFIG_XILINX_WATCHDOG) += of_xilinx_wdt.o
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# MIPS Architecture
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obj-$(CONFIG_ATH79_WDT) += ath79_wdt.o
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obj-$(CONFIG_BCM47XX_WDT) += bcm47xx_wdt.o
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@ -0,0 +1,433 @@
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/*
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* of_xilinx_wdt.c 1.01 A Watchdog Device Driver for Xilinx xps_timebase_wdt
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*
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* (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
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*
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* -----------------------
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* -----------------------
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* 30-May-2011 Alejandro Cabrera <aldaya@gmail.com>
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* - If "xlnx,wdt-enable-once" wasn't found on device tree the
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* module will use CONFIG_WATCHDOG_NOWAYOUT
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* - If the device tree parameters ("clock-frequency" and
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* "xlnx,wdt-interval") wasn't found the driver won't
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* know the wdt reset interval
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/miscdevice.h>
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/watchdog.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_address.h>
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/* Register offsets for the Wdt device */
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#define XWT_TWCSR0_OFFSET 0x0 /* Control/Status Register0 */
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#define XWT_TWCSR1_OFFSET 0x4 /* Control/Status Register1 */
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#define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
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/* Control/Status Register Masks */
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#define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
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#define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
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#define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
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/* Control/Status Register 0/1 bits */
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#define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
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/* SelfTest constants */
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#define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
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#define XWT_TIMER_FAILED 0xFFFFFFFF
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#define WATCHDOG_NAME "Xilinx Watchdog"
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#define PFX WATCHDOG_NAME ": "
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struct xwdt_device {
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struct resource res;
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void __iomem *base;
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u32 nowayout;
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u32 wdt_interval;
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u32 boot_status;
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};
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static struct xwdt_device xdev;
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static u32 timeout;
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static u32 control_status_reg;
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static u8 expect_close;
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static u8 no_timeout;
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static unsigned long driver_open;
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static DEFINE_SPINLOCK(spinlock);
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static void xwdt_start(void)
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{
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spin_lock(&spinlock);
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/* Clean previous status and enable the watchdog timer */
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control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
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control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
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iowrite32((control_status_reg | XWT_CSR0_EWDT1_MASK),
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xdev.base + XWT_TWCSR0_OFFSET);
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iowrite32(XWT_CSRX_EWDT2_MASK, xdev.base + XWT_TWCSR1_OFFSET);
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spin_unlock(&spinlock);
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}
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static void xwdt_stop(void)
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{
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spin_lock(&spinlock);
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control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
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iowrite32((control_status_reg & ~XWT_CSR0_EWDT1_MASK),
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xdev.base + XWT_TWCSR0_OFFSET);
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iowrite32(0, xdev.base + XWT_TWCSR1_OFFSET);
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spin_unlock(&spinlock);
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printk(KERN_INFO PFX "Stopped!\n");
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}
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static void xwdt_keepalive(void)
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{
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spin_lock(&spinlock);
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control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
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control_status_reg |= (XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK);
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iowrite32(control_status_reg, xdev.base + XWT_TWCSR0_OFFSET);
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spin_unlock(&spinlock);
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}
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static void xwdt_get_status(int *status)
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{
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int new_status;
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spin_lock(&spinlock);
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control_status_reg = ioread32(xdev.base + XWT_TWCSR0_OFFSET);
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new_status = ((control_status_reg &
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(XWT_CSR0_WRS_MASK | XWT_CSR0_WDS_MASK)) != 0);
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spin_unlock(&spinlock);
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*status = 0;
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if (new_status & 1)
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*status |= WDIOF_CARDRESET;
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}
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static u32 xwdt_selftest(void)
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{
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int i;
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u32 timer_value1;
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u32 timer_value2;
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spin_lock(&spinlock);
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timer_value1 = ioread32(xdev.base + XWT_TBR_OFFSET);
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timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
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for (i = 0;
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((i <= XWT_MAX_SELFTEST_LOOP_COUNT) &&
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(timer_value2 == timer_value1)); i++) {
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timer_value2 = ioread32(xdev.base + XWT_TBR_OFFSET);
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}
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spin_unlock(&spinlock);
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if (timer_value2 != timer_value1)
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return ~XWT_TIMER_FAILED;
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else
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return XWT_TIMER_FAILED;
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}
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static int xwdt_open(struct inode *inode, struct file *file)
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{
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/* Only one process can handle the wdt at a time */
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if (test_and_set_bit(0, &driver_open))
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return -EBUSY;
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/* Make sure that the module are always loaded...*/
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if (xdev.nowayout)
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__module_get(THIS_MODULE);
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xwdt_start();
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printk(KERN_INFO PFX "Started...\n");
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return nonseekable_open(inode, file);
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}
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static int xwdt_release(struct inode *inode, struct file *file)
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{
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if (expect_close == 42) {
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xwdt_stop();
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} else {
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printk(KERN_CRIT PFX
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"Unexpected close, not stopping watchdog!\n");
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xwdt_keepalive();
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}
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clear_bit(0, &driver_open);
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expect_close = 0;
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return 0;
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}
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/*
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* xwdt_write:
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* @file: file handle to the watchdog
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* @buf: buffer to write (unused as data does not matter here
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* @count: count of bytes
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* @ppos: pointer to the position to write. No seeks allowed
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*
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* A write to a watchdog device is defined as a keepalive signal. Any
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* write of data will do, as we don't define content meaning.
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*/
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static ssize_t xwdt_write(struct file *file, const char __user *buf,
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size_t len, loff_t *ppos)
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{
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if (len) {
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if (!xdev.nowayout) {
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size_t i;
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/* In case it was set long ago */
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expect_close = 0;
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for (i = 0; i != len; i++) {
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char c;
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if (get_user(c, buf + i))
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return -EFAULT;
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if (c == 'V')
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expect_close = 42;
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}
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}
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xwdt_keepalive();
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}
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return len;
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}
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static const struct watchdog_info ident = {
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.options = WDIOF_MAGICCLOSE |
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WDIOF_KEEPALIVEPING,
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.firmware_version = 1,
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.identity = WATCHDOG_NAME,
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};
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/*
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* xwdt_ioctl:
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* @file: file handle to the device
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* @cmd: watchdog command
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* @arg: argument pointer
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*
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* The watchdog API defines a common set of functions for all watchdogs
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* according to their available features.
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*/
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static long xwdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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{
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int status;
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union {
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struct watchdog_info __user *ident;
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int __user *i;
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} uarg;
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uarg.i = (int __user *)arg;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(uarg.ident, &ident,
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sizeof(ident)) ? -EFAULT : 0;
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case WDIOC_GETBOOTSTATUS:
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return put_user(xdev.boot_status, uarg.i);
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case WDIOC_GETSTATUS:
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xwdt_get_status(&status);
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return put_user(status, uarg.i);
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case WDIOC_KEEPALIVE:
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xwdt_keepalive();
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return 0;
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case WDIOC_GETTIMEOUT:
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if (no_timeout)
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return -ENOTTY;
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else
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return put_user(timeout, uarg.i);
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default:
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return -ENOTTY;
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}
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}
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static const struct file_operations xwdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.write = xwdt_write,
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.open = xwdt_open,
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.release = xwdt_release,
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.unlocked_ioctl = xwdt_ioctl,
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};
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static struct miscdevice xwdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &xwdt_fops,
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};
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static int __devinit xwdt_probe(struct platform_device *pdev)
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{
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int rc;
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u32 *tmptr;
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u32 *pfreq;
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no_timeout = 0;
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pfreq = (u32 *)of_get_property(pdev->dev.of_node->parent,
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"clock-frequency", NULL);
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if (pfreq == NULL) {
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printk(KERN_WARNING PFX
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"The watchdog clock frequency cannot be obtained!\n");
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no_timeout = 1;
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}
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rc = of_address_to_resource(pdev->dev.of_node, 0, &xdev.res);
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if (rc) {
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printk(KERN_WARNING PFX "invalid address!\n");
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return rc;
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}
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tmptr = (u32 *)of_get_property(pdev->dev.of_node,
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"xlnx,wdt-interval", NULL);
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if (tmptr == NULL) {
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printk(KERN_WARNING PFX "Parameter \"xlnx,wdt-interval\""
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" not found in device tree!\n");
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no_timeout = 1;
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} else {
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xdev.wdt_interval = *tmptr;
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}
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tmptr = (u32 *)of_get_property(pdev->dev.of_node,
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"xlnx,wdt-enable-once", NULL);
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if (tmptr == NULL) {
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printk(KERN_WARNING PFX "Parameter \"xlnx,wdt-enable-once\""
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" not found in device tree!\n");
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xdev.nowayout = WATCHDOG_NOWAYOUT;
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}
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/*
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* Twice of the 2^wdt_interval / freq because the first wdt overflow is
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* ignored (interrupt), reset is only generated at second wdt overflow
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*/
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if (!no_timeout)
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timeout = 2 * ((1<<xdev.wdt_interval) / *pfreq);
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if (!request_mem_region(xdev.res.start,
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xdev.res.end - xdev.res.start + 1, WATCHDOG_NAME)) {
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rc = -ENXIO;
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printk(KERN_ERR PFX "memory request failure!\n");
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goto err_out;
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}
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xdev.base = ioremap(xdev.res.start, xdev.res.end - xdev.res.start + 1);
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if (xdev.base == NULL) {
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rc = -ENOMEM;
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printk(KERN_ERR PFX "ioremap failure!\n");
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goto release_mem;
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}
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rc = xwdt_selftest();
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if (rc == XWT_TIMER_FAILED) {
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printk(KERN_ERR PFX "SelfTest routine error!\n");
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goto unmap_io;
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}
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xwdt_get_status(&xdev.boot_status);
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rc = misc_register(&xwdt_miscdev);
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if (rc) {
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printk(KERN_ERR PFX
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"cannot register miscdev on minor=%d (err=%d)\n",
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xwdt_miscdev.minor, rc);
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goto unmap_io;
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}
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if (no_timeout)
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printk(KERN_INFO PFX
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"driver loaded (timeout=? sec, nowayout=%d)\n",
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xdev.nowayout);
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else
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printk(KERN_INFO PFX
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"driver loaded (timeout=%d sec, nowayout=%d)\n",
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timeout, xdev.nowayout);
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expect_close = 0;
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clear_bit(0, &driver_open);
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return 0;
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unmap_io:
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iounmap(xdev.base);
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release_mem:
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release_mem_region(xdev.res.start, resource_size(&xdev.res));
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err_out:
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return rc;
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}
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static int __devexit xwdt_remove(struct platform_device *dev)
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{
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misc_deregister(&xwdt_miscdev);
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iounmap(xdev.base);
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release_mem_region(xdev.res.start, resource_size(&xdev.res));
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return 0;
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}
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/* Match table for of_platform binding */
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static struct of_device_id __devinitdata xwdt_of_match[] = {
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{ .compatible = "xlnx,xps-timebase-wdt-1.01.a", },
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{},
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};
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MODULE_DEVICE_TABLE(of, xwdt_of_match);
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static struct platform_driver xwdt_driver = {
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.probe = xwdt_probe,
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.remove = __devexit_p(xwdt_remove),
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.driver = {
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.owner = THIS_MODULE,
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.name = WATCHDOG_NAME,
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.of_match_table = xwdt_of_match,
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},
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};
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static int __init xwdt_init(void)
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{
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return platform_driver_register(&xwdt_driver);
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}
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static void __exit xwdt_exit(void)
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{
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platform_driver_unregister(&xwdt_driver);
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}
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module_init(xwdt_init);
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module_exit(xwdt_exit);
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MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
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MODULE_DESCRIPTION("Xilinx Watchdog driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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