powerpc: Add cputable entry for POWER7
Add a cputable entry for the POWER7 processor. Also tell firmware that we know about POWER7. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Joel Schopp <jschopp@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -53,6 +53,8 @@ extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_pa6t(void);
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extern void __restore_cpu_ppc970(void);
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extern void __restore_cpu_ppc970(void);
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extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
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extern void __restore_cpu_power7(void);
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#endif /* CONFIG_PPC64 */
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#endif /* CONFIG_PPC64 */
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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/* This table only contains "desktop" CPUs, it need to be filled with embedded
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@ -69,6 +71,9 @@ extern void __restore_cpu_ppc970(void);
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#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_TRUE_LE)
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PPC_FEATURE_TRUE_LE)
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#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
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PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
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PPC_FEATURE_TRUE_LE)
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#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
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#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_TRUE_LE | \
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PPC_FEATURE_HAS_ALTIVEC_COMP)
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PPC_FEATURE_HAS_ALTIVEC_COMP)
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@ -381,6 +386,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
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.machine_check = machine_check_generic,
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.machine_check = machine_check_generic,
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.platform = "power6",
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.platform = "power6",
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},
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},
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{ /* Power7 */
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x003f0000,
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.cpu_name = "POWER7",
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.cpu_features = CPU_FTRS_POWER7,
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.cpu_user_features = COMMON_USER_POWER7,
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.icache_bsize = 128,
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.dcache_bsize = 128,
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.num_pmcs = 6,
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.pmc_type = PPC_PMC_IBM,
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.cpu_setup = __setup_cpu_power7,
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.cpu_restore = __restore_cpu_power7,
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.oprofile_cpu_type = "ppc64/power7",
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.oprofile_type = PPC_OPROFILE_POWER4,
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.oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
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.oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
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.oprofile_mmcra_clear = POWER6_MMCRA_THRM |
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POWER6_MMCRA_OTHER,
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.platform = "power7",
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},
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{ /* Cell Broadband Engine */
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{ /* Cell Broadband Engine */
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.pvr_mask = 0xffff0000,
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.pvr_mask = 0xffff0000,
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.pvr_value = 0x00700000,
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.pvr_value = 0x00700000,
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@ -116,3 +116,8 @@ _GLOBAL(longjmp)
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mtlr r0
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mtlr r0
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mr r3,r4
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mr r3,r4
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blr
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blr
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_GLOBAL(__setup_cpu_power7)
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_GLOBAL(__restore_cpu_power7)
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/* place holder */
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blr
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@ -650,6 +650,7 @@ static void __init early_cmdline_parse(void)
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static unsigned char ibm_architecture_vec[] = {
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static unsigned char ibm_architecture_vec[] = {
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W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
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W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
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W(0xffff0000), W(0x003e0000), /* POWER6 */
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W(0xffff0000), W(0x003e0000), /* POWER6 */
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W(0xffff0000), W(0x003f0000), /* POWER7 */
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W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
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W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
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W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
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W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
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5 - 1, /* 5 option vectors */
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5 - 1, /* 5 option vectors */
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@ -26,6 +26,7 @@
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#define PPC_FEATURE_PA6T 0x00000800
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#define PPC_FEATURE_PA6T 0x00000800
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#define PPC_FEATURE_HAS_DFP 0x00000400
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#define PPC_FEATURE_HAS_DFP 0x00000400
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#define PPC_FEATURE_POWER6_EXT 0x00000200
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#define PPC_FEATURE_POWER6_EXT 0x00000200
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#define PPC_FEATURE_ARCH_2_06 0x00000100
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#define PPC_FEATURE_TRUE_LE 0x00000002
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#define PPC_FEATURE_TRUE_LE 0x00000002
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#define PPC_FEATURE_PPC_LE 0x00000001
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#define PPC_FEATURE_PPC_LE 0x00000001
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@ -379,6 +380,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
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CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
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CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
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CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
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CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
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CPU_FTR_DSCR)
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CPU_FTR_DSCR)
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#define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | \
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CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
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CPU_FTR_MMCRA | CPU_FTR_SMT | \
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CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
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CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
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CPU_FTR_DSCR)
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#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \
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#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \
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CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
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CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
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CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
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CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
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@ -394,7 +401,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
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#define CPU_FTRS_POSSIBLE \
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#define CPU_FTRS_POSSIBLE \
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(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
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(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
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CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
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CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
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CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT)
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CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T | \
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CPU_FTR_1T_SEGMENT)
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#else
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#else
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enum {
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enum {
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CPU_FTRS_POSSIBLE =
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CPU_FTRS_POSSIBLE =
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@ -434,7 +442,7 @@ enum {
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#define CPU_FTRS_ALWAYS \
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#define CPU_FTRS_ALWAYS \
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(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
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(CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 & \
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CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
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CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 & \
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CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
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CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
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#else
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#else
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enum {
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enum {
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CPU_FTRS_ALWAYS =
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CPU_FTRS_ALWAYS =
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