ARM: MX3: make CPU revision number detection work on all boards
Commit 52939c03
(ARM: MX3: fix CPU revision number detection) started
using the CPU's SREV register for revision number detection. This
makes it mandatory to have a valid SPBA0 mapping. Add this to the
global map_io code instead of adding multiple copies for each board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Tested on Qong (EVB-Lite)
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -65,6 +65,11 @@ static struct map_desc mxc_io_desc[] __initdata = {
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.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
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.length = AIPS2_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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},
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};
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@ -494,11 +494,6 @@ static void mxc_init_i2c(void)
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*/
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static struct map_desc mx31ads_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = CS4_SIZE / 2,
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@ -212,11 +212,6 @@ static struct platform_device physmap_flash_device = {
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*/
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static struct map_desc mx31lite_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = CS4_SIZE,
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@ -211,11 +211,6 @@ static int __init mx31pdk_init_expio(void)
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*/
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static struct map_desc mx31pdk_io_desc[] __initdata = {
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{
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED,
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}, {
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.virtual = CS5_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS5_BASE_ADDR),
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.length = CS5_SIZE,
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