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thermal: armada: Remove support for A375-Z1 SoC 

The Armada 375 Z1 SoC revision is no longer supported. This commit
removes the quirk needed for the thermal sensor.

Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
This commit is contained in:
Ezequiel Garcia 2014-11-04 13:00:38 -03:00 committed by Eduardo Valentin
parent cbac8f6394
commit e920f9b632
2 changed files with 0 additions and 28 deletions
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8
Documentation/devicetree/bindings/thermal/armada-thermal.txt
View File

@ -5,17 +5,9 @@ Required properties:
- compatible: Should be set to one of the following: - compatible: Should be set to one of the following:
marvell,armada370-thermal marvell,armada370-thermal
marvell,armada375-thermal marvell,armada375-thermal
marvell,armada375-z1-thermal
marvell,armada380-thermal marvell,armada380-thermal
marvell,armadaxp-thermal marvell,armadaxp-thermal
Note: As the name suggests, "marvell,armada375-z1-thermal"
applies for the SoC Z1 stepping only. On such stepping
some quirks need to be done and the register offset differs
from the one in the A0 stepping.
The operating system may auto-detect the SoC stepping and
update the compatible and register offsets at runtime.
- reg: Device's register space. - reg: Device's register space.
Two entries are expected, see the examples below. Two entries are expected, see the examples below.
The first one is required for the sensor register; The first one is required for the sensor register;

20
drivers/thermal/armada_thermal.c
View File

@ -35,10 +35,6 @@
#define PMU_TDC0_OTF_CAL_MASK (0x1 << 30) #define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
#define PMU_TDC0_START_CAL_MASK (0x1 << 25) #define PMU_TDC0_START_CAL_MASK (0x1 << 25)
#define A375_Z1_CAL_RESET_LSB 0x8011e214
#define A375_Z1_CAL_RESET_MSB 0x30a88019
#define A375_Z1_WORKAROUND_BIT BIT(9)
#define A375_UNIT_CONTROL_SHIFT 27 #define A375_UNIT_CONTROL_SHIFT 27
#define A375_UNIT_CONTROL_MASK 0x7 #define A375_UNIT_CONTROL_MASK 0x7
#define A375_READOUT_INVERT BIT(15) #define A375_READOUT_INVERT BIT(15)
@ -124,24 +120,12 @@ static void armada375_init_sensor(struct platform_device *pdev,
struct armada_thermal_priv *priv) struct armada_thermal_priv *priv)
{ {
unsigned long reg; unsigned long reg;
bool quirk_needed =
!!of_device_is_compatible(pdev->dev.of_node,
"marvell,armada375-z1-thermal");
if (quirk_needed) {
/* Ensure these registers have the default (reset) values */
writel(A375_Z1_CAL_RESET_LSB, priv->control);
writel(A375_Z1_CAL_RESET_MSB, priv->control + 0x4);
}
reg = readl(priv->control + 4); reg = readl(priv->control + 4);
reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT); reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
reg &= ~A375_READOUT_INVERT; reg &= ~A375_READOUT_INVERT;
reg &= ~A375_HW_RESETn; reg &= ~A375_HW_RESETn;
if (quirk_needed)
reg |= A375_Z1_WORKAROUND_BIT;
writel(reg, priv->control + 4); writel(reg, priv->control + 4);
mdelay(20); mdelay(20);
@ -259,10 +243,6 @@ static const struct of_device_id armada_thermal_id_table[] = {
.compatible = "marvell,armada375-thermal", .compatible = "marvell,armada375-thermal",
.data = &armada375_data, .data = &armada375_data,
}, },
{
.compatible = "marvell,armada375-z1-thermal",
.data = &armada375_data,
},
{ {
.compatible = "marvell,armada380-thermal", .compatible = "marvell,armada380-thermal",
.data = &armada380_data, .data = &armada380_data,