drm/msm/adreno: split out helper to load fw
Prep work for the next patch. Signed-off-by: Rob Clark <robdclark@gmail.com>
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@ -26,8 +26,9 @@ static void a5xx_dump(struct msm_gpu *gpu);
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#define GPU_PAS_ID 13
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static int zap_shader_load_mdt(struct device *dev, const char *fwname)
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static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname)
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{
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struct device *dev = &gpu->pdev->dev;
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const struct firmware *fw;
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struct device_node *np;
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struct resource r;
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@ -55,10 +56,10 @@ static int zap_shader_load_mdt(struct device *dev, const char *fwname)
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mem_size = resource_size(&r);
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/* Request the MDT file for the firmware */
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ret = request_firmware(&fw, fwname, dev);
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if (ret) {
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fw = adreno_request_fw(to_adreno_gpu(gpu), fwname);
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if (IS_ERR(fw)) {
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DRM_DEV_ERROR(dev, "Unable to load %s\n", fwname);
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return ret;
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return PTR_ERR(fw);
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}
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/* Figure out how much memory we need */
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@ -381,7 +382,7 @@ static int a5xx_zap_shader_init(struct msm_gpu *gpu)
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return -ENODEV;
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}
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ret = zap_shader_load_mdt(&pdev->dev, adreno_gpu->info->zapfw);
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ret = zap_shader_load_mdt(gpu, adreno_gpu->info->zapfw);
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loaded = !ret;
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@ -264,7 +264,8 @@ void a5xx_gpmu_ucode_init(struct msm_gpu *gpu)
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return;
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/* Get the firmware */
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if (request_firmware(&fw, adreno_gpu->info->gpmufw, drm->dev)) {
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fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->gpmufw);
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if (IS_ERR(fw)) {
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DRM_ERROR("%s: Could not get GPMU firmware. GPMU will not be active\n",
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gpu->name);
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return;
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@ -64,29 +64,41 @@ int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value)
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}
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}
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static int adreno_load_fw(struct adreno_gpu *adreno_gpu)
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const struct firmware *
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adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname)
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{
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struct drm_device *drm = adreno_gpu->base.dev;
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const struct firmware *fw = NULL;
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int ret;
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ret = request_firmware(&fw, fwname, drm->dev);
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if (ret) {
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dev_err(drm->dev, "failed to load %s: %d\n", fwname, ret);
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return ERR_PTR(ret);
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}
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return fw;
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}
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static int adreno_load_fw(struct adreno_gpu *adreno_gpu)
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{
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const struct firmware *fw;
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if (adreno_gpu->pm4)
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return 0;
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ret = request_firmware(&adreno_gpu->pm4, adreno_gpu->info->pm4fw, drm->dev);
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if (ret) {
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dev_err(drm->dev, "failed to load %s PM4 firmware: %d\n",
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adreno_gpu->info->pm4fw, ret);
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return ret;
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}
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fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->pm4fw);
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if (IS_ERR(fw))
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return PTR_ERR(fw);
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adreno_gpu->pm4 = fw;
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ret = request_firmware(&adreno_gpu->pfp, adreno_gpu->info->pfpfw, drm->dev);
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if (ret) {
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dev_err(drm->dev, "failed to load %s PFP firmware: %d\n",
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adreno_gpu->info->pfpfw, ret);
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fw = adreno_request_fw(adreno_gpu, adreno_gpu->info->pfpfw);
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if (IS_ERR(fw)) {
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release_firmware(adreno_gpu->pm4);
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adreno_gpu->pm4 = NULL;
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return ret;
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return PTR_ERR(fw);
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}
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adreno_gpu->pfp = fw;
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return 0;
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}
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@ -196,6 +196,8 @@ static inline int adreno_is_a530(struct adreno_gpu *gpu)
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}
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int adreno_get_param(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
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const struct firmware *adreno_request_fw(struct adreno_gpu *adreno_gpu,
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const char *fwname);
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int adreno_hw_init(struct msm_gpu *gpu);
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uint32_t adreno_last_fence(struct msm_gpu *gpu);
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void adreno_recover(struct msm_gpu *gpu);
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