ARM: OMAP: hwmod: revise deassert sequence
For a reset sequence to complete cleanly, a module needs its associated clocks to be enabled, otherwise the timeout check in prcm code can print a false failure (failed to hardreset) that occurs because the clocks aren't powered ON and the status bit checked can't transition without them. Signed-off-by: Omar Ramirez Luna <omar.luna@linaro.org> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -1585,6 +1585,7 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
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{
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{
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struct omap_hwmod_rst_info ohri;
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struct omap_hwmod_rst_info ohri;
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int ret = -EINVAL;
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int ret = -EINVAL;
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int hwsup = 0;
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if (!oh)
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if (!oh)
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return -EINVAL;
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return -EINVAL;
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@ -1596,10 +1597,46 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
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if (IS_ERR_VALUE(ret))
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if (IS_ERR_VALUE(ret))
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return ret;
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return ret;
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if (oh->clkdm) {
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/*
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* A clockdomain must be in SW_SUP otherwise reset
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* might not be completed. The clockdomain can be set
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* in HW_AUTO only when the module become ready.
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*/
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hwsup = clkdm_in_hwsup(oh->clkdm);
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ret = clkdm_hwmod_enable(oh->clkdm, oh);
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if (ret) {
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WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
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oh->name, oh->clkdm->name, ret);
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return ret;
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}
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}
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_enable_clocks(oh);
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if (soc_ops.enable_module)
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soc_ops.enable_module(oh);
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ret = soc_ops.deassert_hardreset(oh, &ohri);
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ret = soc_ops.deassert_hardreset(oh, &ohri);
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if (soc_ops.disable_module)
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soc_ops.disable_module(oh);
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_disable_clocks(oh);
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if (ret == -EBUSY)
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if (ret == -EBUSY)
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pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
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pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
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if (!ret) {
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/*
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* Set the clockdomain to HW_AUTO, assuming that the
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* previous state was HW_AUTO.
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*/
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if (oh->clkdm && hwsup)
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clkdm_allow_idle(oh->clkdm);
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} else {
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if (oh->clkdm)
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clkdm_hwmod_disable(oh->clkdm, oh);
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}
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return ret;
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return ret;
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}
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}
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