x86: mach_summit to summit
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -30,7 +30,7 @@
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#include <linux/init.h>
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#include <asm/io.h>
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#include <asm/bios_ebda.h>
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#include <asm/mach-summit/mach_mpparse.h>
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#include <asm/summit/mpparse.h>
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static struct rio_table_hdr *rio_table_hdr __initdata;
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static struct scal_detail *scal_devs[MAX_NUMNODES] __initdata;
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@ -11,11 +11,11 @@
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#include <linux/kernel.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <asm/mach-summit/mach_apicdef.h>
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#include <asm/summit/apicdef.h>
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#include <linux/smp.h>
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#include <asm/mach-summit/mach_apic.h>
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#include <asm/mach-summit/mach_ipi.h>
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#include <asm/mach-summit/mach_mpparse.h>
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#include <asm/summit/apic.h>
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#include <asm/summit/ipi.h>
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#include <asm/summit/mpparse.h>
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static int probe_summit(void)
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{
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@ -1,13 +0,0 @@
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#ifndef ASM_X86__MACH_SUMMIT__MACH_APICDEF_H
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#define ASM_X86__MACH_SUMMIT__MACH_APICDEF_H
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#define APIC_ID_MASK (0xFF<<24)
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static inline unsigned get_apic_id(unsigned long x)
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{
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return (((x)>>24)&0xFF);
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}
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#define GET_APIC_ID(x) get_apic_id(x)
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#endif /* ASM_X86__MACH_SUMMIT__MACH_APICDEF_H */
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@ -1,5 +1,5 @@
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#ifndef ASM_X86__MACH_SUMMIT__MACH_APIC_H
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#define ASM_X86__MACH_SUMMIT__MACH_APIC_H
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#ifndef __ASM_SUMMIT_APIC_H
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#define __ASM_SUMMIT_APIC_H
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#include <asm/smp.h>
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@ -21,7 +21,7 @@ static inline cpumask_t target_cpus(void)
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* Just start on cpu 0. IRQ balancing will spread load
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*/
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return cpumask_of_cpu(0);
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}
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}
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#define TARGET_CPUS (target_cpus())
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#define INT_DELIVERY_MODE (dest_LowestPrio)
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@ -30,10 +30,10 @@ static inline cpumask_t target_cpus(void)
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static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
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{
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return 0;
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}
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}
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/* we don't use the phys_cpu_present_map to indicate apicid presence */
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static inline unsigned long check_apicid_present(int bit)
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static inline unsigned long check_apicid_present(int bit)
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{
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return 1;
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}
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@ -122,7 +122,7 @@ static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_id_map)
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static inline physid_mask_t apicid_to_cpu_present(int apicid)
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{
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return physid_mask_of_physid(apicid);
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return physid_mask_of_physid(0);
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}
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static inline void setup_portio_remap(void)
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@ -143,22 +143,22 @@ static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
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int num_bits_set;
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int cpus_found = 0;
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int cpu;
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int apicid;
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int apicid;
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num_bits_set = cpus_weight(cpumask);
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/* Return id to all */
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if (num_bits_set == NR_CPUS)
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return (int) 0xFF;
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/*
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* The cpus in the mask must all be on the apic cluster. If are not
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* on the same apicid cluster return default value of TARGET_CPUS.
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/*
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* The cpus in the mask must all be on the apic cluster. If are not
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* on the same apicid cluster return default value of TARGET_CPUS.
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*/
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cpu = first_cpu(cpumask);
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apicid = cpu_to_logical_apicid(cpu);
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while (cpus_found < num_bits_set) {
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if (cpu_isset(cpu, cpumask)) {
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int new_apicid = cpu_to_logical_apicid(cpu);
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if (apicid_cluster(apicid) !=
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if (apicid_cluster(apicid) !=
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apicid_cluster(new_apicid)){
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printk ("%s: Not a valid mask!\n",__FUNCTION__);
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return 0xFF;
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@ -182,4 +182,4 @@ static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
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return hard_smp_processor_id() >> index_msb;
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}
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#endif /* ASM_X86__MACH_SUMMIT__MACH_APIC_H */
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#endif /* __ASM_SUMMIT_APIC_H */
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@ -0,0 +1,13 @@
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#ifndef __ASM_SUMMIT_APICDEF_H
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#define __ASM_SUMMIT_APICDEF_H
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#define APIC_ID_MASK (0xFF<<24)
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static inline unsigned get_apic_id(unsigned long x)
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{
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return (x>>24)&0xFF;
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}
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#define GET_APIC_ID(x) get_apic_id(x)
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#endif
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@ -1,5 +1,5 @@
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#ifndef ASM_X86__MACH_SUMMIT__MACH_IPI_H
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#define ASM_X86__MACH_SUMMIT__MACH_IPI_H
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#ifndef __ASM_SUMMIT_IPI_H
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#define __ASM_SUMMIT_IPI_H
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void send_IPI_mask_sequence(cpumask_t mask, int vector);
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@ -22,4 +22,4 @@ static inline void send_IPI_all(int vector)
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send_IPI_mask(cpu_online_map, vector);
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}
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#endif /* ASM_X86__MACH_SUMMIT__MACH_IPI_H */
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#endif /* __ASM_SUMMIT_IPI_H */
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@ -1,5 +1,5 @@
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#ifndef ASM_X86__MACH_SUMMIT__IRQ_VECTORS_LIMITS_H
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#define ASM_X86__MACH_SUMMIT__IRQ_VECTORS_LIMITS_H
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#ifndef _ASM_IRQ_VECTORS_LIMITS_H
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#define _ASM_IRQ_VECTORS_LIMITS_H
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/*
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* For Summit or generic (i.e. installer) kernels, we have lots of I/O APICs,
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@ -11,4 +11,4 @@
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#define NR_IRQS 224
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#define NR_IRQ_VECTORS 1024
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#endif /* ASM_X86__MACH_SUMMIT__IRQ_VECTORS_LIMITS_H */
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#endif /* _ASM_IRQ_VECTORS_LIMITS_H */
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@ -1,7 +1,6 @@
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#ifndef ASM_X86__MACH_SUMMIT__MACH_MPPARSE_H
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#define ASM_X86__MACH_SUMMIT__MACH_MPPARSE_H
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#ifndef __ASM_SUMMIT_MPPARSE_H
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#define __ASM_SUMMIT_MPPARSE_H
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#include <mach_apic.h>
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#include <asm/tsc.h>
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extern int use_cyclone;
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@ -12,11 +11,11 @@ extern void setup_summit(void);
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#define setup_summit() {}
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#endif
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static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
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static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
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char *productid)
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{
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if (!strncmp(oem, "IBM ENSW", 8) &&
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(!strncmp(productid, "VIGIL SMP", 9)
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if (!strncmp(oem, "IBM ENSW", 8) &&
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(!strncmp(productid, "VIGIL SMP", 9)
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|| !strncmp(productid, "EXA", 3)
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|| !strncmp(productid, "RUTHLESS SMP", 12))){
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mark_tsc_unstable("Summit based system");
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@ -107,4 +106,4 @@ static inline int is_WPEG(struct rio_detail *rio){
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rio->type == LookOutAWPEG || rio->type == LookOutBWPEG);
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}
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#endif /* ASM_X86__MACH_SUMMIT__MACH_MPPARSE_H */
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#endif /* __ASM_SUMMIT_MPPARSE_H */
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