[ARM] 4351/1: AT91: Define rest of peripheral clocks
Define and register the remaining peripheral clocks for the AT91 processors. AT91SAM9261 clocks patch by Ivan Zhakov. Signed-off-by: Andrew Victor <andrew@sanpeople.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -117,6 +117,21 @@ static struct clk pioD_clk = {
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.pmc_mask = 1 << AT91RM9200_ID_PIOD,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91RM9200_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91RM9200_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc2_clk = {
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.name = "ssc2_clk",
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.pmc_mask = 1 << AT91RM9200_ID_SSC2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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.name = "tc0_clk",
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.pmc_mask = 1 << AT91RM9200_ID_TC0,
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@ -161,7 +176,9 @@ static struct clk *periph_clocks[] __initdata = {
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&udc_clk,
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&twi_clk,
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&spi_clk,
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// ssc 0 .. ssc2
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&ssc0_clk,
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&ssc1_clk,
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&ssc2_clk,
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&tc0_clk,
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&tc1_clk,
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&tc2_clk,
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@ -119,6 +119,11 @@ static struct clk spi1_clk = {
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.pmc_mask = 1 << AT91SAM9260_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc_clk = {
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.name = "ssc_clk",
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.pmc_mask = 1 << AT91SAM9260_ID_SSC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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.name = "tc0_clk",
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.pmc_mask = 1 << AT91SAM9260_ID_TC0,
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@ -193,7 +198,7 @@ static struct clk *periph_clocks[] __initdata = {
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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// ssc
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&ssc_clk,
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&tc0_clk,
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&tc1_clk,
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&tc2_clk,
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@ -97,6 +97,21 @@ static struct clk spi1_clk = {
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.pmc_mask = 1 << AT91SAM9261_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc2_clk = {
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.name = "ssc2_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_SSC2,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tc0_clk = {
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.name = "tc0_clk",
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.pmc_mask = 1 << AT91SAM9261_ID_TC0,
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@ -135,7 +150,9 @@ static struct clk *periph_clocks[] __initdata = {
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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// ssc 0 .. ssc2
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&ssc0_clk,
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&ssc1_clk,
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&ssc2_clk,
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&tc0_clk,
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&tc1_clk,
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&tc2_clk,
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@ -87,6 +87,11 @@ static struct clk mmc1_clk = {
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.pmc_mask = 1 << AT91SAM9263_ID_MCI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk can_clk = {
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.name = "can_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_CAN,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twi_clk = {
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.name = "twi_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TWI,
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@ -102,16 +107,46 @@ static struct clk spi1_clk = {
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.pmc_mask = 1 << AT91SAM9263_ID_SPI1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc0_clk = {
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.name = "ssc0_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC0,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ssc1_clk = {
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.name = "ssc1_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_SSC1,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk ac97_clk = {
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.name = "ac97_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_AC97C,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk tcb_clk = {
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.name = "tcb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_TCB,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk pwmc_clk = {
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.name = "pwmc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_PWMC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk macb_clk = {
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.name = "macb_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_EMAC,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk dma_clk = {
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.name = "dma_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_DMA,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk twodge_clk = {
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.name = "2dge_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_2DGE,
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.type = CLK_TYPE_PERIPHERAL,
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};
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static struct clk udc_clk = {
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.name = "udc_clk",
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.pmc_mask = 1 << AT91SAM9263_ID_UDP,
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@ -142,20 +177,21 @@ static struct clk *periph_clocks[] __initdata = {
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&usart2_clk,
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&mmc0_clk,
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&mmc1_clk,
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// can
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&can_clk,
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&twi_clk,
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&spi0_clk,
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&spi1_clk,
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// ssc0 .. ssc1
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// ac97
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&ssc0_clk,
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&ssc1_clk,
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&ac97_clk,
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&tcb_clk,
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// pwmc
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&pwmc_clk,
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&macb_clk,
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// 2dge
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&twodge_clk,
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&udc_clk,
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&isi_clk,
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&lcdc_clk,
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// dma
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&dma_clk,
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&ohci_clk,
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// irq0 .. irq1
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};
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