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arm64: dts: imx8mm: Add cpufreq properties 

This is very similar to imx8mq cpufreq-dt support.

Operating points are from datasheet:
https://www.nxp.com/docs/en/data-sheet/IMX8MMCEC.pdf

Higher opps were omitted (just like imx8mq) because it requires checking
speed grade from OCOTP fuses.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Leonard Crestez 2019-04-12 14:10:03 +00:00 committed by Shawn Guo
parent 7b2ac489c3
commit e85c9d0faa
1 changed files with 30 additions and 0 deletions
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30
arch/arm64/boot/dts/freescale/imx8mm.dtsi
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@ -48,32 +48,44 @@
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MM_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x1>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MM_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x2>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MM_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x3>;
clock-latency = <61036>; /* two CLK32 periods */
clocks = <&clk IMX8MM_CLK_ARM>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
operating-points-v2 = <&a53_opp_table>;
};
A53_L2: l2-cache0 {
@ -81,6 +93,24 @@
};
};
a53_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <850000>;
clock-latency-ns = <150000>;
};
opp-1600000000 {
opp-hz = /bits/ 64 <1600000000>;
opp-microvolt = <900000>;
clock-latency-ns = <150000>;
opp-suspend;
};
};
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x80000000>;