sparc64: Fix bit twiddling in sparc_pmu_enable_event().
There was a serious disconnect in the logic happening in sparc_pmu_disable_event() vs. sparc_pmu_enable_event(). Event disable is implemented by programming a NOP event into the PCR. However, event enable was not reversing this operation. Instead, it was setting the User/Priv/Hypervisor trace enable bits. That's not sparc_pmu_enable_event()'s job, that's what sparc_pmu_enable() and sparc_pmu_disable() do . The intent of sparc_pmu_enable_event() is clear, since it first clear out the event type encoding field. So fix this by OR'ing in the event encoding rather than the trace enable bits. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -817,15 +817,17 @@ static u64 nop_for_index(int idx)
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static inline void sparc_pmu_enable_event(struct cpu_hw_events *cpuc, struct hw_perf_event *hwc, int idx)
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{
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u64 val, mask = mask_for_index(idx);
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u64 enc, val, mask = mask_for_index(idx);
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int pcr_index = 0;
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if (sparc_pmu->num_pcrs > 1)
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pcr_index = idx;
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enc = perf_event_get_enc(cpuc->events[idx]);
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val = cpuc->pcr[pcr_index];
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val &= ~mask;
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val |= hwc->config;
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val |= event_encoding(enc, idx);
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cpuc->pcr[pcr_index] = val;
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pcr_ops->write_pcr(pcr_index, cpuc->pcr[pcr_index]);
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