[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek This patch adds support for the Cirrus ep93xx series of CPUs. The ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs, IrDA, MaverickCrunch floating point coprocessor, between 24 and 64 GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster engine, graphics accelerator, IDE controller and a bunch of other stuff. This patch adds the core ep93xx support code, and support for the Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Lennert Buytenhek
Russell King
parent
73deb7dc05
commit
e7736d47a1
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@ -108,6 +108,13 @@ config ARCH_EBSA110
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Ethernet interface, two PCMCIA sockets, two serial ports and a
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parallel port.
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config ARCH_EP93XX
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bool "EP93xx-based"
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select ARM_AMBA
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select ARM_VIC
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help
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This enables support for the Cirrus EP93xx series of CPUs.
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config ARCH_FOOTBRIDGE
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bool "FootBridge"
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select FOOTBRIDGE
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@ -250,6 +257,8 @@ endchoice
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source "arch/arm/mach-clps711x/Kconfig"
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source "arch/arm/mach-ep93xx/Kconfig"
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source "arch/arm/mach-footbridge/Kconfig"
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source "arch/arm/mach-integrator/Kconfig"
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@ -105,6 +105,7 @@ endif
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machine-$(CONFIG_ARCH_AAEC2000) := aaec2000
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machine-$(CONFIG_ARCH_REALVIEW) := realview
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machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200
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machine-$(CONFIG_ARCH_EP93XX) := ep93xx
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ifeq ($(CONFIG_ARCH_EBSA110),y)
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# This is what happens if you forget the IOCS16 line.
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@ -0,0 +1,21 @@
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if ARCH_EP93XX
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menu "Cirrus EP93xx Implementation Options"
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comment "EP93xx Platforms"
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config MACH_GESBC9312
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bool "Support Glomation GESBC-9312-sx"
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help
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Say 'Y' here if you want your kernel to support the Glomation
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GESBC-9312-sx board.
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config MACH_TS72XX
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bool "Support Technologic Systems TS-72xx SBC"
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help
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Say 'Y' here if you want your kernel to support the
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Technologic Systems TS-72xx board.
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endmenu
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endif
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@ -0,0 +1,10 @@
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#
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# Makefile for the linux kernel.
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#
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obj-y := core.o
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obj-m :=
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obj-n :=
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obj- :=
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obj-$(CONFIG_MACH_GESBC9312) += gesbc9312.o
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obj-$(CONFIG_MACH_TS72XX) += ts72xx.o
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@ -0,0 +1,2 @@
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zreladdr-y := 0x00008000
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params_phys-y := 0x00000100
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@ -0,0 +1,173 @@
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/*
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* arch/arm/mach-ep93xx/core.c
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* Core routines for Cirrus EP93xx chips.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* Thanks go to Michael Burian and Ray Lehtiniemi for their key
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* role in the ep93xx linux community.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/serial.h>
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#include <linux/tty.h>
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#include <linux/bitops.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <linux/serial_core.h>
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#include <linux/device.h>
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#include <linux/mm.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/delay.h>
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#include <linux/amba/bus.h>
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#include <asm/types.h>
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#include <asm/setup.h>
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#include <asm/memory.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/system.h>
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#include <asm/tlbflush.h>
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#include <asm/pgtable.h>
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#include <asm/io.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware/vic.h>
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/*************************************************************************
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* Static I/O mappings that are needed for all EP93xx platforms
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*************************************************************************/
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static struct map_desc ep93xx_io_desc[] __initdata = {
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{
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.virtual = EP93XX_AHB_VIRT_BASE,
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.pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
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.length = EP93XX_AHB_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = EP93XX_APB_VIRT_BASE,
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.pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
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.length = EP93XX_APB_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init ep93xx_map_io(void)
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{
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iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
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}
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/*************************************************************************
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* Timer handling for EP93xx
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*************************************************************************
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* The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
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* 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
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* an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
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* is free-running, and can't generate interrupts.
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*
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* The 508 kHz timers are ideal for use for the timer interrupt, as the
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* most common values of HZ divide 508 kHz nicely. We pick one of the 16
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* bit timers (timer 1) since we don't need more than 16 bits of reload
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* value as long as HZ >= 8.
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*
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* The higher clock rate of timer 4 makes it a better choice than the
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* other timers for use in gettimeoffset(), while the fact that it can't
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* generate interrupts means we don't have to worry about not being able
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* to use this timer for something else. We also use timer 4 for keeping
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* track of lost jiffies.
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*/
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static unsigned int last_jiffy_time;
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#define TIMER4_TICKS_PER_JIFFY ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
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static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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write_seqlock(&xtime_lock);
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__raw_writel(1, EP93XX_TIMER1_CLEAR);
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while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
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>= TIMER4_TICKS_PER_JIFFY) {
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last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
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timer_tick(regs);
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}
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction ep93xx_timer_irq = {
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.name = "ep93xx timer",
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.flags = SA_INTERRUPT | SA_TIMER,
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.handler = ep93xx_timer_interrupt,
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};
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static void __init ep93xx_timer_init(void)
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{
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/* Enable periodic HZ timer. */
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__raw_writel(0x48, EP93XX_TIMER1_CONTROL);
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__raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
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__raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
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/* Enable lost jiffy timer. */
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__raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
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setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
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}
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static unsigned long ep93xx_gettimeoffset(void)
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{
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int offset;
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offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
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/* Calculate (1000000 / 983040) * offset. */
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return offset + (53 * offset / 3072);
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}
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struct sys_timer ep93xx_timer = {
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.init = ep93xx_timer_init,
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.offset = ep93xx_gettimeoffset,
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};
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/*************************************************************************
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* EP93xx IRQ handling
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*************************************************************************/
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void __init ep93xx_init_irq(void)
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{
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vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
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vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
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}
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/*************************************************************************
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* EP93xx peripheral handling
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*************************************************************************/
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void __init ep93xx_init_devices(void)
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{
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unsigned int v;
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/*
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* Disallow access to MaverickCrunch initially.
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*/
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v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
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v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
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__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
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__raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
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}
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@ -0,0 +1,40 @@
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/*
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* arch/arm/mach-ep93xx/gesbc9312.c
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* Glomation GESBC-9312-sx support.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/mtd/physmap.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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static void __init gesbc9312_init_machine(void)
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{
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ep93xx_init_devices();
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physmap_configure(0x60000000, 0x00800000, 4, NULL);
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}
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MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
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/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
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.phys_io = EP93XX_APB_PHYS_BASE,
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.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.map_io = ep93xx_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = gesbc9312_init_machine,
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MACHINE_END
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@ -0,0 +1,118 @@
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/*
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* arch/arm/mach-ep93xx/ts72xx.c
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* Technologic Systems TS72xx SBC support.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/mtd/physmap.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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static struct map_desc ts72xx_io_desc[] __initdata = {
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{
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.virtual = TS72XX_MODEL_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_MODEL_PHYS_BASE),
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.length = TS72XX_MODEL_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_OPTIONS_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_OPTIONS_PHYS_BASE),
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.length = TS72XX_OPTIONS_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_OPTIONS2_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_OPTIONS2_PHYS_BASE),
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.length = TS72XX_OPTIONS2_SIZE,
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.type = MT_DEVICE,
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}
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};
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static struct map_desc ts72xx_nand_io_desc[] __initdata = {
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{
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.virtual = TS72XX_NAND_DATA_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND1_DATA_PHYS_BASE),
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.length = TS72XX_NAND_DATA_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND1_CONTROL_PHYS_BASE),
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.length = TS72XX_NAND_CONTROL_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_NAND_BUSY_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND1_BUSY_PHYS_BASE),
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.length = TS72XX_NAND_BUSY_SIZE,
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.type = MT_DEVICE,
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}
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};
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static struct map_desc ts72xx_alternate_nand_io_desc[] __initdata = {
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{
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.virtual = TS72XX_NAND_DATA_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND2_DATA_PHYS_BASE),
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.length = TS72XX_NAND_DATA_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_NAND_CONTROL_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND2_CONTROL_PHYS_BASE),
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.length = TS72XX_NAND_CONTROL_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = TS72XX_NAND_BUSY_VIRT_BASE,
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.pfn = __phys_to_pfn(TS72XX_NAND2_BUSY_PHYS_BASE),
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.length = TS72XX_NAND_BUSY_SIZE,
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.type = MT_DEVICE,
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}
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};
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static void __init ts72xx_map_io(void)
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{
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ep93xx_map_io();
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iotable_init(ts72xx_io_desc, ARRAY_SIZE(ts72xx_io_desc));
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/*
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* The TS-7200 has NOR flash, the other models have NAND flash.
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*/
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if (!board_is_ts7200()) {
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if (is_ts9420_installed()) {
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iotable_init(ts72xx_alternate_nand_io_desc,
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ARRAY_SIZE(ts72xx_alternate_nand_io_desc));
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} else {
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iotable_init(ts72xx_nand_io_desc,
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ARRAY_SIZE(ts72xx_nand_io_desc));
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}
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}
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}
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static void __init ts72xx_init_machine(void)
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{
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ep93xx_init_devices();
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if (board_is_ts7200())
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physmap_configure(TS72XX_NOR_PHYS_BASE, 0x01000000, 1, NULL);
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}
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MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
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/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
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.phys_io = EP93XX_APB_PHYS_BASE,
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.io_pg_offst = ((EP93XX_APB_VIRT_BASE) >> 18) & 0xfffc,
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.boot_params = 0x00000100,
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.map_io = ts72xx_map_io,
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.init_irq = ep93xx_init_irq,
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.timer = &ep93xx_timer,
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.init_machine = ts72xx_init_machine,
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MACHINE_END
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@ -62,7 +62,7 @@ config CPU_ARM720T
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# ARM920T
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config CPU_ARM920T
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bool "Support ARM920T processor" if !ARCH_S3C2410
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depends on ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
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depends on ARCH_EP93XX || ARCH_INTEGRATOR || ARCH_S3C2410 || ARCH_IMX || ARCH_AAEC2000 || ARCH_AT91RM9200
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default y if ARCH_S3C2410 || ARCH_AT91RM9200
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select CPU_32v4
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select CPU_ABRT_EV4T
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@ -0,0 +1,22 @@
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/*
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* linux/include/asm-arm/arch-ep93xx/debug-macro.S
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* Debugging macro include header
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
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* the Free Software Foundation; either version 2 of the License, or (at
|
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* your option) any later version.
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*/
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#include <asm/arch/ep93xx-regs.h>
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||||
|
||||
.macro addruart,rx
|
||||
mrc p15, 0, \rx, c1, c0
|
||||
tst \rx, #1 @ MMU enabled?
|
||||
ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base
|
||||
ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base
|
||||
orr \rx, \rx, #0x000c0000
|
||||
.endm
|
||||
|
||||
#include <asm/hardware/debug-pl01x.S>
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/dma.h
|
||||
*/
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/entry-macro.S
|
||||
* IRQ demultiplexing for EP93xx
|
||||
*
|
||||
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or (at
|
||||
* your option) any later version.
|
||||
*/
|
||||
#include <asm/arch/ep93xx-regs.h>
|
||||
|
||||
.macro disable_fiq
|
||||
.endm
|
||||
|
||||
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
|
||||
ldr \base, =(EP93XX_AHB_VIRT_BASE)
|
||||
orr \base, \base, #0x000b0000
|
||||
mov \irqnr, #0
|
||||
ldr \irqstat, [\base] @ lower 32 interrupts
|
||||
cmp \irqstat, #0
|
||||
bne 1001f
|
||||
|
||||
eor \base, \base, #0x00070000
|
||||
ldr \irqstat, [\base] @ upper 32 interrupts
|
||||
cmp \irqstat, #0
|
||||
beq 1002f
|
||||
mov \irqnr, #0x20
|
||||
|
||||
1001:
|
||||
movs \tmp, \irqstat, lsl #16
|
||||
movne \irqstat, \tmp
|
||||
addeq \irqnr, \irqnr, #16
|
||||
|
||||
movs \tmp, \irqstat, lsl #8
|
||||
movne \irqstat, \tmp
|
||||
addeq \irqnr, \irqnr, #8
|
||||
|
||||
movs \tmp, \irqstat, lsl #4
|
||||
movne \irqstat, \tmp
|
||||
addeq \irqnr, \irqnr, #4
|
||||
|
||||
movs \tmp, \irqstat, lsl #2
|
||||
movne \irqstat, \tmp
|
||||
addeq \irqnr, \irqnr, #2
|
||||
|
||||
movs \tmp, \irqstat, lsl #1
|
||||
addeq \irqnr, \irqnr, #1
|
||||
orrs \base, \base, #1
|
||||
|
||||
1002:
|
||||
.endm
|
||||
|
|
@ -0,0 +1,114 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/ep93xx-regs.h
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_EP93XX_REGS_H
|
||||
#define __ASM_ARCH_EP93XX_REGS_H
|
||||
|
||||
/*
|
||||
* EP93xx linux memory map:
|
||||
*
|
||||
* virt phys size
|
||||
* fe800000 5M per-platform mappings
|
||||
* fed00000 80800000 2M APB
|
||||
* fef00000 80000000 1M AHB
|
||||
*/
|
||||
|
||||
#define EP93XX_AHB_PHYS_BASE 0x80000000
|
||||
#define EP93XX_AHB_VIRT_BASE 0xfef00000
|
||||
#define EP93XX_AHB_SIZE 0x00100000
|
||||
|
||||
#define EP93XX_APB_PHYS_BASE 0x80800000
|
||||
#define EP93XX_APB_VIRT_BASE 0xfed00000
|
||||
#define EP93XX_APB_SIZE 0x00200000
|
||||
|
||||
|
||||
/* AHB peripherals */
|
||||
#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000)
|
||||
|
||||
#define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000)
|
||||
|
||||
#define EP93XX_USB_BASE (EP93XX_AHB_VIRT_BASE + 0x00020000)
|
||||
#define EP93XX_USB_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00020000)
|
||||
|
||||
#define EP93XX_RASTER_BASE (EP93XX_AHB_VIRT_BASE + 0x00030000)
|
||||
|
||||
#define EP93XX_GRAPHICS_ACCEL_BASE (EP93XX_AHB_VIRT_BASE + 0x00040000)
|
||||
|
||||
#define EP93XX_SDRAM_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00060000)
|
||||
|
||||
#define EP93XX_PCMCIA_CONTROLLER_BASE (EP93XX_AHB_VIRT_BASE + 0x00080000)
|
||||
|
||||
#define EP93XX_BOOT_ROM_BASE (EP93XX_AHB_VIRT_BASE + 0x00090000)
|
||||
|
||||
#define EP93XX_IDE_BASE (EP93XX_AHB_VIRT_BASE + 0x000a0000)
|
||||
|
||||
#define EP93XX_VIC1_BASE (EP93XX_AHB_VIRT_BASE + 0x000b0000)
|
||||
|
||||
#define EP93XX_VIC2_BASE (EP93XX_AHB_VIRT_BASE + 0x000c0000)
|
||||
|
||||
|
||||
/* APB peripherals */
|
||||
#define EP93XX_TIMER_BASE (EP93XX_APB_VIRT_BASE + 0x00010000)
|
||||
#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
|
||||
#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
|
||||
#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
|
||||
#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
|
||||
#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
|
||||
#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
|
||||
#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
|
||||
#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
|
||||
#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
|
||||
#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
|
||||
#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
|
||||
#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
|
||||
#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
|
||||
#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
|
||||
#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
|
||||
|
||||
#define EP93XX_I2S_BASE (EP93XX_APB_VIRT_BASE + 0x00020000)
|
||||
|
||||
#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
|
||||
|
||||
#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
|
||||
|
||||
#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
|
||||
|
||||
#define EP93XX_SPI_BASE (EP93XX_APB_VIRT_BASE + 0x000a0000)
|
||||
|
||||
#define EP93XX_IRDA_BASE (EP93XX_APB_VIRT_BASE + 0x000b0000)
|
||||
|
||||
#define EP93XX_UART1_BASE (EP93XX_APB_VIRT_BASE + 0x000c0000)
|
||||
#define EP93XX_UART1_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000c0000)
|
||||
|
||||
#define EP93XX_UART2_BASE (EP93XX_APB_VIRT_BASE + 0x000d0000)
|
||||
#define EP93XX_UART2_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000d0000)
|
||||
|
||||
#define EP93XX_UART3_BASE (EP93XX_APB_VIRT_BASE + 0x000e0000)
|
||||
#define EP93XX_UART3_PHYS_BASE (EP93XX_APB_PHYS_BASE + 0x000e0000)
|
||||
|
||||
#define EP93XX_KEY_MATRIX_BASE (EP93XX_APB_VIRT_BASE + 0x000f0000)
|
||||
|
||||
#define EP93XX_ADC_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
|
||||
#define EP93XX_TOUCHSCREEN_BASE (EP93XX_APB_VIRT_BASE + 0x00100000)
|
||||
|
||||
#define EP93XX_PWM_BASE (EP93XX_APB_VIRT_BASE + 0x00110000)
|
||||
|
||||
#define EP93XX_RTC_BASE (EP93XX_APB_VIRT_BASE + 0x00120000)
|
||||
|
||||
#define EP93XX_SYSCON_BASE (EP93XX_APB_VIRT_BASE + 0x00130000)
|
||||
#define EP93XX_SYSCON_REG(x) (EP93XX_SYSCON_BASE + (x))
|
||||
#define EP93XX_SYSCON_POWER_STATE EP93XX_SYSCON_REG(0x00)
|
||||
#define EP93XX_SYSCON_CLOCK_CONTROL EP93XX_SYSCON_REG(0x04)
|
||||
#define EP93XX_SYSCON_CLOCK_UARTBAUD 0x20000000
|
||||
#define EP93XX_SYSCON_CLOCK_USH_EN 0x10000000
|
||||
#define EP93XX_SYSCON_HALT EP93XX_SYSCON_REG(0x08)
|
||||
#define EP93XX_SYSCON_STANDBY EP93XX_SYSCON_REG(0x0c)
|
||||
#define EP93XX_SYSCON_DEVICE_CONFIG EP93XX_SYSCON_REG(0x80)
|
||||
#define EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE 0x00800000
|
||||
#define EP93XX_SYSCON_SWLOCK EP93XX_SYSCON_REG(0xc0)
|
||||
|
||||
#define EP93XX_WATCHDOG_BASE (EP93XX_APB_VIRT_BASE + 0x00140000)
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/gesbc9312.h
|
||||
*/
|
||||
|
|
@ -0,0 +1,12 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/hardware.h
|
||||
*/
|
||||
|
||||
#include "ep93xx-regs.h"
|
||||
|
||||
#define pcibios_assign_all_busses() 0
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#include "gesbc9312.h"
|
||||
#include "ts72xx.h"
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/io.h
|
||||
*/
|
||||
|
||||
#define IO_SPACE_LIMIT 0xffffffff
|
||||
|
||||
#define __io(p) ((void __iomem *)(p))
|
||||
#define __mem_pci(p) (p)
|
||||
|
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/irqs.h
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_IRQS_H
|
||||
#define __ASM_ARCH_IRQS_H
|
||||
|
||||
#define IRQ_EP93XX_COMMRX 2
|
||||
#define IRQ_EP93XX_COMMTX 3
|
||||
#define IRQ_EP93XX_TIMER1 4
|
||||
#define IRQ_EP93XX_TIMER2 5
|
||||
#define IRQ_EP93XX_AACINTR 6
|
||||
#define IRQ_EP93XX_DMAM2P0 7
|
||||
#define IRQ_EP93XX_DMAM2P1 8
|
||||
#define IRQ_EP93XX_DMAM2P2 9
|
||||
#define IRQ_EP93XX_DMAM2P3 10
|
||||
#define IRQ_EP93XX_DMAM2P4 11
|
||||
#define IRQ_EP93XX_DMAM2P5 12
|
||||
#define IRQ_EP93XX_DMAM2P6 13
|
||||
#define IRQ_EP93XX_DMAM2P7 14
|
||||
#define IRQ_EP93XX_DMAM2P8 15
|
||||
#define IRQ_EP93XX_DMAM2P9 16
|
||||
#define IRQ_EP93XX_DMAM2M0 17
|
||||
#define IRQ_EP93XX_DMAM2M1 18
|
||||
#define IRQ_EP93XX_GPIO0MUX 20
|
||||
#define IRQ_EP93XX_GPIO1MUX 21
|
||||
#define IRQ_EP93XX_GPIO2MUX 22
|
||||
#define IRQ_EP93XX_GPIO3MUX 22
|
||||
#define IRQ_EP93XX_UART1RX 23
|
||||
#define IRQ_EP93XX_UART1TX 24
|
||||
#define IRQ_EP93XX_UART2RX 25
|
||||
#define IRQ_EP93XX_UART2TX 26
|
||||
#define IRQ_EP93XX_UART3RX 27
|
||||
#define IRQ_EP93XX_UART3TX 28
|
||||
#define IRQ_EP93XX_KEY 29
|
||||
#define IRQ_EP93XX_TOUCH 30
|
||||
#define EP93XX_VIC1_VALID_IRQ_MASK 0x7ffffffc
|
||||
|
||||
#define IRQ_EP93XX_EXT0 32
|
||||
#define IRQ_EP93XX_EXT1 33
|
||||
#define IRQ_EP93XX_EXT2 34
|
||||
#define IRQ_EP93XX_64HZ 35
|
||||
#define IRQ_EP93XX_WATCHDOG 36
|
||||
#define IRQ_EP93XX_RTC 37
|
||||
#define IRQ_EP93XX_IRDA 38
|
||||
#define IRQ_EP93XX_ETHERNET 39
|
||||
#define IRQ_EP93XX_EXT3 40
|
||||
#define IRQ_EP93XX_PROG 41
|
||||
#define IRQ_EP93XX_1HZ 42
|
||||
#define IRQ_EP93XX_VSYNC 43
|
||||
#define IRQ_EP93XX_VIDEO_FIFO 44
|
||||
#define IRQ_EP93XX_SSP1RX 45
|
||||
#define IRQ_EP93XX_SSP1TX 46
|
||||
#define IRQ_EP93XX_GPIO4MUX 47
|
||||
#define IRQ_EP93XX_GPIO5MUX 48
|
||||
#define IRQ_EP93XX_GPIO6MUX 49
|
||||
#define IRQ_EP93XX_GPIO7MUX 50
|
||||
#define IRQ_EP93XX_TIMER3 51
|
||||
#define IRQ_EP93XX_UART1 52
|
||||
#define IRQ_EP93XX_SSP 53
|
||||
#define IRQ_EP93XX_UART2 54
|
||||
#define IRQ_EP93XX_UART3 55
|
||||
#define IRQ_EP93XX_USB 56
|
||||
#define IRQ_EP93XX_ETHERNET_PME 57
|
||||
#define IRQ_EP93XX_DSP 58
|
||||
#define IRQ_EP93XX_GPIO_AB 59
|
||||
#define IRQ_EP93XX_SAI 60
|
||||
#define EP93XX_VIC2_VALID_IRQ_MASK 0x1fffffff
|
||||
|
||||
#define NR_EP93XX_IRQS 64
|
||||
|
||||
#define EP93XX_BOARD_IRQ(x) (NR_EP93XX_IRQS + (x))
|
||||
#define EP93XX_BOARD_IRQS 32
|
||||
|
||||
#define NR_IRQS (NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/memory.h
|
||||
*/
|
||||
|
||||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#define __bus_to_virt(x) __phys_to_virt(x)
|
||||
#define __virt_to_bus(x) __virt_to_phys(x)
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,14 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/platform.h
|
||||
*/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
void ep93xx_map_io(void);
|
||||
void ep93xx_init_irq(void);
|
||||
void ep93xx_init_time(unsigned long);
|
||||
void ep93xx_init_devices(void);
|
||||
extern struct sys_timer ep93xx_timer;
|
||||
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/system.h
|
||||
*/
|
||||
|
||||
#include <asm/hardware.h>
|
||||
|
||||
static inline void arch_idle(void)
|
||||
{
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
static inline void arch_reset(char mode)
|
||||
{
|
||||
u32 devicecfg;
|
||||
|
||||
local_irq_disable();
|
||||
|
||||
devicecfg = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
|
||||
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
|
||||
__raw_writel(devicecfg | 0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
|
||||
__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
|
||||
__raw_writel(devicecfg & ~0x80000000, EP93XX_SYSCON_DEVICE_CONFIG);
|
||||
|
||||
while (1)
|
||||
;
|
||||
}
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/timex.h
|
||||
*/
|
||||
|
||||
#define CLOCK_TICK_RATE 983040
|
||||
|
|
@ -0,0 +1,90 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/ts72xx.h
|
||||
*/
|
||||
|
||||
/*
|
||||
* TS72xx memory map:
|
||||
*
|
||||
* virt phys size
|
||||
* febff000 22000000 4K model number register
|
||||
* febfe000 22400000 4K options register
|
||||
* febfd000 22800000 4K options register #2
|
||||
* febfc000 [67]0000000 4K NAND data register
|
||||
* febfb000 [67]0400000 4K NAND control register
|
||||
* febfa000 [67]0800000 4K NAND busy register
|
||||
*/
|
||||
|
||||
#define TS72XX_MODEL_PHYS_BASE 0x22000000
|
||||
#define TS72XX_MODEL_VIRT_BASE 0xfebff000
|
||||
#define TS72XX_MODEL_SIZE 0x00001000
|
||||
|
||||
#define TS72XX_MODEL_TS7200 0x00
|
||||
#define TS72XX_MODEL_TS7250 0x01
|
||||
#define TS72XX_MODEL_TS7260 0x02
|
||||
|
||||
|
||||
#define TS72XX_OPTIONS_PHYS_BASE 0x22400000
|
||||
#define TS72XX_OPTIONS_VIRT_BASE 0xfebfe000
|
||||
#define TS72XX_OPTIONS_SIZE 0x00001000
|
||||
|
||||
#define TS72XX_OPTIONS_COM2_RS485 0x02
|
||||
#define TS72XX_OPTIONS_MAX197 0x01
|
||||
|
||||
|
||||
#define TS72XX_OPTIONS2_PHYS_BASE 0x22800000
|
||||
#define TS72XX_OPTIONS2_VIRT_BASE 0xfebfd000
|
||||
#define TS72XX_OPTIONS2_SIZE 0x00001000
|
||||
|
||||
#define TS72XX_OPTIONS2_TS9420 0x04
|
||||
#define TS72XX_OPTIONS2_TS9420_BOOT 0x02
|
||||
|
||||
|
||||
#define TS72XX_NOR_PHYS_BASE 0x60000000
|
||||
#define TS72XX_NOR2_PHYS_BASE 0x62000000
|
||||
|
||||
#define TS72XX_NAND1_DATA_PHYS_BASE 0x60000000
|
||||
#define TS72XX_NAND2_DATA_PHYS_BASE 0x70000000
|
||||
#define TS72XX_NAND_DATA_VIRT_BASE 0xfebfc000
|
||||
#define TS72XX_NAND_DATA_SIZE 0x00001000
|
||||
|
||||
#define TS72XX_NAND1_CONTROL_PHYS_BASE 0x60400000
|
||||
#define TS72XX_NAND2_CONTROL_PHYS_BASE 0x70400000
|
||||
#define TS72XX_NAND_CONTROL_VIRT_BASE 0xfebfb000
|
||||
#define TS72XX_NAND_CONTROL_SIZE 0x00001000
|
||||
|
||||
#define TS72XX_NAND1_BUSY_PHYS_BASE 0x60800000
|
||||
#define TS72XX_NAND2_BUSY_PHYS_BASE 0x70800000
|
||||
#define TS72XX_NAND_BUSY_VIRT_BASE 0xfebfa000
|
||||
#define TS72XX_NAND_BUSY_SIZE 0x00001000
|
||||
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <asm/io.h>
|
||||
|
||||
static inline int board_is_ts7200(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7200;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7250(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7250;
|
||||
}
|
||||
|
||||
static inline int board_is_ts7260(void)
|
||||
{
|
||||
return __raw_readb(TS72XX_MODEL_VIRT_BASE) == TS72XX_MODEL_TS7260;
|
||||
}
|
||||
|
||||
static inline int is_max197_installed(void)
|
||||
{
|
||||
return !!(__raw_readb(TS72XX_OPTIONS_VIRT_BASE) &
|
||||
TS72XX_OPTIONS_MAX197);
|
||||
}
|
||||
|
||||
static inline int is_ts9420_installed(void)
|
||||
{
|
||||
return !!(__raw_readb(TS72XX_OPTIONS2_VIRT_BASE) &
|
||||
TS72XX_OPTIONS2_TS9420);
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/uncompress.h
|
||||
*
|
||||
* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or (at
|
||||
* your option) any later version.
|
||||
*/
|
||||
|
||||
#include <asm/arch/ep93xx-regs.h>
|
||||
|
||||
static unsigned char __raw_readb(unsigned int ptr)
|
||||
{
|
||||
return *((volatile unsigned char *)ptr);
|
||||
}
|
||||
|
||||
static void __raw_writeb(unsigned char value, unsigned int ptr)
|
||||
{
|
||||
*((volatile unsigned char *)ptr) = value;
|
||||
}
|
||||
|
||||
|
||||
#define PHYS_UART1_DATA 0x808c0000
|
||||
#define PHYS_UART1_FLAG 0x808c0018
|
||||
#define UART1_FLAG_TXFF 0x20
|
||||
|
||||
static __inline__ void putc(char c)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 1000; i++) {
|
||||
/* Transmit fifo not full? */
|
||||
if (!(__raw_readb(PHYS_UART1_FLAG) & UART1_FLAG_TXFF))
|
||||
break;
|
||||
}
|
||||
|
||||
__raw_writeb(c, PHYS_UART1_DATA);
|
||||
}
|
||||
|
||||
static void putstr(const char *s)
|
||||
{
|
||||
while (*s) {
|
||||
putc(*s);
|
||||
if (*s == '\n')
|
||||
putc('\r');
|
||||
s++;
|
||||
}
|
||||
}
|
||||
|
||||
#define arch_decomp_setup()
|
||||
#define arch_decomp_wdog()
|
||||
|
|
@ -0,0 +1,5 @@
|
|||
/*
|
||||
* linux/include/asm-arm/arch-ep93xx/vmalloc.h
|
||||
*/
|
||||
|
||||
#define VMALLOC_END 0xfe800000
|
||||
Loading…
Reference in New Issue