arm64: tegra: Add XUDC node for Tegra210

Tegra210 has one XUSB device mode controller, which can be operated in
HS and SS modes. Add DT entry for XUSB device mode controller.

Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Nagarjuna Kristam 2020-02-10 13:41:41 +05:30 committed by Thierry Reding
parent 6895c83fda
commit e74db5a5b4
1 changed files with 19 additions and 0 deletions

View File

@ -1207,6 +1207,25 @@
status = "disabled";
};
usb@700d0000 {
compatible = "nvidia,tegra210-xudc";
reg = <0x0 0x700d0000 0x0 0x8000>,
<0x0 0x700d8000 0x0 0x1000>,
<0x0 0x700d9000 0x0 0x1000>;
reg-names = "base", "fpci", "ipfs";
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>,
<&tegra_car TEGRA210_CLK_XUSB_SS>,
<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>;
clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src";
power-domains = <&pd_xusbdev>, <&pd_xusbss>;
power-domain-names = "dev", "ss";
nvidia,xusb-padctl = <&padctl>;
status = "disabled";
};
mipi: mipi@700e3000 {
compatible = "nvidia,tegra210-mipi";
reg = <0x0 0x700e3000 0x0 0x100>;