staging: octeon-usb: Fix lines with more than 80 chars in octeon-hcd.c
Some lines with more than 80 characters are converted in to multiple lines. Signed-off-by: Paul Davies C <pauldaviesc@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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f510643522
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@ -460,7 +460,8 @@ struct octeon_hcd {
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} while (0)
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/* Returns the IO address to push/pop stuff data from the FIFOs */
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#define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
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#define USB_FIFO_ADDRESS(channel, usb_index) \
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(CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000)
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/**
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* struct octeon_temp_buffer - a bounce buffer for USB transfers
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@ -1288,7 +1289,8 @@ static struct cvmx_usb_pipe *cvmx_usb_open_pipe(struct cvmx_usb_state *usb,
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if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
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pipe->interval = interval*8;
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/* Force start splits to be schedule on uFrame 0 */
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pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval;
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pipe->next_tx_frame = ((usb->frame_number+7)&~7) +
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pipe->interval;
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} else {
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pipe->interval = interval;
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pipe->next_tx_frame = usb->frame_number + pipe->interval;
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@ -1339,9 +1341,13 @@ static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb)
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return;
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/* Get where the DMA engine would have written this data */
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address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
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address = __cvmx_usb_read_csr64(usb,
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CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8);
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ptr = cvmx_phys_to_ptr(address);
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__cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes);
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__cvmx_usb_write_csr64(usb,
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CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8,
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address + bytes);
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/* Loop writing the FIFO data for this packet into memory */
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while (bytes > 0) {
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@ -1546,19 +1552,27 @@ static void __cvmx_usb_start_channel_control(struct cvmx_usb_state *usb,
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usbc_hctsiz.s.pid = 3; /* Setup */
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bytes_to_transfer = sizeof(*header);
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/* All Control operations start with a setup going OUT */
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USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
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USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
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union cvmx_usbcx_hccharx, epdir,
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CVMX_USB_DIRECTION_OUT);
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/*
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* Setup send the control header instead of the buffer data. The
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* buffer data will be used in the next stage
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*/
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__cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, transaction->control_header);
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__cvmx_usb_write_csr64(usb,
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CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8,
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transaction->control_header);
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break;
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case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE:
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usbc_hctsiz.s.pid = 3; /* Setup */
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bytes_to_transfer = 0;
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/* All Control operations start with a setup going OUT */
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USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT);
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USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1);
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USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index),
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union cvmx_usbcx_hccharx, epdir,
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CVMX_USB_DIRECTION_OUT);
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USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index),
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union cvmx_usbcx_hcspltx, compsplt, 1);
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break;
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case CVMX_USB_STAGE_DATA:
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usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe);
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@ -1688,6 +1702,7 @@ static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb,
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/* Clear all channel status bits */
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usbc_hcint.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HCINTX(channel, usb->index));
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__cvmx_usb_write_csr32(usb,
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CVMX_USBCX_HCINTX(channel, usb->index),
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usbc_hcint.u32);
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@ -1718,19 +1733,31 @@ static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb,
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), usbc_hcintmsk.u32);
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/* Enable the channel interrupt to propagate */
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usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index));
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usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HAINTMSK(usb->index));
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usbc_haintmsk.s.haintmsk |= 1<<channel;
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index), usbc_haintmsk.u32);
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__cvmx_usb_write_csr32(usb,
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CVMX_USBCX_HAINTMSK(usb->index),
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usbc_haintmsk.u32);
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}
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/* Setup the locations the DMA engines use */
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{
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uint64_t dma_address = transaction->buffer + transaction->actual_bytes;
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uint64_t dma_address = transaction->buffer +
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transaction->actual_bytes;
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if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)
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dma_address = transaction->buffer + transaction->iso_packets[0].offset + transaction->actual_bytes;
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__cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, dma_address);
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__cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, dma_address);
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dma_address = transaction->buffer +
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transaction->iso_packets[0].offset +
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transaction->actual_bytes;
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__cvmx_usb_write_csr64(usb,
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CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8,
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dma_address);
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__cvmx_usb_write_csr64(usb,
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CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8,
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dma_address);
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}
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/* Setup both the size of the transfer and the SPLIT characteristics */
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@ -2040,8 +2067,15 @@ static void __cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof)
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* Without DMA we need to be careful to not schedule something
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* at the end of a frame and cause an overrun.
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*/
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union cvmx_usbcx_hfnum hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))};
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union cvmx_usbcx_hfir hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))};
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union cvmx_usbcx_hfnum hfnum = {
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.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HFNUM(usb->index))
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};
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union cvmx_usbcx_hfir hfir = {
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.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HFIR(usb->index))
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};
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if (hfnum.s.frrem < hfir.s.frint/4)
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goto done;
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@ -2660,7 +2694,9 @@ static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
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}
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/* Disable the channel interrupts now that it is done */
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
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__cvmx_usb_write_csr32(usb,
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CVMX_USBCX_HCINTMSKX(channel, usb->index),
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0);
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usb->idle_hardware_channels |= (1<<channel);
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/* Make sure this channel is tied to a valid pipe */
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@ -3026,7 +3062,8 @@ static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel)
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*/
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if (!buffer_space_left ||
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(bytes_this_transfer < 188)) {
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pipe->next_tx_frame += pipe->interval;
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pipe->next_tx_frame +=
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pipe->interval;
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__cvmx_usb_perform_complete(
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usb,
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pipe,
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@ -3132,17 +3169,21 @@ static int cvmx_usb_poll(struct cvmx_usb_state *usb)
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prefetch_range(usb, sizeof(*usb));
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/* Update the frame counter */
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usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index));
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usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HFNUM(usb->index));
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if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum)
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usb->frame_number += 0x4000;
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usb->frame_number &= ~0x3fffull;
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usb->frame_number |= usbc_hfnum.s.frnum;
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/* Read the pending interrupts */
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usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTSTS(usb->index));
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usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_GINTSTS(usb->index));
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/* Clear the interrupts now that we know about them */
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index), usbc_gintsts.u32);
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__cvmx_usb_write_csr32(usb,
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CVMX_USBCX_GINTSTS(usb->index),
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usbc_gintsts.u32);
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if (usbc_gintsts.s.rxflvl) {
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/*
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@ -3199,7 +3240,8 @@ static int cvmx_usb_poll(struct cvmx_usb_state *usb)
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*/
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union cvmx_usbcx_haint usbc_haint;
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usbc_haint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINT(usb->index));
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usbc_haint.u32 = __cvmx_usb_read_csr32(usb,
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CVMX_USBCX_HAINT(usb->index));
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while (usbc_haint.u32) {
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int channel;
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@ -3492,7 +3534,8 @@ static int octeon_usb_hub_status_data(struct usb_hcd *hcd, char *buf)
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return buf[0] != 0;
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}
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static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength)
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static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
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u16 wIndex, char *buf, u16 wLength)
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{
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struct octeon_hcd *priv = hcd_to_octeon(hcd);
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struct device *dev = hcd->self.controller;
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