[WATCHDOG] Add AT91SAM9X watchdog
Add a driver for the watchdog timer embedded into AT91SAM9X chips. Signed-off-by: Renaud Cerrato <r.cerrato@til-technologies.fr> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Renaud CERRATO
Wim Van Sebroeck
parent
7d8b090661
commit
e6bb42e3d6
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@ -66,6 +66,13 @@ config AT91RM9200_WATCHDOG
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Watchdog timer embedded into AT91RM9200 chips. This will reboot your
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system when the timeout is reached.
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config AT91SAM9X_WATCHDOG
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tristate "AT91SAM9X watchdog"
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depends on WATCHDOG && (ARCH_AT91SAM9260 || ARCH_AT91SAM9261)
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help
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Watchdog timer embedded into AT91SAM9X chips. This will reboot your
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system when the timeout is reached.
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config 21285_WATCHDOG
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tristate "DC21285 watchdog"
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depends on FOOTBRIDGE
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@ -26,6 +26,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
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# ARM Architecture
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obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
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obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o
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obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
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obj-$(CONFIG_21285_WATCHDOG) += wdt285.o
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obj-$(CONFIG_977_WATCHDOG) += wdt977.o
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@ -0,0 +1,328 @@
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/*
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* Watchdog driver for Atmel AT91SAM9x processors.
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*
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* Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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/*
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* The Watchdog Timer Mode Register can be only written to once. If the
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* timeout need to be set from Linux, be sure that the bootstrap or the
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* bootloader doesn't write to this register.
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*/
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#include <linux/errno.h>
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#include <linux/fs.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/miscdevice.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <linux/watchdog.h>
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#include <linux/jiffies.h>
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#include <linux/timer.h>
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#include <linux/bitops.h>
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#include <linux/uaccess.h>
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#include <asm/arch/at91_wdt.h>
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#define DRV_NAME "AT91SAM9 Watchdog"
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/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
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* use this to convert a watchdog
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* value from/to milliseconds.
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*/
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#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
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#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
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/* Hardware timeout in seconds */
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#define WDT_HW_TIMEOUT 2
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/* Timer heartbeat (500ms) */
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#define WDT_TIMEOUT (HZ/2)
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/* User land timeout */
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#define WDT_HEARTBEAT 15
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static int heartbeat = WDT_HEARTBEAT;
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module_param(heartbeat, int, 0);
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MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
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"(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
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static int nowayout = WATCHDOG_NOWAYOUT;
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module_param(nowayout, int, 0);
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MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
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"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
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static void at91_ping(unsigned long data);
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static struct {
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unsigned long next_heartbeat; /* the next_heartbeat for the timer */
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unsigned long open;
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char expect_close;
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struct timer_list timer; /* The timer that pings the watchdog */
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} at91wdt_private;
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/* ......................................................................... */
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/*
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* Reload the watchdog timer. (ie, pat the watchdog)
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*/
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static inline void at91_wdt_reset(void)
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{
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at91_sys_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
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}
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/*
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* Timer tick
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*/
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static void at91_ping(unsigned long data)
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{
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if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
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(!nowayout && !at91wdt_private.open)) {
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at91_wdt_reset();
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mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
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} else
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printk(KERN_CRIT DRV_NAME": I will reset your machine !\n");
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}
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/*
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* Watchdog device is opened, and watchdog starts running.
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*/
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static int at91_wdt_open(struct inode *inode, struct file *file)
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{
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if (test_and_set_bit(0, &at91wdt_private.open))
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return -EBUSY;
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at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
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return nonseekable_open(inode, file);
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}
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/*
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* Close the watchdog device.
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*/
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static int at91_wdt_close(struct inode *inode, struct file *file)
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{
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clear_bit(0, &at91wdt_private.open);
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/* stop internal ping */
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if (!at91wdt_private.expect_close)
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del_timer(&at91wdt_private.timer);
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at91wdt_private.expect_close = 0;
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return 0;
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}
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/*
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* Set the watchdog time interval in 1/256Hz (write-once)
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* Counter is 12 bit.
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*/
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static int at91_wdt_settimeout(unsigned int timeout)
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{
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unsigned int reg;
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unsigned int mr;
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/* Check if disabled */
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mr = at91_sys_read(AT91_WDT_MR);
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if (mr & AT91_WDT_WDDIS) {
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printk(KERN_ERR DRV_NAME": sorry, watchdog is disabled\n");
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return -EIO;
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}
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/*
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* All counting occurs at SLOW_CLOCK / 128 = 256 Hz
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*
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* Since WDV is a 12-bit counter, the maximum period is
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* 4096 / 256 = 16 seconds.
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*/
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reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
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/* | AT91_WDT_WDRPROC causes processor reset only */
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| AT91_WDT_WDDBGHLT /* disabled in debug mode */
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| AT91_WDT_WDD /* restart at any time */
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| (timeout & AT91_WDT_WDV); /* timer value */
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at91_sys_write(AT91_WDT_MR, reg);
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return 0;
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}
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static const struct watchdog_info at91_wdt_info = {
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.identity = DRV_NAME,
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
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};
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/*
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* Handle commands from user-space.
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*/
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static long at91_wdt_ioctl(struct file *file,
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unsigned int cmd, unsigned long arg)
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{
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void __user *argp = (void __user *)arg;
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int __user *p = argp;
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int new_value;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user(argp, &at91_wdt_info,
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sizeof(at91_wdt_info)) ? -EFAULT : 0;
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case WDIOC_GETSTATUS:
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case WDIOC_GETBOOTSTATUS:
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return put_user(0, p);
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case WDIOC_KEEPALIVE:
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at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_value, p))
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return -EFAULT;
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heartbeat = new_value;
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at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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return put_user(new_value, p); /* return current value */
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case WDIOC_GETTIMEOUT:
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return put_user(heartbeat, p);
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}
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return -ENOTTY;
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}
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/*
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* Pat the watchdog whenever device is written to.
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*/
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static ssize_t at91_wdt_write(struct file *file, const char *data, size_t len,
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loff_t *ppos)
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{
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if (!len)
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return 0;
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/* Scan for magic character */
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if (!nowayout) {
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size_t i;
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at91wdt_private.expect_close = 0;
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for (i = 0; i < len; i++) {
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char c;
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if (get_user(c, data + i))
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return -EFAULT;
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if (c == 'V') {
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at91wdt_private.expect_close = 42;
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break;
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}
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}
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}
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at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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return len;
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}
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/* ......................................................................... */
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static const struct file_operations at91wdt_fops = {
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.owner = THIS_MODULE,
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.llseek = no_llseek,
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.unlocked_ioctl = at91_wdt_ioctl,
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.open = at91_wdt_open,
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.release = at91_wdt_close,
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.write = at91_wdt_write,
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};
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static struct miscdevice at91wdt_miscdev = {
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.minor = WATCHDOG_MINOR,
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.name = "watchdog",
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.fops = &at91wdt_fops,
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};
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static int __init at91wdt_probe(struct platform_device *pdev)
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{
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int res;
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if (at91wdt_miscdev.parent)
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return -EBUSY;
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at91wdt_miscdev.parent = &pdev->dev;
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/* Set watchdog */
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res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
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if (res)
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return res;
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res = misc_register(&at91wdt_miscdev);
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if (res)
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return res;
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at91wdt_private.next_heartbeat = jiffies + heartbeat * HZ;
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setup_timer(&at91wdt_private.timer, at91_ping, 0);
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mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
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printk(KERN_INFO DRV_NAME " enabled (heartbeat=%d sec, nowayout=%d)\n",
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heartbeat, nowayout);
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return 0;
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}
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static int __exit at91wdt_remove(struct platform_device *pdev)
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{
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int res;
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res = misc_deregister(&at91wdt_miscdev);
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if (!res)
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at91wdt_miscdev.parent = NULL;
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return res;
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}
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#ifdef CONFIG_PM
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static int at91wdt_suspend(struct platform_device *pdev, pm_message_t message)
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{
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return 0;
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}
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static int at91wdt_resume(struct platform_device *pdev)
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{
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return 0;
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}
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#else
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#define at91wdt_suspend NULL
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#define at91wdt_resume NULL
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#endif
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static struct platform_driver at91wdt_driver = {
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.remove = __exit_p(at91wdt_remove),
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.suspend = at91wdt_suspend,
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.resume = at91wdt_resume,
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.driver = {
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.name = "at91_wdt",
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.owner = THIS_MODULE,
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},
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};
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static int __init at91sam_wdt_init(void)
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{
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return platform_driver_probe(&at91wdt_driver, at91wdt_probe);
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}
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static void __exit at91sam_wdt_exit(void)
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{
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platform_driver_unregister(&at91wdt_driver);
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}
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module_init(at91sam_wdt_init);
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module_exit(at91sam_wdt_exit);
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MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
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MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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