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mmc: bfin_sdh: Forgot to write SDH_CFG register in function set_ios. 

The DMA operation in SDIO CMD53 may fail because the 4 bit SDIO mode
is not set up correctly on BF548.
Remove 2 blank lines as well.

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
Sonic Zhang 2013-10-16 13:42:05 +08:00 committed by Chris Ball
parent 7b2399034a
commit e69e4dff1c
1 changed files with 1 additions and 2 deletions
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3
drivers/mmc/host/bfin_sdh.c
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@ -391,6 +391,7 @@ static void sdh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
/* Disable 4 bit SDIO */ /* Disable 4 bit SDIO */
cfg &= ~SD4E; cfg &= ~SD4E;
} }
bfin_write_SDH_CFG(cfg);
host->power_mode = ios->power_mode; host->power_mode = ios->power_mode;
#ifndef RSI_BLKSZ #ifndef RSI_BLKSZ
@ -415,7 +416,6 @@ static void sdh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
cfg &= ~SD_CMD_OD; cfg &= ~SD_CMD_OD;
# endif # endif
if (ios->power_mode != MMC_POWER_OFF) if (ios->power_mode != MMC_POWER_OFF)
cfg |= PWR_ON; cfg |= PWR_ON;
else else
@ -433,7 +433,6 @@ static void sdh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
clk_ctl |= CLK_E; clk_ctl |= CLK_E;
host->clk_div = clk_div; host->clk_div = clk_div;
bfin_write_SDH_CLK_CTL(clk_ctl); bfin_write_SDH_CLK_CTL(clk_ctl);
} else } else
sdh_stop_clock(host); sdh_stop_clock(host);