powerpc: Fix bugs in emulate_step()
This fixes some bugs in emulate_step(). First, the setting of the carry bit for the arithmetic right-shift instructions was not correct on 64-bit machines because we were masking with a mask of type int rather than unsigned long. Secondly, the sld (shift left doubleword) instruction was using the wrong instruction field for the register containing the shift count. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -1198,7 +1198,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
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sh = regs->gpr[rb] & 0x3f;
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ival = (signed int) regs->gpr[rd];
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regs->gpr[ra] = ival >> (sh < 32 ? sh : 31);
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if (ival < 0 && (sh >= 32 || (ival & ((1 << sh) - 1)) != 0))
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if (ival < 0 && (sh >= 32 || (ival & ((1ul << sh) - 1)) != 0))
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regs->xer |= XER_CA;
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else
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regs->xer &= ~XER_CA;
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@ -1208,7 +1208,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
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sh = rb;
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ival = (signed int) regs->gpr[rd];
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regs->gpr[ra] = ival >> sh;
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if (ival < 0 && (ival & ((1 << sh) - 1)) != 0)
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if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
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regs->xer |= XER_CA;
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else
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regs->xer &= ~XER_CA;
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@ -1216,7 +1216,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
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#ifdef __powerpc64__
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case 27: /* sld */
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sh = regs->gpr[rd] & 0x7f;
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sh = regs->gpr[rb] & 0x7f;
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if (sh < 64)
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regs->gpr[ra] = regs->gpr[rd] << sh;
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else
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@ -1235,7 +1235,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
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sh = regs->gpr[rb] & 0x7f;
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ival = (signed long int) regs->gpr[rd];
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regs->gpr[ra] = ival >> (sh < 64 ? sh : 63);
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if (ival < 0 && (sh >= 64 || (ival & ((1 << sh) - 1)) != 0))
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if (ival < 0 && (sh >= 64 || (ival & ((1ul << sh) - 1)) != 0))
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regs->xer |= XER_CA;
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else
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regs->xer &= ~XER_CA;
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@ -1246,7 +1246,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
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sh = rb | ((instr & 2) << 4);
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ival = (signed long int) regs->gpr[rd];
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regs->gpr[ra] = ival >> sh;
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if (ival < 0 && (ival & ((1 << sh) - 1)) != 0)
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if (ival < 0 && (ival & ((1ul << sh) - 1)) != 0)
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regs->xer |= XER_CA;
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else
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regs->xer &= ~XER_CA;
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