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dt-bindings: remoteproc: qcom: Replace halt-nav with spare-regs 

7C retail devices using MSA based boot will result in a fuse combination
which will prevent accesses to MSS PERPH register space where the mpss
clocks and halt-nav reside. However accesses to conn_box_spare0 in TCSR
register space is still permitted so rename the binding appropriately to
qcom,spare-regs and drop all accesses to the MPSS PERPH register space.

Tested-by: Evan Green <evgreen@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200415145110.20624-2-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Sibi Sankar 2020-04-15 20:21:09 +05:30 committed by Bjorn Andersson
parent f6da4831c5
commit e62e3acd61
1 changed files with 5 additions and 9 deletions
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14
Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
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@ -79,7 +79,7 @@ on the Qualcomm Hexagon core.
"snoc_axi", "mnoc_axi", "qdss" "snoc_axi", "mnoc_axi", "qdss"
qcom,sc7180-mss-pil: qcom,sc7180-mss-pil:
must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi", must be "iface", "bus", "xo", "snoc_axi", "mnoc_axi",
"mss_crypto", "mss_nav", "nav" "nav"
qcom,sdm845-mss-pil: qcom,sdm845-mss-pil:
must be "iface", "bus", "mem", "xo", "gpll0_mss", must be "iface", "bus", "mem", "xo", "gpll0_mss",
"snoc_axi", "mnoc_axi", "prng" "snoc_axi", "mnoc_axi", "prng"
@ -181,16 +181,12 @@ For the compatible string below the following supplies are required:
For the compatible strings below the following phandle references are required: For the compatible strings below the following phandle references are required:
"qcom,sc7180-mss-pil" "qcom,sc7180-mss-pil"
- qcom,halt-nav-regs: - qcom,spare-regs:
Usage: required Usage: required
Value type: <prop-encoded-array> Value type: <prop-encoded-array>
Definition: reference to a list of 2 phandles with one offset each for Definition: a phandle reference to a syscon representing TCSR followed
the modem sub-system running on SC7180 SoC. The first by the offset within syscon for conn_box_spare0 register
phandle reference is to the mss clock node followed by the used by the modem sub-system running on SC7180 SoC.
offset within register space for nav halt register. The
second phandle reference is to a syscon representing TCSR
followed by the offset within syscon for conn_box_spare0
register.
= SUBNODES: = SUBNODES:
The Hexagon node must contain two subnodes, named "mba" and "mpss" representing The Hexagon node must contain two subnodes, named "mba" and "mpss" representing