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Blackfin arch: fix the aliased write macros 

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Robin Getz 2007-08-05 17:21:55 +08:00 committed by Bryan Wu
parent 4bbd10fd31
commit e62687f995
1 changed files with 2 additions and 2 deletions
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4
include/asm-blackfin/mach-bf561/cdefBF561.h
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@ -83,9 +83,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
#define bfin_read_SWRST() bfin_read_SICA_SWRST()
#define bfin_write_SWRST() bfin_write_SICA_SWRST()
#define bfin_write_SWRST(val) bfin_write_SICA_SWRST(val)
#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
#define bfin_write_SYSCR(val) bfin_write_SICA_SYSCR(val)
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)