spi: omap2-mcspi: Reorder the wait_for_completion for tx
The commit d7b4394e[Cleanup the omap2_mcspi_txrx_dma function] changed the wait_for_completion order. Move the wait so that the rx doesnot wait for the tx to complete. Reported-and-tested-by: Sørensen, Stefan <Sorensen@polycom.com> Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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3d70f8c617
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@ -323,18 +323,13 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi,
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi *mcspi;
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struct omap2_mcspi_dma *mcspi_dma;
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struct omap2_mcspi_dma *mcspi_dma;
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unsigned int count;
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unsigned int count;
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u8 * rx;
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const u8 * tx;
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const u8 * tx;
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void __iomem *chstat_reg;
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struct omap2_mcspi_cs *cs = spi->controller_state;
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mcspi = spi_master_get_devdata(spi->master);
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mcspi = spi_master_get_devdata(spi->master);
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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count = xfer->len;
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count = xfer->len;
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rx = xfer->rx_buf;
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tx = xfer->tx_buf;
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tx = xfer->tx_buf;
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chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
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if (mcspi_dma->dma_tx) {
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if (mcspi_dma->dma_tx) {
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struct dma_async_tx_descriptor *tx;
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struct dma_async_tx_descriptor *tx;
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@ -359,19 +354,6 @@ static void omap2_mcspi_tx_dma(struct spi_device *spi,
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dma_async_issue_pending(mcspi_dma->dma_tx);
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dma_async_issue_pending(mcspi_dma->dma_tx);
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omap2_mcspi_set_dma_req(spi, 0, 1);
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omap2_mcspi_set_dma_req(spi, 0, 1);
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wait_for_completion(&mcspi_dma->dma_tx_completion);
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dma_unmap_single(mcspi->dev, xfer->tx_dma, count,
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DMA_TO_DEVICE);
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/* for TX_ONLY mode, be sure all words have shifted out */
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if (rx == NULL) {
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if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_TXS) < 0)
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dev_err(&spi->dev, "TXS timed out\n");
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else if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_EOT) < 0)
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dev_err(&spi->dev, "EOT timed out\n");
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}
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}
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}
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static unsigned
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static unsigned
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@ -492,6 +474,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
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struct dma_slave_config cfg;
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struct dma_slave_config cfg;
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enum dma_slave_buswidth width;
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enum dma_slave_buswidth width;
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unsigned es;
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unsigned es;
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void __iomem *chstat_reg;
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mcspi = spi_master_get_devdata(spi->master);
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mcspi = spi_master_get_devdata(spi->master);
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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mcspi_dma = &mcspi->dma_channels[spi->chip_select];
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@ -526,8 +509,24 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
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omap2_mcspi_tx_dma(spi, xfer, cfg);
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omap2_mcspi_tx_dma(spi, xfer, cfg);
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if (rx != NULL)
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if (rx != NULL)
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return omap2_mcspi_rx_dma(spi, xfer, cfg, es);
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count = omap2_mcspi_rx_dma(spi, xfer, cfg, es);
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if (tx != NULL) {
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chstat_reg = cs->base + OMAP2_MCSPI_CHSTAT0;
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wait_for_completion(&mcspi_dma->dma_tx_completion);
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dma_unmap_single(mcspi->dev, xfer->tx_dma, xfer->len,
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DMA_TO_DEVICE);
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/* for TX_ONLY mode, be sure all words have shifted out */
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if (rx == NULL) {
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if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_TXS) < 0)
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dev_err(&spi->dev, "TXS timed out\n");
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else if (mcspi_wait_for_reg_bit(chstat_reg,
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OMAP2_MCSPI_CHSTAT_EOT) < 0)
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dev_err(&spi->dev, "EOT timed out\n");
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}
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}
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return count;
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return count;
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}
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}
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