nds32: nds32 FPU port
This patch set contains basic components for supporting the nds32 FPU, such as exception handlers and context switch for FPU registers. By default, the lazy FPU scheme is supported and the user can configure it via CONFIG_LZAY_FPU. Signed-off-by: Vincent Chen <vincentc@andestech.com> Acked-by: Greentime Hu <greentime@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
This commit is contained in:
Vincent Chen
Greentime Hu
parent
4f014a41b4
commit
e46bf83c18
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@ -29,6 +29,7 @@ config NDS32
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select HANDLE_DOMAIN_IRQ
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select HAVE_ARCH_TRACEHOOK
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select HAVE_DEBUG_KMEMLEAK
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select HAVE_EXIT_THREAD
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select HAVE_REGS_AND_STACK_ACCESS_API
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select HAVE_PERF_EVENTS
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select IRQ_DOMAIN
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@ -7,6 +7,27 @@ config CPU_LITTLE_ENDIAN
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bool "Little endian"
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default y
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config FPU
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bool "FPU support"
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default n
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help
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If FPU ISA is used in user space, this configuration shall be Y to
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enable required support in kerenl such as fpu context switch and
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fpu exception handler.
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If no FPU ISA is used in user space, say N.
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config LAZY_FPU
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bool "lazy FPU support"
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depends on FPU
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default y
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help
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Say Y here to enable the lazy FPU scheme. The lazy FPU scheme can
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enhance system performance by reducing the context switch
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frequency of the FPU register.
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For nomal case, say Y.
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config HWZOL
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bool "hardware zero overhead loop support"
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depends on CPU_D10 || CPU_D15
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@ -5,10 +5,14 @@ KBUILD_DEFCONFIG := defconfig
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comma = ,
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ifdef CONFIG_FUNCTION_TRACER
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arch-y += -malways-save-lp -mno-relax
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endif
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# Avoid generating FPU instructions
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arch-y += -mno-ext-fpu-sp -mno-ext-fpu-dp -mfloat-abi=soft
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KBUILD_CFLAGS += $(call cc-option, -mno-sched-prolog-epilog)
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KBUILD_CFLAGS += -mcmodel=large
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@ -251,6 +251,11 @@
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#define ITYPE_mskSTYPE ( 0xF << ITYPE_offSTYPE )
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#define ITYPE_mskCPID ( 0x3 << ITYPE_offCPID )
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/* Additional definitions of ITYPE register for FPU */
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#define FPU_DISABLE_EXCEPTION (0x1 << ITYPE_offSTYPE)
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#define FPU_EXCEPTION (0x2 << ITYPE_offSTYPE)
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#define FPU_CPID 0 /* FPU Co-Processor ID is 0 */
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#define NDS32_VECTOR_mskNONEXCEPTION 0x78
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#define NDS32_VECTOR_offEXCEPTION 8
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#define NDS32_VECTOR_offINTERRUPT 9
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@ -926,6 +931,7 @@
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#define FPCSR_mskDNIT ( 0x1 << FPCSR_offDNIT )
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#define FPCSR_mskRIT ( 0x1 << FPCSR_offRIT )
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#define FPCSR_mskALL (FPCSR_mskIVO | FPCSR_mskDBZ | FPCSR_mskOVF | FPCSR_mskUDF | FPCSR_mskIEX)
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#define FPCSR_mskALLE_NO_UDFE (FPCSR_mskIVOE | FPCSR_mskDBZE | FPCSR_mskOVFE | FPCSR_mskIEXE)
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#define FPCSR_mskALLE (FPCSR_mskIVOE | FPCSR_mskDBZE | FPCSR_mskOVFE | FPCSR_mskUDFE | FPCSR_mskIEXE)
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#define FPCSR_mskALLT (FPCSR_mskIVOT | FPCSR_mskDBZT | FPCSR_mskOVFT | FPCSR_mskUDFT | FPCSR_mskIEXT |FPCSR_mskDNIT | FPCSR_mskRIT)
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@ -946,6 +952,15 @@
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#define FPCFG_mskIMVER ( 0x1F << FPCFG_offIMVER )
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#define FPCFG_mskAVER ( 0x1F << FPCFG_offAVER )
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/* 8 Single precision or 4 double precision registers are available */
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#define SP8_DP4_reg 0
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/* 16 Single precision or 8 double precision registers are available */
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#define SP16_DP8_reg 1
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/* 32 Single precision or 16 double precision registers are available */
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#define SP32_DP16_reg 2
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/* 32 Single precision or 32 double precision registers are available */
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#define SP32_DP32_reg 3
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/******************************************************************************
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* fucpr: FUCOP_CTL (FPU and Coprocessor Enable Control Register)
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*****************************************************************************/
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@ -0,0 +1,114 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (C) 2005-2018 Andes Technology Corporation */
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#ifndef __ASM_NDS32_FPU_H
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#define __ASM_NDS32_FPU_H
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#if IS_ENABLED(CONFIG_FPU)
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#ifndef __ASSEMBLY__
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#include <linux/sched/task_stack.h>
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#include <linux/preempt.h>
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#include <asm/ptrace.h>
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extern bool has_fpu;
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extern void save_fpu(struct task_struct *__tsk);
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extern void load_fpu(const struct fpu_struct *fpregs);
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extern bool do_fpu_exception(unsigned int subtype, struct pt_regs *regs);
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#define test_tsk_fpu(regs) (regs->fucop_ctl & FUCOP_CTL_mskCP0EN)
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/*
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* Initially load the FPU with signalling NANS. This bit pattern
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* has the property that no matter whether considered as single or as
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* double precision, it still represents a signalling NAN.
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*/
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#define sNAN64 0xFFFFFFFFFFFFFFFFULL
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#define sNAN32 0xFFFFFFFFUL
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#define FPCSR_INIT 0x0UL
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extern const struct fpu_struct init_fpuregs;
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static inline void disable_ptreg_fpu(struct pt_regs *regs)
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{
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regs->fucop_ctl &= ~FUCOP_CTL_mskCP0EN;
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}
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static inline void enable_ptreg_fpu(struct pt_regs *regs)
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{
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regs->fucop_ctl |= FUCOP_CTL_mskCP0EN;
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}
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static inline void enable_fpu(void)
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{
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unsigned long fucop_ctl;
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fucop_ctl = __nds32__mfsr(NDS32_SR_FUCOP_CTL) | FUCOP_CTL_mskCP0EN;
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__nds32__mtsr(fucop_ctl, NDS32_SR_FUCOP_CTL);
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__nds32__isb();
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}
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static inline void disable_fpu(void)
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{
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unsigned long fucop_ctl;
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fucop_ctl = __nds32__mfsr(NDS32_SR_FUCOP_CTL) & ~FUCOP_CTL_mskCP0EN;
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__nds32__mtsr(fucop_ctl, NDS32_SR_FUCOP_CTL);
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__nds32__isb();
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}
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static inline void lose_fpu(void)
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{
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preempt_disable();
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#if IS_ENABLED(CONFIG_LAZY_FPU)
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if (last_task_used_math == current) {
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last_task_used_math = NULL;
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#else
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if (test_tsk_fpu(task_pt_regs(current))) {
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#endif
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save_fpu(current);
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}
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disable_ptreg_fpu(task_pt_regs(current));
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preempt_enable();
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}
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static inline void own_fpu(void)
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{
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preempt_disable();
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#if IS_ENABLED(CONFIG_LAZY_FPU)
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if (last_task_used_math != current) {
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if (last_task_used_math != NULL)
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save_fpu(last_task_used_math);
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load_fpu(¤t->thread.fpu);
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last_task_used_math = current;
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}
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#else
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if (!test_tsk_fpu(task_pt_regs(current))) {
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load_fpu(¤t->thread.fpu);
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}
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#endif
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enable_ptreg_fpu(task_pt_regs(current));
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preempt_enable();
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}
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#if !IS_ENABLED(CONFIG_LAZY_FPU)
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static inline void unlazy_fpu(struct task_struct *tsk)
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{
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preempt_disable();
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if (test_tsk_fpu(task_pt_regs(tsk)))
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save_fpu(tsk);
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preempt_enable();
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}
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#endif /* !CONFIG_LAZY_FPU */
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static inline void clear_fpu(struct pt_regs *regs)
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{
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preempt_disable();
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if (test_tsk_fpu(regs))
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disable_ptreg_fpu(regs);
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preempt_enable();
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}
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#endif /* CONFIG_FPU */
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#endif /* __ASSEMBLY__ */
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#endif /* __ASM_NDS32_FPU_H */
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@ -35,6 +35,8 @@ struct thread_struct {
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unsigned long address;
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unsigned long trap_no;
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unsigned long error_code;
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struct fpu_struct fpu;
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};
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#define INIT_THREAD { }
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@ -72,6 +74,11 @@ struct task_struct;
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/* Free all resources held by a thread. */
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#define release_thread(thread) do { } while(0)
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#if IS_ENABLED(CONFIG_FPU)
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#if !IS_ENABLED(CONFIG_UNLAZU_FPU)
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extern struct task_struct *last_task_used_math;
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#endif
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#endif
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/* Prepare to copy thread state - unlazy all lazy status */
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#define prepare_to_copy(tsk) do { } while (0)
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@ -9,6 +9,10 @@
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* before the signal handler was invoked. Note: only add new entries
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* to the end of the structure.
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*/
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struct fpu_struct {
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unsigned long long fd_regs[32];
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unsigned long fpcsr;
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};
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struct zol_struct {
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unsigned long nds32_lc; /* $LC */
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@ -54,6 +58,7 @@ struct sigcontext {
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unsigned long fault_address;
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unsigned long used_math_flag;
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/* FPU Registers */
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struct fpu_struct fpu;
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struct zol_struct zol;
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};
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@ -13,12 +13,16 @@ obj-y := ex-entry.o ex-exit.o ex-scall.o irq.o \
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obj-$(CONFIG_MODULES) += nds32_ksyms.o module.o
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obj-$(CONFIG_STACKTRACE) += stacktrace.o
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obj-$(CONFIG_FPU) += fpu.o
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obj-$(CONFIG_OF) += devtree.o
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obj-$(CONFIG_CACHE_L2) += atl2c.o
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obj-$(CONFIG_PERF_EVENTS) += perf_event_cpu.o
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obj-$(CONFIG_PM) += pm.o sleep.o
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extra-y := head.o vmlinux.lds
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CFLAGS_fpu.o += -mext-fpu-sp -mext-fpu-dp
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obj-y += vdso/
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obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o
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@ -7,6 +7,7 @@
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#include <asm/errno.h>
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#include <asm/asm-offsets.h>
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#include <asm/page.h>
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#include <asm/fpu.h>
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#ifdef CONFIG_HWZOL
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.macro push_zol
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@ -15,12 +16,31 @@
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mfusr $r16, $LC
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.endm
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#endif
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.macro skip_save_fucop_ctl
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#if defined(CONFIG_FPU)
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skip_fucop_ctl:
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smw.adm $p0, [$sp], $p0, #0x1
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j fucop_ctl_done
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#endif
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.endm
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.macro save_user_regs
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#if defined(CONFIG_FPU)
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sethi $p0, hi20(has_fpu)
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lbsi $p0, [$p0+lo12(has_fpu)]
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beqz $p0, skip_fucop_ctl
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mfsr $p0, $FUCOP_CTL
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smw.adm $p0, [$sp], $p0, #0x1
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bclr $p0, $p0, #FUCOP_CTL_offCP0EN
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mtsr $p0, $FUCOP_CTL
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fucop_ctl_done:
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/* move $SP to the bottom of pt_regs */
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addi $sp, $sp, -FUCOP_CTL_OFFSET
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#else
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smw.adm $sp, [$sp], $sp, #0x1
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/* move $SP to the bottom of pt_regs */
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addi $sp, $sp, -OSP_OFFSET
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#endif
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/* push $r0 ~ $r25 */
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smw.bim $r0, [$sp], $r25
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@ -79,6 +99,7 @@ exception_handlers:
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.long eh_syscall !Syscall
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.long asm_do_IRQ !IRQ
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skip_save_fucop_ctl
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common_exception_handler:
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save_user_regs
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mfsr $p0, $ITYPE
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@ -103,7 +124,6 @@ common_exception_handler:
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mtsr $r21, $PSW
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dsb
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jr $p1
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/* syscall */
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1:
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addi $p1, $p0, #-NDS32_VECTOR_offEXCEPTION
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@ -8,6 +8,7 @@
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#include <asm/asm-offsets.h>
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#include <asm/thread_info.h>
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#include <asm/current.h>
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#include <asm/fpu.h>
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@ -22,10 +23,18 @@
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.macro restore_user_regs_first
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setgie.d
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isb
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#if defined(CONFIG_FPU)
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addi $sp, $sp, OSP_OFFSET
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lmw.adm $r12, [$sp], $r25, #0x0
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sethi $p0, hi20(has_fpu)
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lbsi $p0, [$p0+lo12(has_fpu)]
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beqz $p0, 2f
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mtsr $r25, $FUCOP_CTL
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2:
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#else
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addi $sp, $sp, FUCOP_CTL_OFFSET
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lmw.adm $r12, [$sp], $r24, #0x0
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#endif
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mtsr $r12, $SP_USR
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mtsr $r13, $IPC
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#ifdef CONFIG_HWZOL
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@ -19,11 +19,13 @@ ENTRY(__switch_to)
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la $p0, __entry_task
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sw $r1, [$p0]
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move $p1, $r0
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addi $p1, $p1, #THREAD_CPU_CONTEXT
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addi $p1, $r0, #THREAD_CPU_CONTEXT
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smw.bi $r6, [$p1], $r14, #0xb ! push r6~r14, fp, lp, sp
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move $r25, $r1
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addi $r1, $r1, #THREAD_CPU_CONTEXT
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#if defined(CONFIG_FPU)
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call _switch_fpu
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#endif
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addi $r1, $r25, #THREAD_CPU_CONTEXT
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lmw.bi $r6, [$r1], $r14, #0xb ! pop r6~r14, fp, lp, sp
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ret
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@ -0,0 +1,231 @@
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2005-2018 Andes Technology Corporation
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#include <linux/sched.h>
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#include <linux/signal.h>
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#include <linux/sched/signal.h>
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#include <asm/processor.h>
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#include <asm/user.h>
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#include <asm/io.h>
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#include <asm/bitfield.h>
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#include <asm/fpu.h>
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const struct fpu_struct init_fpuregs = {
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.fd_regs = {[0 ... 31] = sNAN64},
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.fpcsr = FPCSR_INIT
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};
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void save_fpu(struct task_struct *tsk)
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{
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unsigned int fpcfg, fpcsr;
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enable_fpu();
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fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
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switch (fpcfg) {
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case SP32_DP32_reg:
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asm volatile ("fsdi $fd31, [%0+0xf8]\n\t"
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"fsdi $fd30, [%0+0xf0]\n\t"
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"fsdi $fd29, [%0+0xe8]\n\t"
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"fsdi $fd28, [%0+0xe0]\n\t"
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"fsdi $fd27, [%0+0xd8]\n\t"
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"fsdi $fd26, [%0+0xd0]\n\t"
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"fsdi $fd25, [%0+0xc8]\n\t"
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"fsdi $fd24, [%0+0xc0]\n\t"
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"fsdi $fd23, [%0+0xb8]\n\t"
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"fsdi $fd22, [%0+0xb0]\n\t"
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"fsdi $fd21, [%0+0xa8]\n\t"
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"fsdi $fd20, [%0+0xa0]\n\t"
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"fsdi $fd19, [%0+0x98]\n\t"
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"fsdi $fd18, [%0+0x90]\n\t"
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"fsdi $fd17, [%0+0x88]\n\t"
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"fsdi $fd16, [%0+0x80]\n\t"
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: /* no output */
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: "r" (&tsk->thread.fpu)
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: "memory");
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/* fall through */
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case SP32_DP16_reg:
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asm volatile ("fsdi $fd15, [%0+0x78]\n\t"
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"fsdi $fd14, [%0+0x70]\n\t"
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"fsdi $fd13, [%0+0x68]\n\t"
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"fsdi $fd12, [%0+0x60]\n\t"
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"fsdi $fd11, [%0+0x58]\n\t"
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"fsdi $fd10, [%0+0x50]\n\t"
|
||||
"fsdi $fd9, [%0+0x48]\n\t"
|
||||
"fsdi $fd8, [%0+0x40]\n\t"
|
||||
: /* no output */
|
||||
: "r" (&tsk->thread.fpu)
|
||||
: "memory");
|
||||
/* fall through */
|
||||
case SP16_DP8_reg:
|
||||
asm volatile ("fsdi $fd7, [%0+0x38]\n\t"
|
||||
"fsdi $fd6, [%0+0x30]\n\t"
|
||||
"fsdi $fd5, [%0+0x28]\n\t"
|
||||
"fsdi $fd4, [%0+0x20]\n\t"
|
||||
: /* no output */
|
||||
: "r" (&tsk->thread.fpu)
|
||||
: "memory");
|
||||
/* fall through */
|
||||
case SP8_DP4_reg:
|
||||
asm volatile ("fsdi $fd3, [%1+0x18]\n\t"
|
||||
"fsdi $fd2, [%1+0x10]\n\t"
|
||||
"fsdi $fd1, [%1+0x8]\n\t"
|
||||
"fsdi $fd0, [%1+0x0]\n\t"
|
||||
"fmfcsr %0\n\t"
|
||||
"swi %0, [%1+0x100]\n\t"
|
||||
: "=&r" (fpcsr)
|
||||
: "r"(&tsk->thread.fpu)
|
||||
: "memory");
|
||||
}
|
||||
disable_fpu();
|
||||
}
|
||||
|
||||
void load_fpu(const struct fpu_struct *fpregs)
|
||||
{
|
||||
unsigned int fpcfg, fpcsr;
|
||||
|
||||
enable_fpu();
|
||||
fpcfg = ((__nds32__fmfcfg() & FPCFG_mskFREG) >> FPCFG_offFREG);
|
||||
switch (fpcfg) {
|
||||
case SP32_DP32_reg:
|
||||
asm volatile ("fldi $fd31, [%0+0xf8]\n\t"
|
||||
"fldi $fd30, [%0+0xf0]\n\t"
|
||||
"fldi $fd29, [%0+0xe8]\n\t"
|
||||
"fldi $fd28, [%0+0xe0]\n\t"
|
||||
"fldi $fd27, [%0+0xd8]\n\t"
|
||||
"fldi $fd26, [%0+0xd0]\n\t"
|
||||
"fldi $fd25, [%0+0xc8]\n\t"
|
||||
"fldi $fd24, [%0+0xc0]\n\t"
|
||||
"fldi $fd23, [%0+0xb8]\n\t"
|
||||
"fldi $fd22, [%0+0xb0]\n\t"
|
||||
"fldi $fd21, [%0+0xa8]\n\t"
|
||||
"fldi $fd20, [%0+0xa0]\n\t"
|
||||
"fldi $fd19, [%0+0x98]\n\t"
|
||||
"fldi $fd18, [%0+0x90]\n\t"
|
||||
"fldi $fd17, [%0+0x88]\n\t"
|
||||
"fldi $fd16, [%0+0x80]\n\t"
|
||||
: /* no output */
|
||||
: "r" (fpregs));
|
||||
/* fall through */
|
||||
case SP32_DP16_reg:
|
||||
asm volatile ("fldi $fd15, [%0+0x78]\n\t"
|
||||
"fldi $fd14, [%0+0x70]\n\t"
|
||||
"fldi $fd13, [%0+0x68]\n\t"
|
||||
"fldi $fd12, [%0+0x60]\n\t"
|
||||
"fldi $fd11, [%0+0x58]\n\t"
|
||||
"fldi $fd10, [%0+0x50]\n\t"
|
||||
"fldi $fd9, [%0+0x48]\n\t"
|
||||
"fldi $fd8, [%0+0x40]\n\t"
|
||||
: /* no output */
|
||||
: "r" (fpregs));
|
||||
/* fall through */
|
||||
case SP16_DP8_reg:
|
||||
asm volatile ("fldi $fd7, [%0+0x38]\n\t"
|
||||
"fldi $fd6, [%0+0x30]\n\t"
|
||||
"fldi $fd5, [%0+0x28]\n\t"
|
||||
"fldi $fd4, [%0+0x20]\n\t"
|
||||
: /* no output */
|
||||
: "r" (fpregs));
|
||||
/* fall through */
|
||||
case SP8_DP4_reg:
|
||||
asm volatile ("fldi $fd3, [%1+0x18]\n\t"
|
||||
"fldi $fd2, [%1+0x10]\n\t"
|
||||
"fldi $fd1, [%1+0x8]\n\t"
|
||||
"fldi $fd0, [%1+0x0]\n\t"
|
||||
"lwi %0, [%1+0x100]\n\t"
|
||||
"fmtcsr %0\n\t":"=&r" (fpcsr)
|
||||
: "r"(fpregs));
|
||||
}
|
||||
disable_fpu();
|
||||
}
|
||||
void store_fpu_for_suspend(void)
|
||||
{
|
||||
#ifdef CONFIG_LAZY_FPU
|
||||
if (last_task_used_math != NULL)
|
||||
save_fpu(last_task_used_math);
|
||||
last_task_used_math = NULL;
|
||||
#else
|
||||
if (!used_math())
|
||||
return;
|
||||
unlazy_fpu(current);
|
||||
#endif
|
||||
clear_fpu(task_pt_regs(current));
|
||||
}
|
||||
inline void do_fpu_context_switch(struct pt_regs *regs)
|
||||
{
|
||||
/* Enable to use FPU. */
|
||||
|
||||
if (!user_mode(regs)) {
|
||||
pr_err("BUG: FPU is used in kernel mode.\n");
|
||||
BUG();
|
||||
return;
|
||||
}
|
||||
|
||||
enable_ptreg_fpu(regs);
|
||||
#ifdef CONFIG_LAZY_FPU //Lazy FPU is used
|
||||
if (last_task_used_math == current)
|
||||
return;
|
||||
if (last_task_used_math != NULL)
|
||||
/* Other processes fpu state, save away */
|
||||
save_fpu(last_task_used_math);
|
||||
last_task_used_math = current;
|
||||
#endif
|
||||
if (used_math()) {
|
||||
load_fpu(¤t->thread.fpu);
|
||||
} else {
|
||||
/* First time FPU user. */
|
||||
load_fpu(&init_fpuregs);
|
||||
set_used_math();
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
inline void fill_sigfpe_signo(unsigned int fpcsr, int *signo)
|
||||
{
|
||||
if (fpcsr & FPCSR_mskOVFT)
|
||||
*signo = FPE_FLTOVF;
|
||||
else if (fpcsr & FPCSR_mskUDFT)
|
||||
*signo = FPE_FLTUND;
|
||||
else if (fpcsr & FPCSR_mskIVOT)
|
||||
*signo = FPE_FLTINV;
|
||||
else if (fpcsr & FPCSR_mskDBZT)
|
||||
*signo = FPE_FLTDIV;
|
||||
else if (fpcsr & FPCSR_mskIEXT)
|
||||
*signo = FPE_FLTRES;
|
||||
}
|
||||
|
||||
inline void handle_fpu_exception(struct pt_regs *regs)
|
||||
{
|
||||
unsigned int fpcsr;
|
||||
int si_code = 0, si_signo = SIGFPE;
|
||||
|
||||
lose_fpu();
|
||||
fpcsr = current->thread.fpu.fpcsr;
|
||||
|
||||
if (fpcsr & FPCSR_mskRIT) {
|
||||
if (!user_mode(regs))
|
||||
do_exit(SIGILL);
|
||||
si_signo = SIGILL;
|
||||
show_regs(regs);
|
||||
si_code = ILL_COPROC;
|
||||
} else
|
||||
fill_sigfpe_signo(fpcsr, &si_code);
|
||||
force_sig_fault(si_signo, si_code,
|
||||
(void __user *)instruction_pointer(regs), current);
|
||||
}
|
||||
|
||||
bool do_fpu_exception(unsigned int subtype, struct pt_regs *regs)
|
||||
{
|
||||
int done = true;
|
||||
/* Coprocessor disabled exception */
|
||||
if (subtype == FPU_DISABLE_EXCEPTION) {
|
||||
preempt_disable();
|
||||
do_fpu_context_switch(regs);
|
||||
preempt_enable();
|
||||
}
|
||||
/* Coprocessor exception such as underflow and overflow */
|
||||
else if (subtype == FPU_EXCEPTION)
|
||||
handle_fpu_exception(regs);
|
||||
else
|
||||
done = false;
|
||||
return done;
|
||||
}
|
||||
|
|
@ -9,15 +9,16 @@
|
|||
#include <linux/uaccess.h>
|
||||
#include <asm/elf.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/fpu.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/reboot.h>
|
||||
|
||||
extern void setup_mm_for_reboot(char mode);
|
||||
#ifdef CONFIG_PROC_FS
|
||||
struct proc_dir_entry *proc_dir_cpu;
|
||||
EXPORT_SYMBOL(proc_dir_cpu);
|
||||
#if IS_ENABLED(CONFIG_LAZY_FPU)
|
||||
struct task_struct *last_task_used_math;
|
||||
#endif
|
||||
|
||||
extern void setup_mm_for_reboot(char mode);
|
||||
|
||||
extern inline void arch_reset(char mode)
|
||||
{
|
||||
if (mode == 's') {
|
||||
|
|
@ -125,15 +126,31 @@ void show_regs(struct pt_regs *regs)
|
|||
|
||||
EXPORT_SYMBOL(show_regs);
|
||||
|
||||
void exit_thread(struct task_struct *tsk)
|
||||
{
|
||||
#if defined(CONFIG_FPU) && defined(CONFIG_LAZY_FPU)
|
||||
if (last_task_used_math == tsk)
|
||||
last_task_used_math = NULL;
|
||||
#endif
|
||||
}
|
||||
|
||||
void flush_thread(void)
|
||||
{
|
||||
#if defined(CONFIG_FPU)
|
||||
clear_fpu(task_pt_regs(current));
|
||||
clear_used_math();
|
||||
# ifdef CONFIG_LAZY_FPU
|
||||
if (last_task_used_math == current)
|
||||
last_task_used_math = NULL;
|
||||
# endif
|
||||
#endif
|
||||
}
|
||||
|
||||
DEFINE_PER_CPU(struct task_struct *, __entry_task);
|
||||
|
||||
asmlinkage void ret_from_fork(void) __asm__("ret_from_fork");
|
||||
int copy_thread(unsigned long clone_flags, unsigned long stack_start,
|
||||
unsigned long stk_sz, struct task_struct *p)
|
||||
unsigned long stk_sz, struct task_struct *p)
|
||||
{
|
||||
struct pt_regs *childregs = task_pt_regs(p);
|
||||
|
||||
|
|
@ -159,6 +176,22 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
|
|||
p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
|
||||
p->thread.cpu_context.sp = (unsigned long)childregs;
|
||||
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
if (used_math()) {
|
||||
# if !IS_ENABLED(CONFIG_LAZY_FPU)
|
||||
unlazy_fpu(current);
|
||||
# else
|
||||
preempt_disable();
|
||||
if (last_task_used_math == current)
|
||||
save_fpu(current);
|
||||
preempt_enable();
|
||||
# endif
|
||||
p->thread.fpu = current->thread.fpu;
|
||||
clear_fpu(task_pt_regs(p));
|
||||
set_stopped_child_used_math(p);
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_HWZOL
|
||||
childregs->lb = 0;
|
||||
childregs->le = 0;
|
||||
|
|
@ -168,12 +201,33 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
struct task_struct *_switch_fpu(struct task_struct *prev, struct task_struct *next)
|
||||
{
|
||||
#if !IS_ENABLED(CONFIG_LAZY_FPU)
|
||||
unlazy_fpu(prev);
|
||||
#endif
|
||||
if (!(next->flags & PF_KTHREAD))
|
||||
clear_fpu(task_pt_regs(next));
|
||||
return prev;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
* fill in the fpe structure for a core dump...
|
||||
*/
|
||||
int dump_fpu(struct pt_regs *regs, elf_fpregset_t * fpu)
|
||||
{
|
||||
int fpvalid = 0;
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
struct task_struct *tsk = current;
|
||||
|
||||
fpvalid = tsk_used_math(tsk);
|
||||
if (fpvalid) {
|
||||
lose_fpu();
|
||||
memcpy(fpu, &tsk->thread.fpu, sizeof(*fpu));
|
||||
}
|
||||
#endif
|
||||
return fpvalid;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <asm/proc-fns.h>
|
||||
#include <asm/cache_info.h>
|
||||
#include <asm/elf.h>
|
||||
#include <asm/fpu.h>
|
||||
#include <nds32_intrinsic.h>
|
||||
|
||||
#define HWCAP_MFUSR_PC 0x000001
|
||||
|
|
@ -40,6 +41,7 @@
|
|||
#define HWCAP_DX_REGS 0x100000
|
||||
|
||||
unsigned long cpu_id, cpu_rev, cpu_cfgid;
|
||||
bool has_fpu = false;
|
||||
char cpu_series;
|
||||
char *endianness = NULL;
|
||||
|
||||
|
|
@ -136,6 +138,11 @@ static void __init dump_cpu_info(int cpu)
|
|||
(aliasing_num - 1) << PAGE_SHIFT;
|
||||
}
|
||||
#endif
|
||||
#ifdef CONFIG_FPU
|
||||
/* Disable fpu and enable when it is used. */
|
||||
if (has_fpu)
|
||||
disable_fpu();
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __init setup_cpuinfo(void)
|
||||
|
|
@ -180,9 +187,10 @@ static void __init setup_cpuinfo(void)
|
|||
if (cpu_cfgid & 0x0004)
|
||||
elf_hwcap |= HWCAP_EXT2;
|
||||
|
||||
if (cpu_cfgid & 0x0008)
|
||||
if (cpu_cfgid & 0x0008) {
|
||||
elf_hwcap |= HWCAP_FPU;
|
||||
|
||||
has_fpu = true;
|
||||
}
|
||||
if (cpu_cfgid & 0x0010)
|
||||
elf_hwcap |= HWCAP_STRING;
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/ucontext.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <asm/fpu.h>
|
||||
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/vdso.h>
|
||||
|
|
@ -20,6 +21,60 @@ struct rt_sigframe {
|
|||
struct siginfo info;
|
||||
struct ucontext uc;
|
||||
};
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
static inline int restore_sigcontext_fpu(struct pt_regs *regs,
|
||||
struct sigcontext __user *sc)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
unsigned long used_math_flag;
|
||||
int ret = 0;
|
||||
|
||||
clear_used_math();
|
||||
__get_user_error(used_math_flag, &sc->used_math_flag, ret);
|
||||
|
||||
if (!used_math_flag)
|
||||
return 0;
|
||||
set_used_math();
|
||||
|
||||
#if IS_ENABLED(CONFIG_LAZY_FPU)
|
||||
preempt_disable();
|
||||
if (current == last_task_used_math) {
|
||||
last_task_used_math = NULL;
|
||||
disable_ptreg_fpu(regs);
|
||||
}
|
||||
preempt_enable();
|
||||
#else
|
||||
clear_fpu(regs);
|
||||
#endif
|
||||
|
||||
return __copy_from_user(&tsk->thread.fpu, &sc->fpu,
|
||||
sizeof(struct fpu_struct));
|
||||
}
|
||||
|
||||
static inline int setup_sigcontext_fpu(struct pt_regs *regs,
|
||||
struct sigcontext __user *sc)
|
||||
{
|
||||
struct task_struct *tsk = current;
|
||||
int ret = 0;
|
||||
|
||||
__put_user_error(used_math(), &sc->used_math_flag, ret);
|
||||
|
||||
if (!used_math())
|
||||
return ret;
|
||||
|
||||
preempt_disable();
|
||||
#if IS_ENABLED(CONFIG_LAZY_FPU)
|
||||
if (last_task_used_math == tsk)
|
||||
save_fpu(last_task_used_math);
|
||||
#else
|
||||
unlazy_fpu(tsk);
|
||||
#endif
|
||||
ret = __copy_to_user(&sc->fpu, &tsk->thread.fpu,
|
||||
sizeof(struct fpu_struct));
|
||||
preempt_enable();
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int restore_sigframe(struct pt_regs *regs,
|
||||
struct rt_sigframe __user * sf)
|
||||
|
|
@ -69,7 +124,9 @@ static int restore_sigframe(struct pt_regs *regs,
|
|||
__get_user_error(regs->le, &sf->uc.uc_mcontext.zol.nds32_le, err);
|
||||
__get_user_error(regs->lb, &sf->uc.uc_mcontext.zol.nds32_lb, err);
|
||||
#endif
|
||||
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
err |= restore_sigcontext_fpu(regs, &sf->uc.uc_mcontext);
|
||||
#endif
|
||||
/*
|
||||
* Avoid sys_rt_sigreturn() restarting.
|
||||
*/
|
||||
|
|
@ -153,6 +210,9 @@ setup_sigframe(struct rt_sigframe __user * sf, struct pt_regs *regs,
|
|||
__put_user_error(regs->le, &sf->uc.uc_mcontext.zol.nds32_le, err);
|
||||
__put_user_error(regs->lb, &sf->uc.uc_mcontext.zol.nds32_lb, err);
|
||||
#endif
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
err |= setup_sigcontext_fpu(regs, &sf->uc.uc_mcontext);
|
||||
#endif
|
||||
|
||||
__put_user_error(current->thread.trap_no, &sf->uc.uc_mcontext.trap_no,
|
||||
err);
|
||||
|
|
|
|||
|
|
@ -36,7 +36,9 @@ suspend2ram:
|
|||
mfsr $r17, $ir14
|
||||
mfsr $r18, $ir15
|
||||
pushm $r0, $r19
|
||||
|
||||
#if defined(CONFIG_FPU)
|
||||
jal store_fpu_for_suspend
|
||||
#endif
|
||||
tlbop FlushAll
|
||||
isb
|
||||
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@
|
|||
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/unistd.h>
|
||||
#include <asm/fpu.h>
|
||||
|
||||
#include <linux/ptrace.h>
|
||||
#include <nds32_intrinsic.h>
|
||||
|
|
@ -357,6 +358,21 @@ void do_dispatch_general(unsigned long entry, unsigned long addr,
|
|||
} else if (type == ETYPE_RESERVED_INSTRUCTION) {
|
||||
/* Reserved instruction */
|
||||
do_revinsn(regs);
|
||||
} else if (type == ETYPE_COPROCESSOR) {
|
||||
/* Coprocessor */
|
||||
#if IS_ENABLED(CONFIG_FPU)
|
||||
unsigned int fucop_exist = __nds32__mfsr(NDS32_SR_FUCOP_EXIST);
|
||||
unsigned int cpid = ((itype & ITYPE_mskCPID) >> ITYPE_offCPID);
|
||||
|
||||
if ((cpid == FPU_CPID) &&
|
||||
(fucop_exist & FUCOP_EXIST_mskCP0ISFPU)) {
|
||||
unsigned int subtype = (itype & ITYPE_mskSTYPE);
|
||||
|
||||
if (true == do_fpu_exception(subtype, regs))
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
unhandled_exceptions(entry, addr, type, regs);
|
||||
} else if (type == ETYPE_TRAP && swid == SWID_RAISE_INTERRUPT_LEVEL) {
|
||||
/* trap, used on v3 EDM target debugging workaround */
|
||||
/*
|
||||
|
|
|
|||
Loading…
Reference in New Issue