[ARM] S3C24XX: Update clock data on resume
Update the clock settings on resume for suspend/resume support so that if the boot loader changes anything or the system's PLL is reset then we return with the correct settings. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This commit is contained in:
Ben Dooks
parent
c3391e36d6
commit
e425382ed9
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@ -16,6 +16,7 @@
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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@ -28,6 +29,8 @@
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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@ -65,13 +68,19 @@ void __init s3c2410_map_io(void)
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iotable_init(s3c2410_iodesc, ARRAY_SIZE(s3c2410_iodesc));
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}
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void __init s3c2410_init_clocks(int xtal)
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void __init_or_cpufreq s3c2410_setup_clocks(void)
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{
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struct clk *xtal_clk;
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unsigned long tmp;
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unsigned long xtal;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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@ -93,7 +102,13 @@ void __init s3c2410_init_clocks(int xtal)
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* console to use them
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*/
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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void __init s3c2410_init_clocks(int xtal)
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{
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s3c24xx_register_baseclocks(xtal);
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s3c2410_setup_clocks();
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s3c2410_baseclk_add();
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}
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@ -16,6 +16,7 @@
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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@ -33,6 +34,8 @@
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#include <mach/reset.h>
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#include <mach/idle.h>
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#include <plat/cpu-freq.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-power.h>
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@ -156,17 +159,23 @@ void __init s3c2412_map_io(void)
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iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
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}
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void __init s3c2412_init_clocks(int xtal)
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void __init_or_cpufreq s3c2412_setup_clocks(void)
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{
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struct clk *xtal_clk;
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unsigned long tmp;
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unsigned long xtal;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
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fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal * 2);
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clk_mpll.rate = fclk;
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@ -183,11 +192,17 @@ void __init s3c2412_init_clocks(int xtal)
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printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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void __init s3c2412_init_clocks(int xtal)
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{
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/* initialise the clocks here, to allow other things like the
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* console to use them
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*/
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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s3c24xx_register_baseclocks(xtal);
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s3c2412_setup_clocks();
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s3c2412_baseclk_add();
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}
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@ -39,6 +39,8 @@
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#include <mach/regs-s3c2443-clock.h>
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#include <plat/cpu-freq.h>
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#include <plat/s3c2443.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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@ -1011,22 +1013,20 @@ static struct clk *clks[] __initdata = {
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&clk_prediv,
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};
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void __init s3c2443_init_clocks(int xtal)
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void __init_or_cpufreq s3c2443_setup_clocks(void)
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{
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unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
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unsigned long mpllcon = __raw_readl(S3C2443_MPLLCON);
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unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0);
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struct clk *xtal_clk;
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unsigned long xtal;
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unsigned long pll;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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struct clk *clkp;
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int ret;
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int ptr;
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/* s3c2443 parents h and p clocks from prediv */
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clk_h.parent = &clk_prediv;
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clk_p.parent = &clk_prediv;
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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pll = s3c2443_get_mpll(mpllcon, xtal);
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clk_msysclk.rate = pll;
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@ -1036,13 +1036,29 @@ void __init s3c2443_init_clocks(int xtal)
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hclk /= s3c2443_get_hdiv(clkdiv0);
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pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1);
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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printk("S3C2443: mpll %s %ld.%03ld MHz, cpu %ld.%03ld MHz, mem %ld.%03ld MHz, pclk %ld.%03ld MHz\n",
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(mpllcon & S3C2443_PLLCON_OFF) ? "off":"on",
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print_mhz(pll), print_mhz(fclk),
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print_mhz(hclk), print_mhz(pclk));
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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void __init s3c2443_init_clocks(int xtal)
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{
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struct clk *clkp;
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unsigned long epllcon = __raw_readl(S3C2443_EPLLCON);
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int ret;
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int ptr;
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/* s3c2443 parents h and p clocks from prediv */
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clk_h.parent = &clk_prediv;
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clk_p.parent = &clk_prediv;
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s3c24xx_register_baseclocks(xtal);
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s3c2443_setup_clocks();
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s3c2443_clk_initparents();
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for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
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@ -1056,7 +1072,6 @@ void __init s3c2443_init_clocks(int xtal)
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}
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clk_epll.rate = s3c2443_get_epll(epllcon, xtal);
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clk_usb_bus.parent = &clk_usb_bus_host;
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/* ensure usb bus clock is within correct rate of 48MHz */
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@ -47,6 +47,8 @@
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#include <mach/regs-clock.h>
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#include <mach/regs-gpio.h>
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#include <plat/cpu-freq.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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#include <plat/pll.h>
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@ -327,24 +329,24 @@ int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
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/* initalise all the clocks */
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int __init s3c24xx_setup_clocks(unsigned long xtal,
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unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk)
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void __init_or_cpufreq s3c24xx_setup_clocks(unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk)
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{
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printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
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/* initialise the main system clocks */
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clk_xtal.rate = xtal;
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clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON), xtal);
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clk_upll.rate = s3c24xx_get_pll(__raw_readl(S3C2410_UPLLCON),
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clk_xtal.rate);
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clk_mpll.rate = fclk;
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clk_h.rate = hclk;
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clk_p.rate = pclk;
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clk_f.rate = fclk;
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}
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/* assume uart clocks are correctly setup */
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int __init s3c24xx_register_baseclocks(unsigned long xtal)
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{
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printk(KERN_INFO "S3C24XX Clocks, (c) 2004 Simtec Electronics\n");
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clk_xtal.rate = xtal;
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/* register our clocks */
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@ -368,3 +370,4 @@ int __init s3c24xx_setup_clocks(unsigned long xtal,
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return 0;
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}
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@ -60,7 +60,14 @@ extern int s3c2410_clkcon_enable(struct clk *clk, int enable);
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extern int s3c24xx_register_clock(struct clk *clk);
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extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks);
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extern int s3c24xx_setup_clocks(unsigned long xtal,
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unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk);
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extern int s3c24xx_register_baseclocks(unsigned long xtal);
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extern void s3c24xx_setup_clocks(unsigned long fclk,
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unsigned long hclk,
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unsigned long pclk);
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extern void s3c2410_setup_clocks(void);
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extern void s3c2412_setup_clocks(void);
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extern void s3c244x_setup_clocks(void);
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extern void s3c2443_setup_clocks(void);
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@ -76,11 +76,13 @@ static struct sleep_save core_save[] = {
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SAVE_ITEM(S3C2410_BANKCON4),
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SAVE_ITEM(S3C2410_BANKCON5),
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#ifndef CONFIG_CPU_FREQ
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SAVE_ITEM(S3C2410_CLKDIVN),
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SAVE_ITEM(S3C2410_MPLLCON),
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SAVE_ITEM(S3C2410_REFRESH),
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#endif
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SAVE_ITEM(S3C2410_UPLLCON),
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SAVE_ITEM(S3C2410_CLKSLOW),
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SAVE_ITEM(S3C2410_REFRESH),
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};
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static struct gpio_sleep {
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@ -29,6 +29,8 @@
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <mach/regs-clock.h>
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#include <plat/regs-serial.h>
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#include <mach/regs-gpio.h>
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@ -71,15 +73,18 @@ void __init s3c244x_map_io(void)
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s3c_device_usbgadget.name = "s3c2440-usbgadget";
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}
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void __init s3c244x_init_clocks(int xtal)
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void __init_or_cpufreq s3c244x_setup_clocks(void)
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{
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struct clk *xtal_clk;
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unsigned long clkdiv;
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unsigned long camdiv;
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unsigned long xtal;
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unsigned long hclk, fclk, pclk;
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int hdiv = 1;
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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xtal_clk = clk_get(NULL, "xtal");
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xtal = clk_get_rate(xtal_clk);
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clk_put(xtal_clk);
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fclk = s3c24xx_get_pll(__raw_readl(S3C2410_MPLLCON), xtal) * 2;
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@ -107,18 +112,24 @@ void __init s3c244x_init_clocks(int xtal)
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}
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hclk = fclk / hdiv;
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pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
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pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1);
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/* print brief summary of clocks, etc */
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printk("S3C244X: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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s3c24xx_setup_clocks(fclk, hclk, pclk);
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}
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void __init s3c244x_init_clocks(int xtal)
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{
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/* initialise the clocks here, to allow other things like the
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* console to use them, and to add new ones after the initialisation
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*/
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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s3c24xx_register_baseclocks(xtal);
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s3c244x_setup_clocks();
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s3c2410_baseclk_add();
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}
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