spi: sirf: add support for USP-based SPI
USP is a general purpose serial port in SiRFSoC, which can work as SPI. the most data flow of USP and pure SPI is same with main differences in registers layout. this patch moves registers layout to private data, and use flags to differentiate other minor differences between prima2-spi, prima2-usp and atlas7-usp for hardware configuration. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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* CSR SiRFprimaII Serial Peripheral Interface
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Required properties:
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- compatible : Should be "sirf,prima2-spi"
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- compatible : Should be "sirf,prima2-spi", "sirf,prima2-usp"
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or "sirf,atlas7-usp"
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- reg : Offset and length of the register set for the device
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- interrupts : Should contain SPI interrupt
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- resets: phandle to the reset controller asserting this device in
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