ARM: davinci: remove davinci_intc_type
We now use the generic ARM irq handler on davinci. There are no more users that check davinci_intc_type. Remove the variable and all its references. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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@ -24,7 +24,6 @@ struct davinci_soc_info davinci_soc_info;
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EXPORT_SYMBOL(davinci_soc_info);
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void __iomem *davinci_intc_base;
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int davinci_intc_type;
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static int __init davinci_init_id(struct davinci_soc_info *soc_info)
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{
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@ -146,7 +146,6 @@ int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
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unsigned num_reg = BITS_TO_LONGS(num_irq);
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int i, irq_base;
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davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
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if (node) {
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davinci_intc_base = of_iomap(node, 0);
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if (of_property_read_u32(node, "ti,intc-size", &num_irq))
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@ -807,7 +807,6 @@ static const struct davinci_soc_info davinci_soc_info_da830 = {
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.pinmux_pins = da830_pins,
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.pinmux_pins_num = ARRAY_SIZE(da830_pins),
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.intc_base = DA8XX_CP_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_CP_INTC,
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.intc_irq_prios = da830_default_priorities,
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.intc_irq_num = DA830_N_CP_INTC_IRQ,
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.timer_info = &da830_timer_info,
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@ -739,7 +739,6 @@ static const struct davinci_soc_info davinci_soc_info_da850 = {
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.pinmux_pins = da850_pins,
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.pinmux_pins_num = ARRAY_SIZE(da850_pins),
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.intc_base = DA8XX_CP_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_CP_INTC,
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.intc_irq_prios = da850_default_priorities,
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.intc_irq_num = DA850_N_CP_INTC_IRQ,
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.timer_info = &da850_timer_info,
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@ -705,7 +705,6 @@ static const struct davinci_soc_info davinci_soc_info_dm355 = {
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.pinmux_pins = dm355_pins,
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.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
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.intc_base = DAVINCI_ARM_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_AINTC,
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.intc_irq_prios = dm355_default_priorities,
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm355_timer_info,
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@ -722,7 +722,6 @@ static const struct davinci_soc_info davinci_soc_info_dm365 = {
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.pinmux_pins = dm365_pins,
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.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
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.intc_base = DAVINCI_ARM_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_AINTC,
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.intc_irq_prios = dm365_default_priorities,
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm365_timer_info,
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@ -646,7 +646,6 @@ static const struct davinci_soc_info davinci_soc_info_dm644x = {
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.pinmux_pins = dm644x_pins,
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.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
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.intc_base = DAVINCI_ARM_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_AINTC,
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.intc_irq_prios = dm644x_default_priorities,
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm644x_timer_info,
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@ -586,7 +586,6 @@ static const struct davinci_soc_info davinci_soc_info_dm646x = {
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.pinmux_pins = dm646x_pins,
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.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
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.intc_base = DAVINCI_ARM_INTC_BASE,
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.intc_type = DAVINCI_INTC_TYPE_AINTC,
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.intc_irq_prios = dm646x_default_priorities,
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.intc_irq_num = DAVINCI_N_AINTC_IRQ,
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.timer_info = &dm646x_timer_info,
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@ -21,7 +21,6 @@ void davinci_timer_init(struct clk *clk);
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extern void davinci_irq_init(void);
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extern void __iomem *davinci_intc_base;
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extern int davinci_intc_type;
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struct davinci_timer_instance {
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u32 base;
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@ -58,7 +57,6 @@ struct davinci_soc_info {
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const struct mux_config *pinmux_pins;
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unsigned long pinmux_pins_num;
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u32 intc_base;
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int intc_type;
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u8 *intc_irq_prios;
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unsigned long intc_irq_num;
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struct davinci_timer_info *timer_info;
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@ -30,9 +30,6 @@
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/* Base address */
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#define DAVINCI_ARM_INTC_BASE 0x01C48000
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#define DAVINCI_INTC_TYPE_AINTC 0
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#define DAVINCI_INTC_TYPE_CP_INTC 1
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/* Interrupt lines */
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#define IRQ_VDINT0 0
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#define IRQ_VDINT1 1
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@ -99,7 +99,6 @@ void __init davinci_irq_init(void)
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const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
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int ret, irq_base;
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davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
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davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
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if (WARN_ON(!davinci_intc_base))
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return;
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