ARM: SoC fixes for 3.18-rc5
Another small set of fixes: - Some DT compatible typo fixes - irq setup fix dealing with irq storms on orion - i2c quirk generalization for mvebu - A handful of smaller fixes for OMAP - A couple of added file patterns for OMAP entries in MAINTAINERS -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUaTBRAAoJEIwa5zzehBx3+wYP/iTZRQpaYuo3zw55oyYhyeUZ oh530Fz9ItyMi8rcGl4Tf0hh4tcdhYkpB2nCBgQ4x7FexyLvd2ZubLXOwwOnVter D+pVjpxdBuKtCdYm1+x35Zk6efbOYtJ7UDE1cGUQP+zA56Rx0K935/vlKZVkxJ19 ytEksAna7z9PR4wR/YhYpMdcAxa7YXm7qnlU9gLx56MPBzUN5yvTP9bXs1qBOgPw ZC18uunr3RNIcmqEui+SEsCiDflkAe3xbwKvnsCmvQsyDsKYRmtuPOK8B86c9K9b LWedSG36/bcxb6IG/McAcqYgtReAUz0KkxvXu3SsAbWOLnzWPCgDUSgbvAtFt1Oz qtYPNNqqEC9fpiJE2LKJopK83+p5tYZ+MrJjGsqtIUJhLBW5xFs77NkrMDyEJJyN T+6GDDWk1UsMI49MRb1Nw6GTKmJvcOr0V3+OyHdjAOYqTbSeToOr5HHzCVYqhBTy fN3syzZKPAjXddAl70ixEy2o9CLckUBBrSrMyIEfENCAP74w+tc3UHFIv0yGmyDb 95I5dfX2mvb/rxckQLOW7ewjp4DPAq7Kdo6+CBR39TJUEolweNQlUcZHQccalS6I cQ/SnVCYTQkIMFIhPrQQnL6/Yvwj/Qo+wu/hJL+3f4XKOKEQ88QpgCgVwKVN9Scg nBsEM2n2IbLPwuzAkvdv =0RR/ -----END PGP SIGNATURE----- Merge tag 'armsoc-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC fixes from Olof Johansson: "Another small set of fixes: - some DT compatible typo fixes - irq setup fix dealing with irq storms on orion - i2c quirk generalization for mvebu - a handful of smaller fixes for OMAP - a couple of added file patterns for OMAP entries in MAINTAINERS" * tag 'armsoc-for-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: at91/dt: Fix sama5d3x typos pinctrl: dra: dt-bindings: Fix output pull up/down MAINTAINERS: Update entry for omap related .dts files to cover new SoCs MAINTAINERS: add more files under OMAP SUPPORT ARM: dts: AM437x-SK-EVM: Fix DCDC3 voltage ARM: dts: AM437x-GP-EVM: Fix DCDC3 voltage ARM: dts: AM43x-EPOS-EVM: Fix DCDC3 voltage ARM: dts: am335x-evm: Fix 5th NAND partition's name ARM: orion: Fix for certain sequence of request_irq can cause irq storm ARM: mvebu: armada xp: Generalize use of i2c quirk
This commit is contained in:
commit
e35c5a2759
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MAINTAINERS
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MAINTAINERS
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@ -6611,6 +6611,23 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git
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S: Maintained
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F: arch/arm/*omap*/
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F: drivers/i2c/busses/i2c-omap.c
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F: drivers/irqchip/irq-omap-intc.c
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F: drivers/mfd/*omap*.c
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F: drivers/mfd/menelaus.c
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F: drivers/mfd/palmas.c
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F: drivers/mfd/tps65217.c
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F: drivers/mfd/tps65218.c
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F: drivers/mfd/tps65910.c
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F: drivers/mfd/twl-core.[ch]
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F: drivers/mfd/twl4030*.c
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F: drivers/mfd/twl6030*.c
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F: drivers/mfd/twl6040*.c
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F: drivers/regulator/palmas-regulator*.c
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F: drivers/regulator/pbias-regulator.c
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F: drivers/regulator/tps65217-regulator.c
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F: drivers/regulator/tps65218-regulator.c
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F: drivers/regulator/tps65910-regulator.c
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F: drivers/regulator/twl-regulator.c
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F: include/linux/i2c-omap.h
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OMAP DEVICE TREE SUPPORT
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@ -6621,6 +6638,9 @@ L: devicetree@vger.kernel.org
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S: Maintained
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F: arch/arm/boot/dts/*omap*
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F: arch/arm/boot/dts/*am3*
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F: arch/arm/boot/dts/*am4*
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F: arch/arm/boot/dts/*am5*
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F: arch/arm/boot/dts/*dra7*
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OMAP CLOCK FRAMEWORK SUPPORT
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M: Paul Walmsley <paul@pwsan.com>
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@ -489,7 +489,7 @@
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reg = <0x00060000 0x00020000>;
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};
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partition@4 {
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label = "NAND.u-boot-spl";
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label = "NAND.u-boot-spl-os";
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reg = <0x00080000 0x00040000>;
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};
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partition@5 {
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@ -291,8 +291,8 @@
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dcdc3: regulator-dcdc3 {
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compatible = "ti,tps65218-dcdc3";
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regulator-name = "vdcdc3";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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@ -363,8 +363,8 @@
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dcdc3: regulator-dcdc3 {
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compatible = "ti,tps65218-dcdc3";
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regulator-name = "vdds_ddr";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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@ -358,8 +358,8 @@
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dcdc3: regulator-dcdc3 {
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compatible = "ti,tps65218-dcdc3";
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regulator-name = "vdcdc3";
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regulator-min-microvolt = <1350000>;
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regulator-max-microvolt = <1350000>;
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <1500000>;
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regulator-boot-on;
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regulator-always-on;
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};
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@ -12,5 +12,5 @@
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#include "sama5d3_uart.dtsi"
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/ {
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compatible = "atmel,samad31", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
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};
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@ -10,5 +10,5 @@
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#include "sama5d3_gmac.dtsi"
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/ {
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compatible = "atmel,samad33", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d33", "atmel,sama5d3", "atmel,sama5";
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};
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@ -12,5 +12,5 @@
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#include "sama5d3_mci2.dtsi"
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/ {
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compatible = "atmel,samad34", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d34", "atmel,sama5d3", "atmel,sama5";
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};
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@ -14,5 +14,5 @@
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#include "sama5d3_tcb1.dtsi"
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/ {
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compatible = "atmel,samad35", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d35", "atmel,sama5d3", "atmel,sama5";
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};
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@ -16,5 +16,5 @@
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#include "sama5d3_uart.dtsi"
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/ {
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compatible = "atmel,samad36", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
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};
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@ -8,7 +8,7 @@
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*/
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/ {
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compatible = "atmel,samad3xcm", "atmel,sama5d3", "atmel,sama5";
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compatible = "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
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chosen {
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bootargs = "console=ttyS0,115200 rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs";
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@ -188,7 +188,7 @@ static void __init thermal_quirk(void)
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static void __init mvebu_dt_init(void)
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{
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if (of_machine_is_compatible("plathome,openblocks-ax3-4"))
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if (of_machine_is_compatible("marvell,armadaxp"))
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i2c_quirk();
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if (of_machine_is_compatible("marvell,a375-db")) {
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external_abort_quirk();
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@ -497,6 +497,34 @@ static void orion_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
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#define orion_gpio_dbg_show NULL
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#endif
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static void orion_gpio_unmask_irq(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 reg_val;
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u32 mask = d->mask;
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irq_gc_lock(gc);
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reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
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reg_val |= mask;
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irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
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irq_gc_unlock(gc);
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}
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static void orion_gpio_mask_irq(struct irq_data *d)
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{
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struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
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struct irq_chip_type *ct = irq_data_get_chip_type(d);
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u32 mask = d->mask;
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u32 reg_val;
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irq_gc_lock(gc);
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reg_val = irq_reg_readl(gc->reg_base + ct->regs.mask);
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reg_val &= ~mask;
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irq_reg_writel(reg_val, gc->reg_base + ct->regs.mask);
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irq_gc_unlock(gc);
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}
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void __init orion_gpio_init(struct device_node *np,
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int gpio_base, int ngpio,
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void __iomem *base, int mask_offset,
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ct = gc->chip_types;
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ct->regs.mask = ochip->mask_offset + GPIO_LEVEL_MASK_OFF;
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ct->type = IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW;
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ct->chip.irq_mask = irq_gc_mask_clr_bit;
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_mask = orion_gpio_mask_irq;
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ct->chip.irq_unmask = orion_gpio_unmask_irq;
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ct->chip.irq_set_type = gpio_irq_set_type;
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ct->chip.name = ochip->chip.label;
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ct->regs.ack = GPIO_EDGE_CAUSE_OFF;
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ct->type = IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING;
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ct->chip.irq_ack = irq_gc_ack_clr_bit;
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ct->chip.irq_mask = irq_gc_mask_clr_bit;
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ct->chip.irq_unmask = irq_gc_mask_set_bit;
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ct->chip.irq_mask = orion_gpio_mask_irq;
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ct->chip.irq_unmask = orion_gpio_unmask_irq;
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ct->chip.irq_set_type = gpio_irq_set_type;
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ct->handler = handle_edge_irq;
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ct->chip.name = ochip->chip.label;
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@ -40,8 +40,8 @@
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/* Active pin states */
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#define PIN_OUTPUT (0 | PULL_DIS)
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#define PIN_OUTPUT_PULLUP (PIN_OUTPUT | PULL_ENA | PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (PIN_OUTPUT | PULL_ENA)
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#define PIN_OUTPUT_PULLUP (PULL_UP)
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#define PIN_OUTPUT_PULLDOWN (0)
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#define PIN_INPUT (INPUT_EN | PULL_DIS)
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#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL)
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#define PIN_INPUT_PULLUP (PULL_ENA | INPUT_EN | PULL_UP)
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