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Merge remote-tracking branches 'spi/topic/flash-dma', 'spi/topic/imx', 'spi/topic/loopback', 'spi/topic/maintainers' and 'spi/topic/mpc52xx-psc' into spi-next

This commit is contained in:
Mark Brown 2016-07-24 22:08:20 +01:00
parent ea9972df79 f4502dd1da ff1ba3dac0 b7ddfb9f49 87306eb700 ac96b737cd
commit e350817b7c
7 changed files with 134 additions and 114 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
Documentation/devicetree/bindings/spi/fsl-imx-cspi.txt
View File

@ -11,7 +11,6 @@ Required properties:
- "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
- reg : Offset and length of the register set for the device - reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt - interrupts : Should contain CSPI/eCSPI interrupt
- fsl,spi-num-chipselects : Contains the number of the chipselect
- cs-gpios : Specifies the gpio pins to be used for chipselects. - cs-gpios : Specifies the gpio pins to be used for chipselects.
- clocks : Clock specifiers for both ipg and per clocks. - clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per" - clock-names : Clock names should include both "ipg" and "per"
@ -21,6 +20,9 @@ See the clock consumer binding,
Documentation/devicetree/bindings/dma/dma.txt Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present. - dma-names: DMA request names should include "tx" and "rx" if present.
Obsolete properties:
- fsl,spi-num-chipselects : Contains the number of the chipselect
Example: Example:
ecspi@70010000 { ecspi@70010000 {
@ -29,7 +31,6 @@ ecspi@70010000 {
compatible = "fsl,imx51-ecspi"; compatible = "fsl,imx51-ecspi";
reg = <0x70010000 0x4000>; reg = <0x70010000 0x4000>;
interrupts = <36>; interrupts = <36>;
fsl,spi-num-chipselects = <2>;
cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */ cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */
<&gpio3 25 0>; /* GPIO3_25 */ <&gpio3 25 0>; /* GPIO3_25 */
dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;

1
MAINTAINERS
View File

@ -10799,6 +10799,7 @@ L: linux-spi@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git
Q: http://patchwork.kernel.org/project/spi-devel-general/list/ Q: http://patchwork.kernel.org/project/spi-devel-general/list/
S: Maintained S: Maintained
F: Documentation/devicetree/bindings/spi/
F: Documentation/spi/ F: Documentation/spi/
F: drivers/spi/ F: drivers/spi/
F: include/linux/spi/ F: include/linux/spi/

191
drivers/spi/spi-imx.c
View File

@ -59,8 +59,6 @@
struct spi_imx_config { struct spi_imx_config {
unsigned int speed_hz; unsigned int speed_hz;
unsigned int bpw; unsigned int bpw;
unsigned int mode;
u8 cs;
}; };
enum spi_imx_devtype { enum spi_imx_devtype {
@ -76,7 +74,7 @@ struct spi_imx_data;
struct spi_imx_devtype_data { struct spi_imx_devtype_data {
void (*intctrl)(struct spi_imx_data *, int); void (*intctrl)(struct spi_imx_data *, int);
int (*config)(struct spi_imx_data *, struct spi_imx_config *); int (*config)(struct spi_device *, struct spi_imx_config *);
void (*trigger)(struct spi_imx_data *); void (*trigger)(struct spi_imx_data *);
int (*rx_available)(struct spi_imx_data *); int (*rx_available)(struct spi_imx_data *);
void (*reset)(struct spi_imx_data *); void (*reset)(struct spi_imx_data *);
@ -112,7 +110,6 @@ struct spi_imx_data {
struct completion dma_tx_completion; struct completion dma_tx_completion;
const struct spi_imx_devtype_data *devtype_data; const struct spi_imx_devtype_data *devtype_data;
int chipselect[0];
}; };
static inline int is_imx27_cspi(struct spi_imx_data *d) static inline int is_imx27_cspi(struct spi_imx_data *d)
@ -312,7 +309,7 @@ static unsigned int mx51_ecspi_clkdiv(struct spi_imx_data *spi_imx,
(post << MX51_ECSPI_CTRL_POSTDIV_OFFSET); (post << MX51_ECSPI_CTRL_POSTDIV_OFFSET);
} }
static void __maybe_unused mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable) static void mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int enable)
{ {
unsigned val = 0; unsigned val = 0;
@ -325,7 +322,7 @@ static void __maybe_unused mx51_ecspi_intctrl(struct spi_imx_data *spi_imx, int
writel(val, spi_imx->base + MX51_ECSPI_INT); writel(val, spi_imx->base + MX51_ECSPI_INT);
} }
static void __maybe_unused mx51_ecspi_trigger(struct spi_imx_data *spi_imx) static void mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
{ {
u32 reg; u32 reg;
@ -334,9 +331,10 @@ static void __maybe_unused mx51_ecspi_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MX51_ECSPI_CTRL); writel(reg, spi_imx->base + MX51_ECSPI_CTRL);
} }
static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx, static int mx51_ecspi_config(struct spi_device *spi,
struct spi_imx_config *config) struct spi_imx_config *config)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
u32 ctrl = MX51_ECSPI_CTRL_ENABLE; u32 ctrl = MX51_ECSPI_CTRL_ENABLE;
u32 clk = config->speed_hz, delay, reg; u32 clk = config->speed_hz, delay, reg;
u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG); u32 cfg = readl(spi_imx->base + MX51_ECSPI_CONFIG);
@ -355,28 +353,28 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
spi_imx->spi_bus_clk = clk; spi_imx->spi_bus_clk = clk;
/* set chip select to use */ /* set chip select to use */
ctrl |= MX51_ECSPI_CTRL_CS(config->cs); ctrl |= MX51_ECSPI_CTRL_CS(spi->chip_select);
ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET; ctrl |= (config->bpw - 1) << MX51_ECSPI_CTRL_BL_OFFSET;
cfg |= MX51_ECSPI_CONFIG_SBBCTRL(config->cs); cfg |= MX51_ECSPI_CONFIG_SBBCTRL(spi->chip_select);
if (config->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
cfg |= MX51_ECSPI_CONFIG_SCLKPHA(config->cs); cfg |= MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select);
else else
cfg &= ~MX51_ECSPI_CONFIG_SCLKPHA(config->cs); cfg &= ~MX51_ECSPI_CONFIG_SCLKPHA(spi->chip_select);
if (config->mode & SPI_CPOL) { if (spi->mode & SPI_CPOL) {
cfg |= MX51_ECSPI_CONFIG_SCLKPOL(config->cs); cfg |= MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select);
cfg |= MX51_ECSPI_CONFIG_SCLKCTL(config->cs); cfg |= MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select);
} else { } else {
cfg &= ~MX51_ECSPI_CONFIG_SCLKPOL(config->cs); cfg &= ~MX51_ECSPI_CONFIG_SCLKPOL(spi->chip_select);
cfg &= ~MX51_ECSPI_CONFIG_SCLKCTL(config->cs); cfg &= ~MX51_ECSPI_CONFIG_SCLKCTL(spi->chip_select);
} }
if (config->mode & SPI_CS_HIGH) if (spi->mode & SPI_CS_HIGH)
cfg |= MX51_ECSPI_CONFIG_SSBPOL(config->cs); cfg |= MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select);
else else
cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(config->cs); cfg &= ~MX51_ECSPI_CONFIG_SSBPOL(spi->chip_select);
if (spi_imx->usedma) if (spi_imx->usedma)
ctrl |= MX51_ECSPI_CTRL_SMC; ctrl |= MX51_ECSPI_CTRL_SMC;
@ -385,7 +383,7 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL); writel(ctrl, spi_imx->base + MX51_ECSPI_CTRL);
reg = readl(spi_imx->base + MX51_ECSPI_TESTREG); reg = readl(spi_imx->base + MX51_ECSPI_TESTREG);
if (config->mode & SPI_LOOP) if (spi->mode & SPI_LOOP)
reg |= MX51_ECSPI_TESTREG_LBC; reg |= MX51_ECSPI_TESTREG_LBC;
else else
reg &= ~MX51_ECSPI_TESTREG_LBC; reg &= ~MX51_ECSPI_TESTREG_LBC;
@ -424,12 +422,12 @@ static int __maybe_unused mx51_ecspi_config(struct spi_imx_data *spi_imx,
return 0; return 0;
} }
static int __maybe_unused mx51_ecspi_rx_available(struct spi_imx_data *spi_imx) static int mx51_ecspi_rx_available(struct spi_imx_data *spi_imx)
{ {
return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR; return readl(spi_imx->base + MX51_ECSPI_STAT) & MX51_ECSPI_STAT_RR;
} }
static void __maybe_unused mx51_ecspi_reset(struct spi_imx_data *spi_imx) static void mx51_ecspi_reset(struct spi_imx_data *spi_imx)
{ {
/* drain receive buffer */ /* drain receive buffer */
while (mx51_ecspi_rx_available(spi_imx)) while (mx51_ecspi_rx_available(spi_imx))
@ -459,7 +457,7 @@ static void __maybe_unused mx51_ecspi_reset(struct spi_imx_data *spi_imx)
* the i.MX35 has a slightly different register layout for bits * the i.MX35 has a slightly different register layout for bits
* we do not use here. * we do not use here.
*/ */
static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable) static void mx31_intctrl(struct spi_imx_data *spi_imx, int enable)
{ {
unsigned int val = 0; unsigned int val = 0;
@ -471,7 +469,7 @@ static void __maybe_unused mx31_intctrl(struct spi_imx_data *spi_imx, int enable
writel(val, spi_imx->base + MXC_CSPIINT); writel(val, spi_imx->base + MXC_CSPIINT);
} }
static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx) static void mx31_trigger(struct spi_imx_data *spi_imx)
{ {
unsigned int reg; unsigned int reg;
@ -480,11 +478,10 @@ static void __maybe_unused mx31_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx, static int mx31_config(struct spi_device *spi, struct spi_imx_config *config)
struct spi_imx_config *config)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER; unsigned int reg = MX31_CSPICTRL_ENABLE | MX31_CSPICTRL_MASTER;
int cs = spi_imx->chipselect[config->cs];
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
MX31_CSPICTRL_DR_SHIFT; MX31_CSPICTRL_DR_SHIFT;
@ -496,14 +493,14 @@ static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx,
reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT; reg |= (config->bpw - 1) << MX31_CSPICTRL_BC_SHIFT;
} }
if (config->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
reg |= MX31_CSPICTRL_PHA; reg |= MX31_CSPICTRL_PHA;
if (config->mode & SPI_CPOL) if (spi->mode & SPI_CPOL)
reg |= MX31_CSPICTRL_POL; reg |= MX31_CSPICTRL_POL;
if (config->mode & SPI_CS_HIGH) if (spi->mode & SPI_CS_HIGH)
reg |= MX31_CSPICTRL_SSPOL; reg |= MX31_CSPICTRL_SSPOL;
if (cs < 0) if (spi->cs_gpio < 0)
reg |= (cs + 32) << reg |= (spi->cs_gpio + 32) <<
(is_imx35_cspi(spi_imx) ? MX35_CSPICTRL_CS_SHIFT : (is_imx35_cspi(spi_imx) ? MX35_CSPICTRL_CS_SHIFT :
MX31_CSPICTRL_CS_SHIFT); MX31_CSPICTRL_CS_SHIFT);
@ -512,12 +509,12 @@ static int __maybe_unused mx31_config(struct spi_imx_data *spi_imx,
return 0; return 0;
} }
static int __maybe_unused mx31_rx_available(struct spi_imx_data *spi_imx) static int mx31_rx_available(struct spi_imx_data *spi_imx)
{ {
return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR; return readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR;
} }
static void __maybe_unused mx31_reset(struct spi_imx_data *spi_imx) static void mx31_reset(struct spi_imx_data *spi_imx)
{ {
/* drain receive buffer */ /* drain receive buffer */
while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR) while (readl(spi_imx->base + MX31_CSPISTATUS) & MX31_STATUS_RR)
@ -537,7 +534,7 @@ static void __maybe_unused mx31_reset(struct spi_imx_data *spi_imx)
#define MX21_CSPICTRL_DR_SHIFT 14 #define MX21_CSPICTRL_DR_SHIFT 14
#define MX21_CSPICTRL_CS_SHIFT 19 #define MX21_CSPICTRL_CS_SHIFT 19
static void __maybe_unused mx21_intctrl(struct spi_imx_data *spi_imx, int enable) static void mx21_intctrl(struct spi_imx_data *spi_imx, int enable)
{ {
unsigned int val = 0; unsigned int val = 0;
@ -549,7 +546,7 @@ static void __maybe_unused mx21_intctrl(struct spi_imx_data *spi_imx, int enable
writel(val, spi_imx->base + MXC_CSPIINT); writel(val, spi_imx->base + MXC_CSPIINT);
} }
static void __maybe_unused mx21_trigger(struct spi_imx_data *spi_imx) static void mx21_trigger(struct spi_imx_data *spi_imx)
{ {
unsigned int reg; unsigned int reg;
@ -558,37 +555,36 @@ static void __maybe_unused mx21_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int __maybe_unused mx21_config(struct spi_imx_data *spi_imx, static int mx21_config(struct spi_device *spi, struct spi_imx_config *config)
struct spi_imx_config *config)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER; unsigned int reg = MX21_CSPICTRL_ENABLE | MX21_CSPICTRL_MASTER;
int cs = spi_imx->chipselect[config->cs];
unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18; unsigned int max = is_imx27_cspi(spi_imx) ? 16 : 18;
reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz, max) << reg |= spi_imx_clkdiv_1(spi_imx->spi_clk, config->speed_hz, max) <<
MX21_CSPICTRL_DR_SHIFT; MX21_CSPICTRL_DR_SHIFT;
reg |= config->bpw - 1; reg |= config->bpw - 1;
if (config->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
reg |= MX21_CSPICTRL_PHA; reg |= MX21_CSPICTRL_PHA;
if (config->mode & SPI_CPOL) if (spi->mode & SPI_CPOL)
reg |= MX21_CSPICTRL_POL; reg |= MX21_CSPICTRL_POL;
if (config->mode & SPI_CS_HIGH) if (spi->mode & SPI_CS_HIGH)
reg |= MX21_CSPICTRL_SSPOL; reg |= MX21_CSPICTRL_SSPOL;
if (cs < 0) if (spi->cs_gpio < 0)
reg |= (cs + 32) << MX21_CSPICTRL_CS_SHIFT; reg |= (spi->cs_gpio + 32) << MX21_CSPICTRL_CS_SHIFT;
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
return 0; return 0;
} }
static int __maybe_unused mx21_rx_available(struct spi_imx_data *spi_imx) static int mx21_rx_available(struct spi_imx_data *spi_imx)
{ {
return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR; return readl(spi_imx->base + MXC_CSPIINT) & MX21_INTREG_RR;
} }
static void __maybe_unused mx21_reset(struct spi_imx_data *spi_imx) static void mx21_reset(struct spi_imx_data *spi_imx)
{ {
writel(1, spi_imx->base + MXC_RESET); writel(1, spi_imx->base + MXC_RESET);
} }
@ -604,7 +600,7 @@ static void __maybe_unused mx21_reset(struct spi_imx_data *spi_imx)
#define MX1_CSPICTRL_MASTER (1 << 10) #define MX1_CSPICTRL_MASTER (1 << 10)
#define MX1_CSPICTRL_DR_SHIFT 13 #define MX1_CSPICTRL_DR_SHIFT 13
static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable) static void mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
{ {
unsigned int val = 0; unsigned int val = 0;
@ -616,7 +612,7 @@ static void __maybe_unused mx1_intctrl(struct spi_imx_data *spi_imx, int enable)
writel(val, spi_imx->base + MXC_CSPIINT); writel(val, spi_imx->base + MXC_CSPIINT);
} }
static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx) static void mx1_trigger(struct spi_imx_data *spi_imx)
{ {
unsigned int reg; unsigned int reg;
@ -625,18 +621,18 @@ static void __maybe_unused mx1_trigger(struct spi_imx_data *spi_imx)
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
} }
static int __maybe_unused mx1_config(struct spi_imx_data *spi_imx, static int mx1_config(struct spi_device *spi, struct spi_imx_config *config)
struct spi_imx_config *config)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER; unsigned int reg = MX1_CSPICTRL_ENABLE | MX1_CSPICTRL_MASTER;
reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) << reg |= spi_imx_clkdiv_2(spi_imx->spi_clk, config->speed_hz) <<
MX1_CSPICTRL_DR_SHIFT; MX1_CSPICTRL_DR_SHIFT;
reg |= config->bpw - 1; reg |= config->bpw - 1;
if (config->mode & SPI_CPHA) if (spi->mode & SPI_CPHA)
reg |= MX1_CSPICTRL_PHA; reg |= MX1_CSPICTRL_PHA;
if (config->mode & SPI_CPOL) if (spi->mode & SPI_CPOL)
reg |= MX1_CSPICTRL_POL; reg |= MX1_CSPICTRL_POL;
writel(reg, spi_imx->base + MXC_CSPICTRL); writel(reg, spi_imx->base + MXC_CSPICTRL);
@ -644,12 +640,12 @@ static int __maybe_unused mx1_config(struct spi_imx_data *spi_imx,
return 0; return 0;
} }
static int __maybe_unused mx1_rx_available(struct spi_imx_data *spi_imx) static int mx1_rx_available(struct spi_imx_data *spi_imx)
{ {
return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR; return readl(spi_imx->base + MXC_CSPIINT) & MX1_INTREG_RR;
} }
static void __maybe_unused mx1_reset(struct spi_imx_data *spi_imx) static void mx1_reset(struct spi_imx_data *spi_imx)
{ {
writel(1, spi_imx->base + MXC_RESET); writel(1, spi_imx->base + MXC_RESET);
} }
@ -747,15 +743,13 @@ MODULE_DEVICE_TABLE(of, spi_imx_dt_ids);
static void spi_imx_chipselect(struct spi_device *spi, int is_active) static void spi_imx_chipselect(struct spi_device *spi, int is_active)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
int gpio = spi_imx->chipselect[spi->chip_select];
int active = is_active != BITBANG_CS_INACTIVE; int active = is_active != BITBANG_CS_INACTIVE;
int dev_is_lowactive = !(spi->mode & SPI_CS_HIGH); int dev_is_lowactive = !(spi->mode & SPI_CS_HIGH);
if (!gpio_is_valid(gpio)) if (!gpio_is_valid(spi->cs_gpio))
return; return;
gpio_set_value(gpio, dev_is_lowactive ^ active); gpio_set_value(spi->cs_gpio, dev_is_lowactive ^ active);
} }
static void spi_imx_push(struct spi_imx_data *spi_imx) static void spi_imx_push(struct spi_imx_data *spi_imx)
@ -859,8 +853,6 @@ static int spi_imx_setupxfer(struct spi_device *spi,
config.bpw = t ? t->bits_per_word : spi->bits_per_word; config.bpw = t ? t->bits_per_word : spi->bits_per_word;
config.speed_hz = t ? t->speed_hz : spi->max_speed_hz; config.speed_hz = t ? t->speed_hz : spi->max_speed_hz;
config.mode = spi->mode;
config.cs = spi->chip_select;
if (!config.speed_hz) if (!config.speed_hz)
config.speed_hz = spi->max_speed_hz; config.speed_hz = spi->max_speed_hz;
@ -891,7 +883,7 @@ static int spi_imx_setupxfer(struct spi_device *spi,
return ret; return ret;
} }
spi_imx->devtype_data->config(spi_imx, &config); spi_imx->devtype_data->config(spi, &config);
return 0; return 0;
} }
@ -1050,6 +1042,8 @@ static int spi_imx_pio_transfer(struct spi_device *spi,
struct spi_transfer *transfer) struct spi_transfer *transfer)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master); struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
unsigned long transfer_timeout;
unsigned long timeout;
spi_imx->tx_buf = transfer->tx_buf; spi_imx->tx_buf = transfer->tx_buf;
spi_imx->rx_buf = transfer->rx_buf; spi_imx->rx_buf = transfer->rx_buf;
@ -1062,7 +1056,15 @@ static int spi_imx_pio_transfer(struct spi_device *spi,
spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE); spi_imx->devtype_data->intctrl(spi_imx, MXC_INT_TE);
wait_for_completion(&spi_imx->xfer_done); transfer_timeout = spi_imx_calculate_timeout(spi_imx, transfer->len);
timeout = wait_for_completion_timeout(&spi_imx->xfer_done,
transfer_timeout);
if (!timeout) {
dev_err(&spi->dev, "I/O Error in PIO\n");
spi_imx->devtype_data->reset(spi_imx);
return -ETIMEDOUT;
}
return transfer->len; return transfer->len;
} }
@ -1080,14 +1082,12 @@ static int spi_imx_transfer(struct spi_device *spi,
static int spi_imx_setup(struct spi_device *spi) static int spi_imx_setup(struct spi_device *spi)
{ {
struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
int gpio = spi_imx->chipselect[spi->chip_select];
dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__, dev_dbg(&spi->dev, "%s: mode %d, %u bpw, %d hz\n", __func__,
spi->mode, spi->bits_per_word, spi->max_speed_hz); spi->mode, spi->bits_per_word, spi->max_speed_hz);
if (gpio_is_valid(gpio)) if (gpio_is_valid(spi->cs_gpio))
gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); gpio_direction_output(spi->cs_gpio,
spi->mode & SPI_CS_HIGH ? 0 : 1);
spi_imx_chipselect(spi, BITBANG_CS_INACTIVE); spi_imx_chipselect(spi, BITBANG_CS_INACTIVE);
@ -1137,31 +1137,21 @@ static int spi_imx_probe(struct platform_device *pdev)
struct spi_master *master; struct spi_master *master;
struct spi_imx_data *spi_imx; struct spi_imx_data *spi_imx;
struct resource *res; struct resource *res;
int i, ret, num_cs, irq; int i, ret, irq;
if (!np && !mxc_platform_info) { if (!np && !mxc_platform_info) {
dev_err(&pdev->dev, "can't get the platform data\n"); dev_err(&pdev->dev, "can't get the platform data\n");
return -EINVAL; return -EINVAL;
} }
ret = of_property_read_u32(np, "fsl,spi-num-chipselects", &num_cs); master = spi_alloc_master(&pdev->dev, sizeof(struct spi_imx_data));
if (ret < 0) {
if (mxc_platform_info)
num_cs = mxc_platform_info->num_chipselect;
else
return ret;
}
master = spi_alloc_master(&pdev->dev,
sizeof(struct spi_imx_data) + sizeof(int) * num_cs);
if (!master) if (!master)
return -ENOMEM; return -ENOMEM;
platform_set_drvdata(pdev, master); platform_set_drvdata(pdev, master);
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
master->bus_num = pdev->id; master->bus_num = np ? -1 : pdev->id;
master->num_chipselect = num_cs;
spi_imx = spi_master_get_devdata(master); spi_imx = spi_master_get_devdata(master);
spi_imx->bitbang.master = master; spi_imx->bitbang.master = master;
@ -1170,22 +1160,16 @@ static int spi_imx_probe(struct platform_device *pdev)
spi_imx->devtype_data = of_id ? of_id->data : spi_imx->devtype_data = of_id ? of_id->data :
(struct spi_imx_devtype_data *)pdev->id_entry->driver_data; (struct spi_imx_devtype_data *)pdev->id_entry->driver_data;
for (i = 0; i < master->num_chipselect; i++) { if (mxc_platform_info) {
int cs_gpio = of_get_named_gpio(np, "cs-gpios", i); master->num_chipselect = mxc_platform_info->num_chipselect;
if (!gpio_is_valid(cs_gpio) && mxc_platform_info) master->cs_gpios = devm_kzalloc(&master->dev,
cs_gpio = mxc_platform_info->chipselect[i]; sizeof(int) * master->num_chipselect, GFP_KERNEL);
if (!master->cs_gpios)
return -ENOMEM;
spi_imx->chipselect[i] = cs_gpio; for (i = 0; i < master->num_chipselect; i++)
if (!gpio_is_valid(cs_gpio)) master->cs_gpios[i] = mxc_platform_info->chipselect[i];
continue; }
ret = devm_gpio_request(&pdev->dev, spi_imx->chipselect[i],
DRIVER_NAME);
if (ret) {
dev_err(&pdev->dev, "can't get cs gpios\n");
goto out_master_put;
}
}
spi_imx->bitbang.chipselect = spi_imx_chipselect; spi_imx->bitbang.chipselect = spi_imx_chipselect;
spi_imx->bitbang.setup_transfer = spi_imx_setupxfer; spi_imx->bitbang.setup_transfer = spi_imx_setupxfer;
@ -1267,6 +1251,19 @@ static int spi_imx_probe(struct platform_device *pdev)
goto out_clk_put; goto out_clk_put;
} }
for (i = 0; i < master->num_chipselect; i++) {
if (!gpio_is_valid(master->cs_gpios[i]))
continue;
ret = devm_gpio_request(&pdev->dev, master->cs_gpios[i],
DRIVER_NAME);
if (ret) {
dev_err(&pdev->dev, "Can't get CS GPIO %i\n",
master->cs_gpios[i]);
goto out_clk_put;
}
}
dev_info(&pdev->dev, "probed\n"); dev_info(&pdev->dev, "probed\n");
clk_disable(spi_imx->clk_ipg); clk_disable(spi_imx->clk_ipg);

2
drivers/spi/spi-loopback-test.c
View File

@ -536,7 +536,7 @@ static int spi_test_check_loopback_result(struct spi_device *spi,
mismatch_error: mismatch_error:
dev_err(&spi->dev, dev_err(&spi->dev,
"loopback strangeness - transfer missmatch on byte %04zx - expected 0x%02x, but got 0x%02x\n", "loopback strangeness - transfer mismatch on byte %04zx - expected 0x%02x, but got 0x%02x\n",
i, txb, rxb); i, txb, rxb);
return -EINVAL; return -EINVAL;

17
drivers/spi/spi-mpc52xx-psc.c
View File

@ -42,7 +42,6 @@ struct mpc52xx_psc_spi {
u8 bits_per_word; u8 bits_per_word;
u8 busy; u8 busy;
struct workqueue_struct *workqueue;
struct work_struct work; struct work_struct work;
struct list_head queue; struct list_head queue;
@ -299,7 +298,7 @@ static int mpc52xx_psc_spi_transfer(struct spi_device *spi,
spin_lock_irqsave(&mps->lock, flags); spin_lock_irqsave(&mps->lock, flags);
list_add_tail(&m->queue, &mps->queue); list_add_tail(&m->queue, &mps->queue);
queue_work(mps->workqueue, &mps->work); schedule_work(&mps->work);
spin_unlock_irqrestore(&mps->lock, flags); spin_unlock_irqrestore(&mps->lock, flags);
return 0; return 0;
@ -425,21 +424,12 @@ static int mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
INIT_WORK(&mps->work, mpc52xx_psc_spi_work); INIT_WORK(&mps->work, mpc52xx_psc_spi_work);
INIT_LIST_HEAD(&mps->queue); INIT_LIST_HEAD(&mps->queue);
mps->workqueue = create_singlethread_workqueue(
dev_name(master->dev.parent));
if (mps->workqueue == NULL) {
ret = -EBUSY;
goto free_irq;
}
ret = spi_register_master(master); ret = spi_register_master(master);
if (ret < 0) if (ret < 0)
goto unreg_master; goto free_irq;
return ret; return ret;
unreg_master:
destroy_workqueue(mps->workqueue);
free_irq: free_irq:
free_irq(mps->irq, mps); free_irq(mps->irq, mps);
free_master: free_master:
@ -484,8 +474,7 @@ static int mpc52xx_psc_spi_of_remove(struct platform_device *op)
struct spi_master *master = spi_master_get(platform_get_drvdata(op)); struct spi_master *master = spi_master_get(platform_get_drvdata(op));
struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master); struct mpc52xx_psc_spi *mps = spi_master_get_devdata(master);
flush_workqueue(mps->workqueue); flush_work(&mps->work);
destroy_workqueue(mps->workqueue);
spi_unregister_master(master); spi_unregister_master(master);
free_irq(mps->irq, mps); free_irq(mps->irq, mps);
if (mps->psc) if (mps->psc)

28
drivers/spi/spi.c
View File

@ -849,6 +849,20 @@ static int __spi_unmap_msg(struct spi_master *master, struct spi_message *msg)
return 0; return 0;
} }
#else /* !CONFIG_HAS_DMA */ #else /* !CONFIG_HAS_DMA */
static inline int spi_map_buf(struct spi_master *master,
struct device *dev, struct sg_table *sgt,
void *buf, size_t len,
enum dma_data_direction dir)
{
return -EINVAL;
}
static inline void spi_unmap_buf(struct spi_master *master,
struct device *dev, struct sg_table *sgt,
enum dma_data_direction dir)
{
}
static inline int __spi_map_msg(struct spi_master *master, static inline int __spi_map_msg(struct spi_master *master,
struct spi_message *msg) struct spi_message *msg)
{ {
@ -2725,6 +2739,7 @@ int spi_flash_read(struct spi_device *spi,
{ {
struct spi_master *master = spi->master; struct spi_master *master = spi->master;
struct device *rx_dev = NULL;
int ret; int ret;
if ((msg->opcode_nbits == SPI_NBITS_DUAL || if ((msg->opcode_nbits == SPI_NBITS_DUAL ||
@ -2750,9 +2765,22 @@ int spi_flash_read(struct spi_device *spi,
return ret; return ret;
} }
} }
mutex_lock(&master->bus_lock_mutex); mutex_lock(&master->bus_lock_mutex);
if (master->dma_rx) {
rx_dev = master->dma_rx->device->dev;
ret = spi_map_buf(master, rx_dev, &msg->rx_sg,
msg->buf, msg->len,
DMA_FROM_DEVICE);
if (!ret)
msg->cur_msg_mapped = true;
}
ret = master->spi_flash_read(spi, msg); ret = master->spi_flash_read(spi, msg);
if (msg->cur_msg_mapped)
spi_unmap_buf(master, rx_dev, &msg->rx_sg,
DMA_FROM_DEVICE);
mutex_unlock(&master->bus_lock_mutex); mutex_unlock(&master->bus_lock_mutex);
if (master->auto_runtime_pm) if (master->auto_runtime_pm)
pm_runtime_put(master->dev.parent); pm_runtime_put(master->dev.parent);

4
include/linux/spi/spi.h
View File

@ -1143,6 +1143,8 @@ static inline ssize_t spi_w8r16be(struct spi_device *spi, u8 cmd)
* @opcode_nbits: number of lines to send opcode * @opcode_nbits: number of lines to send opcode
* @addr_nbits: number of lines to send address * @addr_nbits: number of lines to send address
* @data_nbits: number of lines for data * @data_nbits: number of lines for data
* @rx_sg: Scatterlist for receive data read from flash
* @cur_msg_mapped: message has been mapped for DMA
*/ */
struct spi_flash_read_message { struct spi_flash_read_message {
void *buf; void *buf;
@ -1155,6 +1157,8 @@ struct spi_flash_read_message {
u8 opcode_nbits; u8 opcode_nbits;
u8 addr_nbits; u8 addr_nbits;
u8 data_nbits; u8 data_nbits;
struct sg_table rx_sg;
bool cur_msg_mapped;
}; };
/* SPI core interface for flash read support */ /* SPI core interface for flash read support */