ASoC: rsnd: add rsnd_adg_set_ssi_clk() and cleanup adg
This patch adds rsnd_adg_set_ssi_clk() to access to AUDIO_CLK_SEL0/1/2, and removes last user of rsnd_write/read/bset which is very low level function. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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a073278228
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@ -30,41 +30,41 @@ struct rsnd_adg {
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i++, (pos) = adg->clk[i])
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#define rsnd_priv_to_adg(priv) ((struct rsnd_adg *)(priv)->adg)
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static enum rsnd_reg rsnd_adg_ssi_reg_get(int id)
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static void rsnd_adg_set_ssi_clk(struct rsnd_mod *mod, u32 val)
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{
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enum rsnd_reg reg;
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int id = rsnd_mod_id(mod);
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int shift = (id % 4) * 8;
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u32 mask = 0xFF << shift;
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val = val << shift;
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/*
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* SSI 8 is not connected to ADG.
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* it works with SSI 7
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*/
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if (id == 8)
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return RSND_REG_MAX;
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return;
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if (0 <= id && id <= 3)
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reg = RSND_REG_AUDIO_CLK_SEL0;
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else if (4 <= id && id <= 7)
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reg = RSND_REG_AUDIO_CLK_SEL1;
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else
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reg = RSND_REG_AUDIO_CLK_SEL2;
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return reg;
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switch (id / 4) {
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case 0:
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rsnd_mod_bset(mod, AUDIO_CLK_SEL0, mask, val);
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break;
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case 1:
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rsnd_mod_bset(mod, AUDIO_CLK_SEL1, mask, val);
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break;
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case 2:
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rsnd_mod_bset(mod, AUDIO_CLK_SEL2, mask, val);
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break;
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}
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}
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int rsnd_adg_ssi_clk_stop(struct rsnd_mod *mod)
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{
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struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
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enum rsnd_reg reg;
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int id;
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/*
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* "mod" = "ssi" here.
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* we can get "ssi id" from mod
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*/
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id = rsnd_mod_id(mod);
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reg = rsnd_adg_ssi_reg_get(id);
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rsnd_write(priv, mod, reg, 0);
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rsnd_adg_set_ssi_clk(mod, 0);
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return 0;
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}
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@ -75,8 +75,7 @@ int rsnd_adg_ssi_clk_try_start(struct rsnd_mod *mod, unsigned int rate)
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struct rsnd_adg *adg = rsnd_priv_to_adg(priv);
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struct device *dev = rsnd_priv_to_dev(priv);
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struct clk *clk;
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enum rsnd_reg reg;
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int id, shift, i;
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int i;
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u32 data;
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int sel_table[] = {
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[CLKA] = 0x1,
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@ -125,19 +124,10 @@ found_clock:
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* This "mod" = "ssi" here.
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* we can get "ssi id" from mod
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*/
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id = rsnd_mod_id(mod);
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reg = rsnd_adg_ssi_reg_get(id);
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rsnd_adg_set_ssi_clk(mod, data);
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dev_dbg(dev, "ADG: ssi%d selects clk%d = %d", id, i, rate);
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/*
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* Enable SSIx clock
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*/
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shift = (id % 4) * 8;
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rsnd_bset(priv, mod, reg,
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0xFF << shift,
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data << shift);
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dev_dbg(dev, "ADG: ssi%d selects clk%d = %d",
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rsnd_mod_id(mod), i, rate);
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return 0;
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}
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