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powerpc/44x: AMCC PPC460GT/EX PCI-E de-emphasis adjustment fix 

During recent tests with PCI-E , it has been found the
DRV + De-Emphasis values are not optimum. These new values
are tested thouroughly.

Signed-off-by: Tirumala R Marri <tmarri@amcc.com>
Signed-off-by: Feng Kan fkan@amcc.com
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
This commit is contained in:
Tirumala R Marri 2008-08-21 18:53:34 +00:00 committed by Josh Boyer
parent 7713fef065
commit e30c987584
1 changed files with 5 additions and 5 deletions
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10
arch/powerpc/sysdev/ppc4xx_pci.c
View File

@ -810,7 +810,7 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
switch (port->index) {
case 0:
mtdcri(SDR0, PESDR0_460EX_L0CDRCTL, 0x00003230);
mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000136);
mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST,0x10000000);
@ -821,10 +821,10 @@ static int ppc460ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
mtdcri(SDR0, PESDR1_460EX_L1CDRCTL, 0x00003230);
mtdcri(SDR0, PESDR1_460EX_L2CDRCTL, 0x00003230);
mtdcri(SDR0, PESDR1_460EX_L3CDRCTL, 0x00003230);
mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000136);
mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000136);
mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000136);
mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000136);
mtdcri(SDR0, PESDR1_460EX_L0DRV, 0x00000130);
mtdcri(SDR0, PESDR1_460EX_L1DRV, 0x00000130);
mtdcri(SDR0, PESDR1_460EX_L2DRV, 0x00000130);
mtdcri(SDR0, PESDR1_460EX_L3DRV, 0x00000130);
mtdcri(SDR0, PESDR1_460EX_L0CLK, 0x00000006);
mtdcri(SDR0, PESDR1_460EX_L1CLK, 0x00000006);
mtdcri(SDR0, PESDR1_460EX_L2CLK, 0x00000006);