xtensa: introduce spill_registers_kernel macro
Most in-kernel users want registers spilled on the kernel stack and don't require PS.EXCM to be set. That means that they don't need fixup routine and could reuse regular window overflow mechanism for that, which makes spill routine very simple. Cc: stable@vger.kernel.org Suggested-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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Max Filippov
parent
45ec8860be
commit
e2fd1374c7
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@ -23,25 +23,37 @@ void secondary_trap_init(void);
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static inline void spill_registers(void)
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{
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#if XCHAL_NUM_AREGS > 16
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__asm__ __volatile__ (
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"movi a14, "__stringify((1 << PS_EXCM_BIT) | LOCKLEVEL)"\n\t"
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"mov a12, a0\n\t"
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"rsr a13, sar\n\t"
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"xsr a14, ps\n\t"
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"movi a0, _spill_registers\n\t"
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"rsync\n\t"
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"callx0 a0\n\t"
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"mov a0, a12\n\t"
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"wsr a13, sar\n\t"
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"wsr a14, ps\n\t"
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: :
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#if defined(CONFIG_FRAME_POINTER)
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: "a2", "a3", "a4", "a11", "a12", "a13", "a14", "a15",
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#else
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: "a2", "a3", "a4", "a7", "a11", "a12", "a13", "a14", "a15",
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" call12 1f\n"
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" _j 2f\n"
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" retw\n"
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" .align 4\n"
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"1:\n"
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" _entry a1, 48\n"
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" addi a12, a0, 3\n"
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#if XCHAL_NUM_AREGS > 32
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" .rept (" __stringify(XCHAL_NUM_AREGS) " - 32) / 12\n"
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" _entry a1, 48\n"
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" mov a12, a0\n"
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" .endr\n"
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#endif
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" _entry a1, 48\n"
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#if XCHAL_NUM_AREGS % 12 == 0
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" mov a8, a8\n"
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#elif XCHAL_NUM_AREGS % 12 == 4
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" mov a12, a12\n"
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#elif XCHAL_NUM_AREGS % 12 == 8
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" mov a4, a4\n"
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#endif
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" retw\n"
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"2:\n"
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: : : "a12", "a13", "memory");
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#else
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__asm__ __volatile__ (
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" mov a12, a12\n"
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: : : "memory");
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#endif
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"memory");
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}
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#endif /* _XTENSA_TRAPS_H */
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@ -1794,6 +1794,43 @@ ENTRY(system_call)
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ENDPROC(system_call)
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/*
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* Spill live registers on the kernel stack macro.
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*
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* Entry condition: ps.woe is set, ps.excm is cleared
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* Exit condition: windowstart has single bit set
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* May clobber: a12, a13
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*/
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.macro spill_registers_kernel
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#if XCHAL_NUM_AREGS > 16
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call12 1f
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_j 2f
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retw
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.align 4
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1:
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_entry a1, 48
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addi a12, a0, 3
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#if XCHAL_NUM_AREGS > 32
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.rept (XCHAL_NUM_AREGS - 32) / 12
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_entry a1, 48
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mov a12, a0
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.endr
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#endif
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_entry a1, 48
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#if XCHAL_NUM_AREGS % 12 == 0
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mov a8, a8
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#elif XCHAL_NUM_AREGS % 12 == 4
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mov a12, a12
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#elif XCHAL_NUM_AREGS % 12 == 8
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mov a4, a4
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#endif
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retw
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2:
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#else
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mov a12, a12
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#endif
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.endm
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/*
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* Task switch.
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@ -1806,21 +1843,20 @@ ENTRY(_switch_to)
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entry a1, 16
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mov a12, a2 # preserve 'prev' (a2)
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mov a13, a3 # and 'next' (a3)
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mov a10, a2 # preserve 'prev' (a2)
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mov a11, a3 # and 'next' (a3)
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l32i a4, a2, TASK_THREAD_INFO
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l32i a5, a3, TASK_THREAD_INFO
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save_xtregs_user a4 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
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save_xtregs_user a4 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
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s32i a0, a12, THREAD_RA # save return address
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s32i a1, a12, THREAD_SP # save stack pointer
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s32i a0, a10, THREAD_RA # save return address
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s32i a1, a10, THREAD_SP # save stack pointer
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/* Disable ints while we manipulate the stack pointer. */
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movi a14, (1 << PS_EXCM_BIT) | LOCKLEVEL
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xsr a14, ps
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rsil a14, LOCKLEVEL
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rsr a3, excsave1
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rsync
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s32i a3, a3, EXC_TABLE_FIXUP /* enter critical section */
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@ -1835,7 +1871,7 @@ ENTRY(_switch_to)
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/* Flush register file. */
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call0 _spill_registers # destroys a3, a4, and SAR
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spill_registers_kernel
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/* Set kernel stack (and leave critical section)
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* Note: It's save to set it here. The stack will not be overwritten
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@ -1851,13 +1887,13 @@ ENTRY(_switch_to)
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/* restore context of the task 'next' */
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l32i a0, a13, THREAD_RA # restore return address
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l32i a1, a13, THREAD_SP # restore stack pointer
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l32i a0, a11, THREAD_RA # restore return address
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l32i a1, a11, THREAD_SP # restore stack pointer
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load_xtregs_user a5 a6 a8 a9 a10 a11 THREAD_XTREGS_USER
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load_xtregs_user a5 a6 a8 a9 a12 a13 THREAD_XTREGS_USER
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wsr a14, ps
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mov a2, a12 # return 'prev'
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mov a2, a10 # return 'prev'
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rsync
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retw
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