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gpio: 104-idi-48: make use of raw_spinlock variants 

The 104-idi-48 gpio driver currently implements an irq_chip for handling
interrupts; due to how irq_chip handling is done, it's necessary for the
irq_chip methods to be invoked from hardirq context, even on a a
real-time kernel.  Because the spinlock_t type becomes a "sleeping"
spinlock w/ RT kernels, it is not suitable to be used with irq_chips.

A quick audit of the operations under the lock reveal that they do only
minimal, bounded work, and are therefore safe to do under a raw spinlock.

Signed-off-by: Julia Cartwright <julia@ni.com>
Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Julia Cartwright 2017-03-21 17:43:07 -05:00 committed by Linus Walleij
parent ea38ce081d
commit e1e37d6c4a
1 changed files with 10 additions and 8 deletions
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18
drivers/gpio/gpio-104-idi-48.c
View File

@ -51,7 +51,7 @@ MODULE_PARM_DESC(irq, "ACCES 104-IDI-48 interrupt line numbers");
*/ */
struct idi_48_gpio { struct idi_48_gpio {
struct gpio_chip chip; struct gpio_chip chip;
spinlock_t lock; raw_spinlock_t lock;
spinlock_t ack_lock; spinlock_t ack_lock;
unsigned char irq_mask[6]; unsigned char irq_mask[6];
unsigned base; unsigned base;
@ -112,11 +112,12 @@ static void idi_48_irq_mask(struct irq_data *data)
if (!idi48gpio->irq_mask[boundary]) { if (!idi48gpio->irq_mask[boundary]) {
idi48gpio->cos_enb &= ~BIT(boundary); idi48gpio->cos_enb &= ~BIT(boundary);
spin_lock_irqsave(&idi48gpio->lock, flags); raw_spin_lock_irqsave(&idi48gpio->lock, flags);
outb(idi48gpio->cos_enb, idi48gpio->base + 7); outb(idi48gpio->cos_enb, idi48gpio->base + 7);
spin_unlock_irqrestore(&idi48gpio->lock, flags); raw_spin_unlock_irqrestore(&idi48gpio->lock,
flags);
} }
return; return;
@ -145,11 +146,12 @@ static void idi_48_irq_unmask(struct irq_data *data)
if (!prev_irq_mask) { if (!prev_irq_mask) {
idi48gpio->cos_enb |= BIT(boundary); idi48gpio->cos_enb |= BIT(boundary);
spin_lock_irqsave(&idi48gpio->lock, flags); raw_spin_lock_irqsave(&idi48gpio->lock, flags);
outb(idi48gpio->cos_enb, idi48gpio->base + 7); outb(idi48gpio->cos_enb, idi48gpio->base + 7);
spin_unlock_irqrestore(&idi48gpio->lock, flags); raw_spin_unlock_irqrestore(&idi48gpio->lock,
flags);
} }
return; return;
@ -186,11 +188,11 @@ static irqreturn_t idi_48_irq_handler(int irq, void *dev_id)
spin_lock(&idi48gpio->ack_lock); spin_lock(&idi48gpio->ack_lock);
spin_lock(&idi48gpio->lock); raw_spin_lock(&idi48gpio->lock);
cos_status = inb(idi48gpio->base + 7); cos_status = inb(idi48gpio->base + 7);
spin_unlock(&idi48gpio->lock); raw_spin_unlock(&idi48gpio->lock);
/* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */ /* IRQ Status (bit 6) is active low (0 = IRQ generated by device) */
if (cos_status & BIT(6)) { if (cos_status & BIT(6)) {
@ -256,7 +258,7 @@ static int idi_48_probe(struct device *dev, unsigned int id)
idi48gpio->chip.get = idi_48_gpio_get; idi48gpio->chip.get = idi_48_gpio_get;
idi48gpio->base = base[id]; idi48gpio->base = base[id];
spin_lock_init(&idi48gpio->lock); raw_spin_lock_init(&idi48gpio->lock);
spin_lock_init(&idi48gpio->ack_lock); spin_lock_init(&idi48gpio->ack_lock);
err = devm_gpiochip_add_data(dev, &idi48gpio->chip, idi48gpio); err = devm_gpiochip_add_data(dev, &idi48gpio->chip, idi48gpio);